volatile bool IsSending;\r
\r
#if !defined(PDI_VIA_HARDWARE_USART)\r
-volatile uint16_t DataBits;\r
-volatile uint8_t BitCount;\r
+volatile uint16_t SoftUSART_Data;\r
+volatile uint8_t SoftUSART_BitCount;\r
\r
ISR(TIMER0_COMPA_vect, ISR_BLOCK)\r
{\r
- BITBANG_PDICLOCK_PORT ^= BITBANG_PDICLOCK_MASK;\r
+ /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
+ BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;\r
\r
/* If not sending or receiving, just exit */\r
- if (!(BitCount))\r
+ if (!(SoftUSART_BitCount))\r
return;\r
- \r
+\r
/* Check to see if the current clock state is on the rising or falling edge */\r
bool IsRisingEdge = (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK);\r
\r
if (IsSending && !IsRisingEdge)\r
{\r
- if (DataBits & 0x01)\r
- BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
+ if (SoftUSART_Data & 0x01)\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
else\r
- BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK; \r
+ BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK; \r
\r
- DataBits >>= 1;\r
- BitCount--;\r
+ SoftUSART_Data >>= 1;\r
+ SoftUSART_BitCount--;\r
}\r
else if (!IsSending && IsRisingEdge)\r
{\r
/* Wait for the start bit when receiving */\r
- if ((BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PORT & BITBANG_PDIDATA_MASK))\r
+ if ((SoftUSART_BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r
return;\r
\r
- if (BITBANG_PDIDATA_PORT & BITBANG_PDIDATA_MASK)\r
- DataBits |= (1 << (BITS_IN_FRAME - 1));\r
+ if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
+ SoftUSART_Data |= (1 << BITS_IN_FRAME);\r
\r
- DataBits >>= 1;\r
- BitCount--;\r
+ SoftUSART_Data >>= 1;\r
+ SoftUSART_BitCount--;\r
}\r
}\r
+#endif\r
\r
void PDITarget_EnableTargetPDI(void)\r
{\r
- /* Set DATA and CLOCK lines to outputs */\r
- BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
- BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;\r
- \r
- /* Set DATA line high for 90ns to disable /RESET functionality */\r
- BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
- asm volatile ("NOP"::);\r
- asm volatile ("NOP"::);\r
-\r
- /* Fire timer compare ISR every 160 cycles */\r
- OCR0A = 20;\r
- TCCR0A = (1 << WGM01);\r
- TCCR0B = (1 << CS01);\r
- TIMSK0 = (1 << OCIE0A);\r
-}\r
-\r
-void PDITarget_DisableTargetPDI(void)\r
-{\r
- /* Set DATA and CLOCK lines to inputs */\r
- BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
- BITBANG_PDICLOCK_DDR &= ~BITBANG_PDICLOCK_MASK;\r
- \r
- /* Tristate DATA and CLOCK lines */\r
- BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
- BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;\r
-\r
- TCCR0B = 0;\r
-}\r
-\r
-void PDITarget_SendByte(uint8_t Byte)\r
-{\r
- bool IsOddBitsSet = false;\r
- \r
- /* Compute Even parity bit */\r
- for (uint8_t i = 0; i < 8; i++)\r
- {\r
- if (Byte & (1 << i))\r
- IsOddBitsSet = !(IsOddBitsSet);\r
- }\r
-\r
- /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
- DataBits = ((uint16_t)IsOddBitsSet << 10) | ((uint16_t)Byte << 1) | (1 << 0);\r
-\r
- BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
- BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
-\r
- IsSending = true;\r
- BitCount = BITS_IN_FRAME;\r
- while (BitCount);\r
-\r
- BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
- BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
-}\r
-\r
-uint8_t PDITarget_ReceiveByte(void)\r
-{\r
- IsSending = false;\r
- BitCount = BITS_IN_FRAME;\r
- while (BitCount);\r
-\r
- return (DataBits >> 1);\r
-}\r
-\r
-void PDITarget_SendBreak(void)\r
-{\r
- DataBits = 0;\r
-\r
- BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
- BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
-\r
- IsSending = true;\r
- BitCount = BITS_IN_FRAME;\r
- while (BitCount);\r
-\r
- BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
- BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
-}\r
-#else\r
-void PDITarget_EnableTargetPDI(void)\r
-{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
/* Set Tx and XCK as outputs, Rx as input */\r
DDRD |= (1 << 5) | (1 << 3);\r
DDRD &= ~(1 << 2);\r
\r
- /* Set DATA line high for 90ns to disable /RESET functionality */\r
+ /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
PORTD |= (1 << 3);\r
asm volatile ("NOP"::);\r
asm volatile ("NOP"::);\r
/* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */\r
PDITarget_SendBreak();\r
PDITarget_SendBreak();\r
+#else\r
+ /* Set DATA and CLOCK lines to outputs */\r
+ BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;\r
+ \r
+ /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+ asm volatile ("NOP"::);\r
+ asm volatile ("NOP"::);\r
+\r
+ /* Fire timer compare ISR every 50 cycles to manage the software USART */\r
+ OCR0A = 50;\r
+ TCCR0A = (1 << WGM01);\r
+ TCCR0B = (1 << CS00);\r
+ TIMSK0 = (1 << OCIE0A);\r
+ \r
+ PDITarget_SendBreak();\r
+ PDITarget_SendBreak();\r
+#endif\r
}\r
\r
void PDITarget_DisableTargetPDI(void)\r
{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
/* Turn off receiver and transmitter of the USART, clear settings */\r
UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
UCSR1B = 0;\r
/* Set all USART lines as input, tristate */\r
DDRD &= ~((1 << 5) | (1 << 3));\r
PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
+#else\r
+ /* Set DATA and CLOCK lines to inputs */\r
+ BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDICLOCK_DDR &= ~BITBANG_PDICLOCK_MASK;\r
+ \r
+ /* Tristate DATA and CLOCK lines */\r
+ BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;\r
+\r
+ TCCR0B = 0;\r
+#endif\r
}\r
\r
void PDITarget_SendByte(uint8_t Byte)\r
{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
/* Switch to Tx mode if currently in Rx mode */\r
if (!(IsSending))\r
{\r
/* Wait until there is space in the hardware Tx buffer before writing */\r
while (!(UCSR1A & (1 << UDRE1)));\r
UDR1 = Byte;\r
+#else\r
+ /* Switch to Tx mode if currently in Rx mode */\r
+ if (!(IsSending))\r
+ {\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
+\r
+ IsSending = true;\r
+ }\r
+\r
+ bool EvenParityBit = false;\r
+ uint8_t ParityData = Byte;\r
+\r
+ /* Compute Even parity bit */\r
+ for (uint8_t i = 0; i < 8; i++)\r
+ {\r
+ EvenParityBit ^= ParityData & 0x01;\r
+ ParityData >>= 1;\r
+ }\r
+\r
+ while (SoftUSART_BitCount);\r
+\r
+ /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
+ SoftUSART_Data = ((uint16_t)EvenParityBit << 9) | ((uint16_t)Byte << 1) | (1 << 10) | (1 << 11);\r
+ SoftUSART_BitCount = BITS_IN_FRAME;\r
+#endif\r
}\r
\r
uint8_t PDITarget_ReceiveByte(void)\r
{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
/* Switch to Rx mode if currently in Tx mode */\r
if (IsSending)\r
{\r
/* Wait until a byte has been received before reading */\r
while (!(UCSR1A & (1 << RXC1)));\r
return UDR1;\r
+#else\r
+ /* Switch to Rx mode if currently in Tx mode */\r
+ if (IsSending)\r
+ {\r
+ while (SoftUSART_BitCount);\r
+\r
+ BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
+\r
+ IsSending = false;\r
+ }\r
+\r
+ /* Wait until a byte has been received before reading */\r
+ SoftUSART_BitCount = BITS_IN_FRAME;\r
+ while (SoftUSART_BitCount);\r
+ \r
+ /* Throw away the start, parity and stop bits to leave only the data */\r
+ return (uint8_t)(SoftUSART_Data >> 1);\r
+#endif\r
}\r
\r
void PDITarget_SendBreak(void)\r
{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
/* Switch to Tx mode if currently in Rx mode */\r
if (!(IsSending))\r
{\r
/* Need to do nothing for a full frame to send a BREAK */\r
for (uint8_t i = 0; i <= BITS_IN_FRAME; i++)\r
{\r
- /* Wait for rising edge of clock */\r
+ /* Wait for a full cycle of the clock */\r
while (PIND & (1 << 5));\r
- \r
- /* Wait for falling edge of clock */\r
while (!(PIND & (1 << 5)));\r
}\r
-}\r
+#else\r
+ /* Switch to Tx mode if currently in Rx mode */\r
+ if (!(IsSending))\r
+ {\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
+\r
+ IsSending = true;\r
+ }\r
+ \r
+ while (SoftUSART_BitCount);\r
+\r
+ /* Need to do nothing for a full frame to send a BREAK */\r
+ SoftUSART_Data = 0x0FFF;\r
+ SoftUSART_BitCount = BITS_IN_FRAME;\r
#endif\r
+}\r
+\r
+void PDITarget_SendAddress(uint32_t Address)\r
+{\r
+ PDITarget_SendByte(Address >> 24);\r
+ PDITarget_SendByte(Address >> 26);\r
+ PDITarget_SendByte(Address >> 8);\r
+ PDITarget_SendByte(Address & 0xFF);\r
+}\r
+\r
+bool PDITarget_WaitWhileNVMBusBusy(void)\r
+{\r
+ uint8_t AttemptsRemaining = 255;\r
+\r
+ /* Poll the STATUS register to check to see if NVM access has been enabled */\r
+ while (AttemptsRemaining--)\r
+ {\r
+ PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);\r
+ if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)\r
+ return true;\r
+ }\r
+ \r
+ return false;\r
+}\r
+\r
+void PDITarget_WaitWhileNVMControllerBusy(void)\r
+{\r
+ /* Poll the NVM STATUS register to check to see if NVM controller is busy */\r
+ for (;;)\r
+ {\r
+ PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_1BYTE << 2));\r
+ PDITarget_SendAddress(DATAMEM_BASE | DATAMEM_NVM_BASE | 0x0F);\r
+ \r
+ if (!(PDITarget_ReceiveByte() & (1 << 7)))\r
+ return;\r
+ }\r
+}\r
\r
#endif\r
\r
#define BITBANG_PDICLOCK_PORT RESET_LINE_PORT\r
#define BITBANG_PDICLOCK_DDR RESET_LINE_DDR\r
+ #define BITBANG_PDICLOCK_PIN RESET_LINE_PIN\r
#define BITBANG_PDICLOCK_MASK RESET_LINE_MASK\r
#endif\r
\r
- #define BITS_IN_FRAME 12\r
+ #define BITS_IN_FRAME 12\r
\r
- #define PDI_CMD_LDS 0x00\r
- #define PDI_CMD_LD 0x20\r
- #define PDI_CMD_STS 0x40\r
- #define PDI_CMD_ST 0x60\r
- #define PDI_CMD_LDCS 0x80\r
- #define PDI_CMD_REPEAT 0xA0\r
- #define PDI_CMD_STCS 0xC0\r
- #define PDI_CMD_KEY 0xE0\r
+ #define PDI_CMD_LDS 0x00\r
+ #define PDI_CMD_LD 0x20\r
+ #define PDI_CMD_STS 0x40\r
+ #define PDI_CMD_ST 0x60\r
+ #define PDI_CMD_LDCS 0x80\r
+ #define PDI_CMD_REPEAT 0xA0\r
+ #define PDI_CMD_STCS 0xC0\r
+ #define PDI_CMD_KEY 0xE0\r
\r
- #define PD_STATUS_REG 0\r
- #define PD_RESET_REG 1\r
- #define PD_CTRL_REG 2\r
+ #define PDI_STATUS_REG 0\r
+ #define PDI_RESET_REG 1\r
+ #define PDI_CTRL_REG 2\r
+ \r
+ #define PDI_STATUS_NVM (1 << 1)\r
+ #define PDI_RESET_KEY 0x59\r
+\r
+ #define PDI_NVMENABLE_KEY (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}\r
\r
- #define PDI_STATUS_NVM (1 << 1)\r
+ #define PDI_DATSIZE_1BYTE 0\r
+ #define PDI_DATSIZE_2BYTES 1\r
+ #define PDI_DATSIZE_3BYTES 2\r
+ #define PDI_DATSIZE_4BYTES 3\r
+ \r
+ #define PDI_POINTER_INDIRECT 0\r
+ #define PDI_POINTER_INDIRECT_PI 1\r
+ #define PDI_POINTER_DIRECT 2\r
\r
- #define PDI_RESET_KEY 0x59\r
- #define PDI_NVMENABLE_KEY (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}\r
+ #define FLASH_BASE 0x00800000\r
+ #define EPPROM_BASE 0x008C0000\r
+ #define FUSE_BASE 0x008F0020\r
+ #define DATAMEM_BASE 0x01000000\r
+ #define PROD_SIGNATURE_BASE 0x008E0200\r
+ #define USER_SIGNATURE_BASE 0x008E0400\r
\r
+ #define DATAMEM_NVM_BASE 0x01C0\r
+ \r
/* Function Prototypes: */\r
void PDITarget_EnableTargetPDI(void);\r
void PDITarget_DisableTargetPDI(void);\r
void PDITarget_SendByte(uint8_t Byte);\r
uint8_t PDITarget_ReceiveByte(void);\r
void PDITarget_SendBreak(void);\r
+ \r
+ void PDITarget_SendAddress(uint32_t Address);\r
+ bool PDITarget_WaitWhileNVMBusBusy(void);\r
+ void PDITarget_WaitWhileNVMControllerBusy(void);\r
\r
#endif\r
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