*\r
* \return Boolean true if the command sequence complete successfully\r
*/\r
-bool TINYNVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)\r
+bool TINYNVM_ReadMemory(const uint16_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)\r
{\r
/* Wait until the NVM controller is no longer busy */\r
if (!(TINYNVM_WaitWhileNVMControllerBusy()))\r
*\r
* \return Boolean true if the command sequence complete successfully\r
*/\r
-bool TINYNVM_WriteMemory(const uint32_t WriteAddress, const uint8_t* WriteBuffer, uint16_t WriteLength)\r
+bool TINYNVM_WriteMemory(const uint16_t WriteAddress, const uint8_t* WriteBuffer, uint16_t WriteLength)\r
{\r
/* Wait until the NVM controller is no longer busy */\r
if (!(TINYNVM_WaitWhileNVMControllerBusy()))\r
\r
/* Function Prototypes: */ \r
bool TINYNVM_WaitWhileNVMBusBusy(void);\r
- bool TINYNVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadLength);\r
- bool TINYNVM_WriteMemory(const uint32_t WriteAddress, const uint8_t* WriteBuffer, uint16_t WriteLength);\r
+ bool TINYNVM_ReadMemory(const uint16_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadLength);\r
+ bool TINYNVM_WriteMemory(const uint16_t WriteAddress, const uint8_t* WriteBuffer, uint16_t WriteLength);\r
bool TINYNVM_EraseMemory(void);\r
\r
#if defined(INCLUDE_FROM_TINYNVM_C)\r
}\r
\r
/** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */\r
-ISR(TIMER1_COMPB_vect, ISR_BLOCK)\r
+ISR(TIMER1_CAPT_vect, ISR_BLOCK)\r
{\r
/* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;\r
/* Set DATA line high for idle state */\r
BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
\r
- /* Fire timer capture channel B ISR to manage the software USART */\r
- OCR1B = BITS_BETWEEN_USART_CLOCKS;\r
- TCCR1B = (1 << WGM12) | (1 << CS10);\r
- TIMSK1 = (1 << OCIE1B);\r
+ /* Fire timer capture channel ISR to manage the software USART */\r
+ ICR1 = BITS_BETWEEN_USART_CLOCKS;\r
+ TCCR1B = (1 << WGM13) | (1 << WGM12) | (1 << CS10);\r
+ TIMSK1 = (1 << ICIE1);\r
#endif\r
\r
/* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r