Endpoint_ClearOUT();\r
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
\r
- PDIDATA_LINE_DDR |= PDIDATA_LINE_MASK;\r
- PDICLOCK_LINE_DDR |= PDICLOCK_LINE_MASK;\r
- \r
- /* Must hold DATA line high for at least 90nS to enable PDI interface */\r
- PDIDATA_LINE_PORT |= PDIDATA_LINE_MASK;\r
- asm volatile ("NOP"::);\r
- asm volatile ("NOP"::);\r
- \r
- /* Toggle CLOCK line 16 times within 100uS of the original 90nS timeout to keep PDI interface enabled */\r
- for (uint8_t i = 0; i < 16; i++)\r
- TOGGLE_PDI_CLOCK;\r
+ /* Enable PDI programming mode with the attached target */\r
+ PDITarget_EnableTargetPDI();\r
\r
+ /* Store the RESET ket into the RESET PDI register to complete the handshake */\r
+ PDITarget_SendByte(PDI_CMD_STCS | PD_RESET_REG); \r
+ PDITarget_SendByte(PDI_RESET_KEY);\r
+\r
/* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */\r
PDITarget_SendByte(PDI_CMD_KEY); \r
for (uint8_t i = 0; i < sizeof(PDI_NVMENABLE_KEY); i++)\r
Endpoint_ClearOUT();\r
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
\r
- /* Set DATA and CLOCK lines to inputs */\r
- PDIDATA_LINE_DDR &= ~PDIDATA_LINE_MASK;\r
- PDICLOCK_LINE_DDR &= ~PDICLOCK_LINE_MASK;\r
- \r
- /* Tristate DATA and CLOCK lines */\r
- PDIDATA_LINE_PORT &= ~PDIDATA_LINE_MASK;\r
- PDICLOCK_LINE_PORT &= ~PDICLOCK_LINE_MASK;\r
- \r
+ PDITarget_DisableTargetPDI();\r
+\r
Endpoint_Write_Byte(CMD_XPROG);\r
Endpoint_Write_Byte(XPRG_CMD_LEAVE_PROGMODE);\r
Endpoint_Write_Byte(XPRG_ERR_OK);\r
#define INCLUDE_FROM_PDITARGET_C\r
#include "PDITarget.h"\r
\r
-/** Writes a given byte to the attached XMEGA device, using a RS232 frame via software through the\r
- * PDI interface.\r
- *\r
- * \param[in] Byte Byte to send to the attached device\r
- */\r
-void PDITarget_SendByte(uint8_t Byte)\r
-{\r
- uint8_t LogicOneBits = 0;\r
+#if !defined(PDI_VIA_HARDWARE_USART)\r
+volatile bool IsSending;\r
+volatile uint16_t DataBits;\r
+volatile uint8_t BitCount;\r
\r
- // One Start Bit\r
- PDIDATA_LINE_PORT &= ~PDIDATA_LINE_MASK;\r
+ISR(TIMER0_COMPA_vect, ISR_BLOCK)\r
+{\r
+ BITBANG_PDICLOCK_PORT ^= BITBANG_PDICLOCK_MASK;\r
\r
- TOGGLE_PDI_CLOCK;\r
+ /* If not sending or receiving, just exit */\r
+ if (!(BitCount))\r
+ return;\r
\r
- // Eight Data Bits\r
- for (uint8_t i = 0; i < 8; i++)\r
+ /* Check to see if the current clock state is on the rising or falling edge */\r
+ bool IsRisingEdge = (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK);\r
+\r
+ if (IsSending && !IsRisingEdge)\r
{\r
- if (Byte & 0x01)\r
- {\r
- PDIDATA_LINE_PORT &= ~PDIDATA_LINE_MASK;\r
- LogicOneBits++;\r
- }\r
+ if (DataBits & 0x01)\r
+ BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
else\r
- {\r
- PDIDATA_LINE_PORT |= PDIDATA_LINE_MASK;\r
- }\r
- \r
- Byte >>= 1;\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK; \r
\r
- TOGGLE_PDI_CLOCK;\r
+ DataBits >>= 1;\r
+ BitCount--;\r
}\r
+ else if (!IsSending && IsRisingEdge)\r
+ {\r
+ /* Wait for the start bit when receiving */\r
+ if ((BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PORT & BITBANG_PDIDATA_MASK))\r
+ return;\r
+ \r
+ if (BITBANG_PDIDATA_PORT & BITBANG_PDIDATA_MASK)\r
+ DataBits |= (1 << (BITS_IN_FRAME - 1));\r
\r
- // Even Parity Bit\r
- if (LogicOneBits & 0x01)\r
- PDIDATA_LINE_PORT &= ~PDIDATA_LINE_MASK;\r
- else\r
- PDIDATA_LINE_PORT |= PDIDATA_LINE_MASK;\r
-\r
- TOGGLE_PDI_CLOCK;\r
+ DataBits >>= 1;\r
+ BitCount--;\r
+ }\r
+}\r
\r
- // Two Stop Bits\r
- PDIDATA_LINE_PORT |= PDIDATA_LINE_MASK;\r
+void PDITarget_EnableTargetPDI(void)\r
+{\r
+ /* Set DATA and CLOCK lines to outputs */\r
+ BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;\r
\r
- TOGGLE_PDI_CLOCK;\r
- TOGGLE_PDI_CLOCK;\r
+ /* Set DATA line high for 90ns to disable /RESET functionality */\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+ asm volatile ("NOP"::);\r
+ asm volatile ("NOP"::);\r
+\r
+ /* Fire timer compare ISR every 160 cycles */\r
+ OCR0A = 20;\r
+ TCCR0A = (1 << WGM01);\r
+ TCCR0B = (1 << CS01);\r
+ TIMSK0 = (1 << OCIE0A);\r
}\r
\r
-/** Reads a given byte from the attached XMEGA device, encoded in a RS232 frame through the PDI interface.\r
- *\r
- * \return Received byte from the attached device\r
- */\r
-uint8_t PDITarget_ReceiveByte(void)\r
+void PDITarget_DisableTargetPDI(void)\r
{\r
- uint8_t ReceivedByte = 0;\r
-\r
- PDIDATA_LINE_DDR &= ~PDIDATA_LINE_MASK;\r
+ /* Set DATA and CLOCK lines to inputs */\r
+ BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDICLOCK_DDR &= ~BITBANG_PDICLOCK_MASK;\r
+ \r
+ /* Tristate DATA and CLOCK lines */\r
+ BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;\r
\r
- // One Start Bit\r
- while (PDIDATA_LINE_PIN & PDIDATA_LINE_MASK);\r
- TOGGLE_PDI_CLOCK;\r
+ TCCR0B = 0;\r
+}\r
\r
- TOGGLE_PDI_CLOCK;\r
+void PDITarget_SendByte(uint8_t Byte)\r
+{\r
+ bool IsOddBitsSet = false;\r
\r
- // Eight Data Bits\r
+ /* Compute Even parity bit */\r
for (uint8_t i = 0; i < 8; i++)\r
{\r
- if (!(PDIDATA_LINE_PIN & PDIDATA_LINE_MASK))\r
- ReceivedByte |= 0x80;\r
+ if (Byte & (1 << i))\r
+ IsOddBitsSet = !(IsOddBitsSet);\r
+ }\r
\r
- ReceivedByte >>= 1;\r
+ /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
+ DataBits = ((uint16_t)IsOddBitsSet << 10) | ((uint16_t)Byte << 1) | (1 << 0);\r
\r
- TOGGLE_PDI_CLOCK; \r
- }\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
\r
- // Even Parity Bit (discarded)\r
- TOGGLE_PDI_CLOCK;\r
+ IsSending = true;\r
+ BitCount = BITS_IN_FRAME;\r
+ while (BitCount);\r
+\r
+ BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
+}\r
+\r
+uint8_t PDITarget_ReceiveByte(void)\r
+{\r
+ IsSending = false;\r
+ BitCount = BITS_IN_FRAME;\r
+ while (BitCount);\r
+\r
+ return (DataBits >> 1);\r
+}\r
\r
- // Two Stop Bits\r
- TOGGLE_PDI_CLOCK;\r
- TOGGLE_PDI_CLOCK;\r
+void PDITarget_SendBreak(void)\r
+{\r
+ DataBits = 0;\r
+\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
+\r
+ IsSending = true;\r
+ BitCount = BITS_IN_FRAME;\r
+ while (BitCount);\r
+\r
+ BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
+}\r
+#else\r
+void PDITarget_EnableTargetPDI(void)\r
+{\r
+ /* Set Tx and XCK as outputs, Rx as input */\r
+ DDRD |= (1 << 5) | (1 << 3);\r
+ DDRD &= ~(1 << 2);\r
\r
- PDIDATA_LINE_DDR |= PDIDATA_LINE_MASK;\r
+ /* Set DATA line high for 90ns to disable /RESET functionality */\r
+ PORTD |= (1 << 3);\r
+ asm volatile ("NOP"::);\r
+ asm volatile ("NOP"::);\r
\r
- return ReceivedByte;\r
+ /* Set up the synchronous USART for XMEGA communications - \r
+ 8 data bits, even parity, 2 stop bits */\r
+ UBRR1 = 10;\r
+ UCSR1B = (1 << TXEN1);\r
+ UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
+\r
+ PDITarget_SendBreak();\r
+ PDITarget_SendBreak();\r
}\r
\r
+void PDITarget_DisableTargetPDI(void)\r
+{\r
+ /* Turn of receiver and transmitter of the USART, clear settings */\r
+ UCSR1B = 0;\r
+ UCSR1C = 0;\r
+\r
+ /* Set all USART lines as input, tristate */\r
+ DDRD &= ~(1 << 5) | (1 << 3);\r
+ PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
+}\r
+\r
+void PDITarget_SendByte(uint8_t Byte)\r
+{\r
+ UCSR1B &= ~(1 << RXEN1);\r
+ UCSR1B |= (1 << TXEN1);\r
+\r
+ UDR1 = Byte;\r
+\r
+ while (!(UCSR1A & (1 << TXC1)));\r
+ UCSR1A |= (1 << TXC1);\r
+}\r
+\r
+uint8_t PDITarget_ReceiveByte(void)\r
+{\r
+ UCSR1B &= ~(1 << TXEN1);\r
+ UCSR1B |= (1 << RXEN1);\r
+\r
+ while (!(UCSR1A & (1 << RXC1)));\r
+ UCSR1A |= (1 << RXC1);\r
+ \r
+ return UDR1;\r
+}\r
+\r
+void PDITarget_SendBreak(void)\r
+{\r
+ UCSR1B &= ~(1 << RXEN1);\r
+ UCSR1B |= (1 << TXEN1);\r
+\r
+ for (uint8_t i = 0; i < BITS_IN_FRAME; i++)\r
+ {\r
+ while (PIND & (1 << 5));\r
+ while (!(PIND & (1 << 5)));\r
+ }\r
+}\r
+#endif\r
+\r
#endif\r
\r
/* Includes: */\r
#include <avr/io.h>\r
+ #include <avr/interrupt.h>\r
#include <stdbool.h>\r
\r
#include <LUFA/Common/Common.h>\r
\r
/* Defines: */\r
#if BOARD == BOARD_XPLAIN\r
- #define PDIDATA_LINE_PORT PORTD\r
- #define PDIDATA_LINE_DDR DDRD\r
- #define PDIDATA_LINE_PIN PIND\r
- #define PDIDATA_LINE_MASK (1 << 2)\r
- \r
- #define PDICLOCK_LINE_PORT PORTD\r
- #define PDICLOCK_LINE_DDR DDRD\r
- #define PDICLOCK_LINE_MASK (1 << 5)\r
+ #define PDI_VIA_HARDWARE_USART\r
#else\r
- #define PDIDATA_LINE_PORT PORTB\r
- #define PDIDATA_LINE_DDR DDRB\r
- #define PDIDATA_LINE_PIN PINB\r
- #define PDIDATA_LINE_MASK (1 << 3)\r
+ #define BITBANG_PDIDATA_PORT PORTB\r
+ #define BITBANG_PDIDATA_DDR DDRB\r
+ #define BITBANG_PDIDATA_PIN PINB\r
+ #define BITBANG_PDIDATA_MASK (1 << 3)\r
\r
- #define PDICLOCK_LINE_PORT RESET_LINE_PORT\r
- #define PDICLOCK_LINE_DDR RESET_LINE_DDR\r
- #define PDICLOCK_LINE_MASK RESET_LINE_MASK\r
+ #define BITBANG_PDICLOCK_PORT RESET_LINE_PORT\r
+ #define BITBANG_PDICLOCK_DDR RESET_LINE_DDR\r
+ #define BITBANG_PDICLOCK_MASK RESET_LINE_MASK\r
#endif\r
\r
+ #define BITS_IN_FRAME 12\r
+ \r
#define PDI_CMD_LDS 0x00\r
#define PDI_CMD_LD 0x20\r
#define PDI_CMD_STS 0x40\r
\r
#define PDI_RESET_KEY 0x59\r
#define PDI_NVMENABLE_KEY (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}\r
-\r
- #define TOGGLE_PDI_CLOCK MACROS{ PDICLOCK_LINE_PORT ^= PDICLOCK_LINE_MASK; \\r
- asm volatile ("NOP" ::); \\r
- PDICLOCK_LINE_PORT ^= PDICLOCK_LINE_MASK; \\r
- asm volatile ("NOP" ::); }MACROE\r
\r
/* Function Prototypes: */\r
+ void PDITarget_EnableTargetPDI(void);\r
+ void PDITarget_DisableTargetPDI(void);\r
void PDITarget_SendByte(uint8_t Byte);\r
uint8_t PDITarget_ReceiveByte(void);\r
+ void PDITarget_SendBreak(void);\r
\r
#endif\r