PDI NVM enable is fast enough that bare polling is enough without a fixed delay in...

diff --git a/Projects/AVRISP/Lib/PDIProtocol.c b/Projects/AVRISP/Lib/PDIProtocol.c
index 32a74c5..2107e2b 100644 (file)
--- a/Projects/AVRISP/Lib/PDIProtocol.c
+++ b/Projects/AVRISP/Lib/PDIProtocol.c
@@ -115,11 +115,9 @@ static void PDIProtocol_EnterXPROGMode(void)
          PDITarget_SendByte(PDI_NVMENABLE_KEY[i - 1]);\r
 \r
        /* Poll the STATUS register to check to see if NVM access has been enabled */\r
-       uint8_t NVMAttemptsRemaining = 150;\r
+       uint8_t NVMAttemptsRemaining = 255;\r
        while (NVMAttemptsRemaining)\r
        {\r
-               _delay_ms(1);\r
-\r
                PDITarget_SendByte(PDI_CMD_LDCS | PD_STATUS_REG);\r
                if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)\r
                  break;\r

diff --git a/Projects/AVRISP/Lib/PDITarget.c b/Projects/AVRISP/Lib/PDITarget.c
index 22a4d01..eb16e0a 100644 (file)
--- a/Projects/AVRISP/Lib/PDITarget.c
+++ b/Projects/AVRISP/Lib/PDITarget.c
@@ -173,6 +173,7 @@ void PDITarget_EnableTargetPDI(void)
        /* Set up the synchronous USART for XMEGA communications - \r
           8 data bits, even parity, 2 stop bits */\r
        UBRR1  = 10;\r
+       UCSR1B = (1 << TXEN1);\r
        UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
 \r
        /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */\r
@@ -182,9 +183,10 @@ void PDITarget_EnableTargetPDI(void)
 \r
 void PDITarget_DisableTargetPDI(void)\r
 {\r
-       /* Turn of receiver and transmitter of the USART, clear settings */\r
-       UCSR1B = 0;\r
-       UCSR1C = 0;\r
+       /* Turn off receiver and transmitter of the USART, clear settings */\r
+       UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
+       UCSR1B  = 0;\r
+       UCSR1C  = 0;\r
 \r
        /* Set all USART lines as input, tristate */\r
        DDRD  &= ~((1 << 5) | (1 << 3));\r