3      Copyright (C) Dean Camera, 2018. 
   5   dean [at] fourwalledcubicle [dot] com 
  10   Copyright 2018  Dean Camera (dean [at] fourwalledcubicle [dot] com) 
  12   Permission to use, copy, modify, distribute, and sell this 
  13   software and its documentation for any purpose is hereby granted 
  14   without fee, provided that the above copyright notice appear in 
  15   all copies and that both that the copyright notice and this 
  16   permission notice and warranty disclaimer appear in supporting 
  17   documentation, and that the name of the author not be used in 
  18   advertising or publicity pertaining to distribution of the 
  19   software without specific, written prior permission. 
  21   The author disclaims all warranties with regard to this 
  22   software, including all implied warranties of merchantability 
  23   and fitness.  In no event shall the author be liable for any 
  24   special, indirect or consequential damages or any damages 
  25   whatsoever resulting from loss of use, data or profits, whether 
  26   in an action of contract, negligence or other tortious action, 
  27   arising out of or in connection with the use or performance of 
  33  *  Target-related functions for the PDI Protocol decoder. 
  36 #define  INCLUDE_FROM_XPROGTARGET_C 
  37 #include "XPROGTarget.h" 
  39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__) 
  41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */ 
  42 static bool IsSending
; 
  44 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */ 
  45 void XPROGTarget_EnableTargetPDI(void) 
  49         /* Set Tx and XCK as outputs, Rx as input */ 
  50         DDRD 
|=  (1 << 5) | (1 << 3); 
  53         /* Set Tx (PDI CLOCK) high, DATA line low for at least 90ns to disable /RESET functionality */ 
  58         /* Set DATA line high (enables PDI interface after 16 PDI CLK cycles) */ 
  62         /* Set up the synchronous USART for XMEGA communications - 8 data bits, even parity, 2 stop bits */ 
  63         UBRR1  
= ((F_CPU 
/ 2 / XPROG_HARDWARE_SPEED
) - 1); 
  64         UCSR1B 
= (1 << TXEN1
); 
  65         UCSR1C 
= (1 << UMSEL10
) | (1 << UPM11
) | (1 << USBS1
) | (1 << UCSZ11
) | (1 << UCSZ10
) | (1 << UCPOL1
); 
  67         /* Send two IDLEs of 12 bits each to enable PDI interface (need at least 16 idle bits) */ 
  68         XPROGTarget_SendIdle(); 
  69         XPROGTarget_SendIdle(); 
  72 /** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */ 
  73 void XPROGTarget_EnableTargetTPI(void) 
  77         /* Set /RESET line low for at least 400ns to enable TPI functionality */ 
  78         AUX_LINE_DDR  
|=  AUX_LINE_MASK
; 
  79         AUX_LINE_PORT 
&= ~AUX_LINE_MASK
; 
  82         /* Set Tx and XCK as outputs, Rx as input */ 
  83         DDRD 
|=  (1 << 5) | (1 << 3); 
  86         /* Set up the synchronous USART for TPI communications - 8 data bits, even parity, 2 stop bits */ 
  87         UBRR1  
= ((F_CPU 
/ 2 / XPROG_HARDWARE_SPEED
) - 1); 
  88         UCSR1B 
= (1 << TXEN1
); 
  89         UCSR1C 
= (1 << UMSEL10
) | (1 << UPM11
) | (1 << USBS1
) | (1 << UCSZ11
) | (1 << UCSZ10
) | (1 << UCPOL1
); 
  91         /* Send two IDLEs of 12 bits each to enable TPI interface (need at least 16 idle bits) */ 
  92         XPROGTarget_SendIdle(); 
  93         XPROGTarget_SendIdle(); 
  96 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */ 
  97 void XPROGTarget_DisableTargetPDI(void) 
  99         /* Switch to Rx mode to ensure that all pending transmissions are complete */ 
 101           XPROGTarget_SetRxMode(); 
 103         /* Turn off receiver and transmitter of the USART, clear settings */ 
 104         UCSR1A  
= ((1 << TXC1
) | (1 << RXC1
)); 
 108         /* Tristate all pins */ 
 109         DDRD  
&= ~((1 << 5) | (1 << 3)); 
 110         PORTD 
&= ~((1 << 5) | (1 << 3) | (1 << 2)); 
 113 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */ 
 114 void XPROGTarget_DisableTargetTPI(void) 
 116         /* Switch to Rx mode to ensure that all pending transmissions are complete */ 
 118           XPROGTarget_SetRxMode(); 
 120         /* Turn off receiver and transmitter of the USART, clear settings */ 
 121         UCSR1A 
|= (1 << TXC1
) | (1 << RXC1
); 
 125         /* Set all USART lines as inputs, tristate */ 
 126         DDRD  
&= ~((1 << 5) | (1 << 3)); 
 127         PORTD 
&= ~((1 << 5) | (1 << 3) | (1 << 2)); 
 129         /* Tristate target /RESET line */ 
 130         AUX_LINE_DDR  
&= ~AUX_LINE_MASK
; 
 131         AUX_LINE_PORT 
&= ~AUX_LINE_MASK
; 
 134 /** Sends a byte via the USART. 
 136  *  \param[in] Byte  Byte to send through the USART 
 138 void XPROGTarget_SendByte(const uint8_t Byte
) 
 140         /* Switch to Tx mode if currently in Rx mode */ 
 142           XPROGTarget_SetTxMode(); 
 144         /* Wait until there is space in the hardware Tx buffer before writing */ 
 145         while (!(UCSR1A 
& (1 << UDRE1
))); 
 146         UCSR1A 
|= (1 << TXC1
); 
 150 /** Receives a byte via the hardware USART, blocking until data is received or timeout expired. 
 152  *  \return Received byte from the USART 
 154 uint8_t XPROGTarget_ReceiveByte(void) 
 156         /* Switch to Rx mode if currently in Tx mode */ 
 158           XPROGTarget_SetRxMode(); 
 160         /* Wait until a byte has been received before reading */ 
 161         while (!(UCSR1A 
& (1 << RXC1
)) && TimeoutTicksRemaining
); 
 166 /** Sends an IDLE via the USART to the attached target, consisting of a full frame of idle bits. */ 
 167 void XPROGTarget_SendIdle(void) 
 169         /* Switch to Tx mode if currently in Rx mode */ 
 171           XPROGTarget_SetTxMode(); 
 173         /* Need to do nothing for a full frame to send an IDLE */ 
 174         for (uint8_t i 
= 0; i 
< BITS_IN_USART_FRAME
; i
++) 
 176                 /* Wait for a full cycle of the clock */ 
 177                 while (PIND 
& (1 << 5)); 
 178                 while (!(PIND 
& (1 << 5))); 
 179                 while (PIND 
& (1 << 5)); 
 183 static void XPROGTarget_SetTxMode(void) 
 185         /* Wait for a full cycle of the clock */ 
 186         while (PIND 
& (1 << 5)); 
 187         while (!(PIND 
& (1 << 5))); 
 188         while (PIND 
& (1 << 5)); 
 193         UCSR1B 
&= ~(1 << RXEN1
); 
 194         UCSR1B 
|=  (1 << TXEN1
); 
 199 static void XPROGTarget_SetRxMode(void) 
 201         while (!(UCSR1A 
& (1 << TXC1
))); 
 202         UCSR1A 
|=  (1 << TXC1
); 
 204         UCSR1B 
&= ~(1 << TXEN1
); 
 205         UCSR1B 
|=  (1 << RXEN1
);