Clean up and add more comments to the AVRISP-MKII project. Make sure the SPI_MULTI...
[pub/lufa.git] / Projects / AVRISP-MKII / Lib / XPROG / XPROGTarget.c
1 /*
2 LUFA Library
3 Copyright (C) Dean Camera, 2010.
4
5 dean [at] fourwalledcubicle [dot] com
6 www.fourwalledcubicle.com
7 */
8
9 /*
10 Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)
11
12 Permission to use, copy, modify, distribute, and sell this
13 software and its documentation for any purpose is hereby granted
14 without fee, provided that the above copyright notice appear in
15 all copies and that both that the copyright notice and this
16 permission notice and warranty disclaimer appear in supporting
17 documentation, and that the name of the author not be used in
18 advertising or publicity pertaining to distribution of the
19 software without specific, written prior permission.
20
21 The author disclaim all warranties with regard to this
22 software, including all implied warranties of merchantability
23 and fitness. In no event shall the author be liable for any
24 special, indirect or consequential damages or any damages
25 whatsoever resulting from loss of use, data or profits, whether
26 in an action of contract, negligence or other tortious action,
27 arising out of or in connection with the use or performance of
28 this software.
29 */
30
31 /** \file
32 *
33 * Target-related functions for the PDI Protocol decoder.
34 */
35
36 #define INCLUDE_FROM_XPROGTARGET_C
37 #include "XPROGTarget.h"
38
39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
40
41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
42 volatile bool IsSending;
43
44 #if !defined(XPROG_VIA_HARDWARE_USART)
45 /** Software USART raw frame bits for transmission/reception. */
46 volatile uint16_t SoftUSART_Data;
47
48 /** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
49 #define SoftUSART_BitCount GPIOR2
50
51
52 /** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */
53 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
54 {
55 /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
56 BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;
57
58 /* If not sending or receiving, just exit */
59 if (!(SoftUSART_BitCount))
60 return;
61
62 /* Check to see if we are at a rising or falling edge of the clock */
63 if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)
64 {
65 /* If at rising clock edge and we are in send mode, abort */
66 if (IsSending)
67 return;
68
69 /* Wait for the start bit when receiving */
70 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
71 return;
72
73 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
74 * be discarded leaving the data to be byte-aligned for quick access */
75 if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)
76 ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
77
78 SoftUSART_Data >>= 1;
79 SoftUSART_BitCount--;
80 }
81 else
82 {
83 /* If at falling clock edge and we are in receive mode, abort */
84 if (!IsSending)
85 return;
86
87 /* Set the data line to the next bit value */
88 if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
89 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
90 else
91 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
92
93 SoftUSART_Data >>= 1;
94 SoftUSART_BitCount--;
95 }
96 }
97
98 /** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */
99 ISR(TIMER1_COMPB_vect, ISR_BLOCK)
100 {
101 /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
102 BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;
103
104 /* If not sending or receiving, just exit */
105 if (!(SoftUSART_BitCount))
106 return;
107
108 /* Check to see if we are at a rising or falling edge of the clock */
109 if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)
110 {
111 /* If at rising clock edge and we are in send mode, abort */
112 if (IsSending)
113 return;
114
115 /* Wait for the start bit when receiving */
116 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))
117 return;
118
119 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
120 * be discarded leaving the data to be byte-aligned for quick access */
121 if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)
122 ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
123
124 SoftUSART_Data >>= 1;
125 SoftUSART_BitCount--;
126 }
127 else
128 {
129 /* If at falling clock edge and we are in receive mode, abort */
130 if (!IsSending)
131 return;
132
133 /* Set the data line to the next bit value */
134 if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
135 BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
136 else
137 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
138
139 SoftUSART_Data >>= 1;
140 SoftUSART_BitCount--;
141 }
142 }
143 #endif
144
145 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
146 void XPROGTarget_EnableTargetPDI(void)
147 {
148 IsSending = false;
149
150 #if defined(XPROG_VIA_HARDWARE_USART)
151 /* Set Tx and XCK as outputs, Rx as input */
152 DDRD |= (1 << 5) | (1 << 3);
153 DDRD &= ~(1 << 2);
154
155 /* Set DATA line high for at least 90ns to disable /RESET functionality */
156 PORTD |= (1 << 3);
157 asm volatile ("NOP"::);
158 asm volatile ("NOP"::);
159
160 /* Set up the synchronous USART for XMEGA communications -
161 8 data bits, even parity, 2 stop bits */
162 UBRR1 = (F_CPU / 500000UL);
163 UCSR1B = (1 << TXEN1);
164 UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
165 #else
166 /* Set DATA and CLOCK lines to outputs */
167 BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;
168 BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
169
170 /* Set DATA line high for at least 90ns to disable /RESET functionality */
171 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
172 asm volatile ("NOP"::);
173 asm volatile ("NOP"::);
174
175 /* Fire timer compare channel A ISR to manage the software USART */
176 OCR1A = BITS_BETWEEN_USART_CLOCKS;
177 TCCR1B = (1 << WGM12) | (1 << CS10);
178 TIMSK1 = (1 << OCIE1A);
179 #endif
180
181 /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
182 XPROGTarget_SendBreak();
183 XPROGTarget_SendBreak();
184 }
185
186 /** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
187 void XPROGTarget_EnableTargetTPI(void)
188 {
189 IsSending = false;
190
191 /* Set /RESET line low for at least 90ns to enable TPI functionality */
192 AUX_LINE_DDR |= AUX_LINE_MASK;
193 AUX_LINE_PORT &= ~AUX_LINE_MASK;
194 asm volatile ("NOP"::);
195 asm volatile ("NOP"::);
196
197 #if defined(XPROG_VIA_HARDWARE_USART)
198 /* Set Tx and XCK as outputs, Rx as input */
199 DDRD |= (1 << 5) | (1 << 3);
200 DDRD &= ~(1 << 2);
201
202 /* Set up the synchronous USART for XMEGA communications -
203 8 data bits, even parity, 2 stop bits */
204 UBRR1 = (F_CPU / 500000UL);
205 UCSR1B = (1 << TXEN1);
206 UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
207 #else
208 /* Set DATA and CLOCK lines to outputs */
209 BITBANG_TPIDATA_DDR |= BITBANG_TPIDATA_MASK;
210 BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;
211
212 /* Set DATA line high for idle state */
213 BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
214
215 /* Fire timer capture channel B ISR to manage the software USART */
216 OCR1B = BITS_BETWEEN_USART_CLOCKS;
217 TCCR1B = (1 << WGM12) | (1 << CS10);
218 TIMSK1 = (1 << OCIE1B);
219 #endif
220
221 /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
222 XPROGTarget_SendBreak();
223 XPROGTarget_SendBreak();
224 }
225
226 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
227 void XPROGTarget_DisableTargetPDI(void)
228 {
229 /* Switch to Rx mode to ensure that all pending transmissions are complete */
230 XPROGTarget_SetRxMode();
231
232 #if defined(XPROG_VIA_HARDWARE_USART)
233 /* Turn off receiver and transmitter of the USART, clear settings */
234 UCSR1A |= (1 << TXC1) | (1 << RXC1);
235 UCSR1B = 0;
236 UCSR1C = 0;
237
238 /* Set all USART lines as input, tristate */
239 DDRD &= ~((1 << 5) | (1 << 3));
240 PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
241 #else
242 /* Set DATA and CLOCK lines to inputs */
243 BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;
244 BITBANG_PDICLOCK_DDR &= ~BITBANG_PDICLOCK_MASK;
245
246 /* Tristate DATA and CLOCK lines */
247 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
248 BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
249 #endif
250 }
251
252 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */
253 void XPROGTarget_DisableTargetTPI(void)
254 {
255 /* Switch to Rx mode to ensure that all pending transmissions are complete */
256 XPROGTarget_SetRxMode();
257
258 #if defined(XPROG_VIA_HARDWARE_USART)
259 /* Turn off receiver and transmitter of the USART, clear settings */
260 UCSR1A |= (1 << TXC1) | (1 << RXC1);
261 UCSR1B = 0;
262 UCSR1C = 0;
263
264 /* Set all USART lines as input, tristate */
265 DDRD &= ~((1 << 5) | (1 << 3));
266 PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
267 #else
268 /* Set DATA and CLOCK lines to inputs */
269 BITBANG_TPIDATA_DDR &= ~BITBANG_TPIDATA_MASK;
270 BITBANG_TPICLOCK_DDR &= ~BITBANG_TPICLOCK_MASK;
271
272 /* Tristate DATA and CLOCK lines */
273 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
274 BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;
275 #endif
276
277 /* Tristate target /RESET line */
278 AUX_LINE_DDR &= ~AUX_LINE_MASK;
279 AUX_LINE_PORT &= ~AUX_LINE_MASK;
280 }
281
282 /** Sends a byte via the USART.
283 *
284 * \param[in] Byte Byte to send through the USART
285 */
286 void XPROGTarget_SendByte(const uint8_t Byte)
287 {
288 /* Switch to Tx mode if currently in Rx mode */
289 if (!(IsSending))
290 XPROGTarget_SetTxMode();
291
292 #if defined(XPROG_VIA_HARDWARE_USART)
293 /* Wait until there is space in the hardware Tx buffer before writing */
294 while (!(UCSR1A & (1 << UDRE1)));
295 UCSR1A |= (1 << TXC1);
296 UDR1 = Byte;
297 #else
298 /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */
299 uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));
300
301 /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */
302 uint8_t ParityData = Byte;
303 while (ParityData)
304 {
305 NewUSARTData ^= (1 << 9);
306 ParityData &= (ParityData - 1);
307 }
308
309 /* Wait until transmitter is idle before writing new data */
310 while (SoftUSART_BitCount);
311
312 /* Data shifted out LSB first, START DATA PARITY STOP STOP */
313 SoftUSART_Data = NewUSARTData;
314 SoftUSART_BitCount = BITS_IN_USART_FRAME;
315 #endif
316 }
317
318 /** Receives a byte via the software USART, blocking until data is received.
319 *
320 * \return Received byte from the USART
321 */
322 uint8_t XPROGTarget_ReceiveByte(void)
323 {
324 /* Switch to Rx mode if currently in Tx mode */
325 if (IsSending)
326 XPROGTarget_SetRxMode();
327
328 #if defined(XPROG_VIA_HARDWARE_USART)
329 /* Wait until a byte has been received before reading */
330 while (!(UCSR1A & (1 << RXC1)) && TimeoutMSRemaining);
331 return UDR1;
332 #else
333 /* Wait until a byte has been received before reading */
334 SoftUSART_BitCount = BITS_IN_USART_FRAME;
335 while (SoftUSART_BitCount && TimeoutMSRemaining);
336
337 /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */
338 return (uint8_t)SoftUSART_Data;
339 #endif
340 }
341
342 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
343 void XPROGTarget_SendBreak(void)
344 {
345 /* Switch to Tx mode if currently in Rx mode */
346 if (!(IsSending))
347 XPROGTarget_SetTxMode();
348
349 #if defined(XPROG_VIA_HARDWARE_USART)
350 /* Need to do nothing for a full frame to send a BREAK */
351 for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
352 {
353 /* Wait for a full cycle of the clock */
354 while (PIND & (1 << 5));
355 while (!(PIND & (1 << 5)));
356 }
357 #else
358 while (SoftUSART_BitCount);
359
360 /* Need to do nothing for a full frame to send a BREAK */
361 SoftUSART_Data = 0x0FFF;
362 SoftUSART_BitCount = BITS_IN_USART_FRAME;
363 #endif
364 }
365
366 static void XPROGTarget_SetTxMode(void)
367 {
368 #if defined(XPROG_VIA_HARDWARE_USART)
369 /* Wait for a full cycle of the clock */
370 while (PIND & (1 << 5));
371 while (!(PIND & (1 << 5)));
372
373 PORTD |= (1 << 3);
374 DDRD |= (1 << 3);
375
376 UCSR1B &= ~(1 << RXEN1);
377 UCSR1B |= (1 << TXEN1);
378
379 IsSending = true;
380 #else
381 while (SoftUSART_BitCount);
382
383 /* Wait for a full cycle of the clock */
384 SoftUSART_Data = 0x0001;
385 SoftUSART_BitCount = 1;
386 while (SoftUSART_BitCount);
387
388 if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
389 {
390 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
391 BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;
392 }
393 else
394 {
395 BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
396 BITBANG_TPIDATA_DDR |= BITBANG_TPIDATA_MASK;
397 }
398 #endif
399
400 IsSending = true;
401 }
402
403 static void XPROGTarget_SetRxMode(void)
404 {
405 #if defined(XPROG_VIA_HARDWARE_USART)
406 while (!(UCSR1A & (1 << TXC1)));
407 UCSR1A |= (1 << TXC1);
408
409 UCSR1B &= ~(1 << TXEN1);
410 UCSR1B |= (1 << RXEN1);
411
412 DDRD &= ~(1 << 3);
413 PORTD &= ~(1 << 3);
414 #else
415 while (SoftUSART_BitCount);
416
417 if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
418 {
419 BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;
420 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
421 }
422 else
423 {
424 BITBANG_TPIDATA_DDR &= ~BITBANG_TPIDATA_MASK;
425 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
426 }
427
428 /* Wait until DATA line has been pulled up to idle by the target */
429 while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK) && TimeoutMSRemaining);
430 #endif
431
432 IsSending = false;
433 }
434
435 #endif