Make sure that the NVM bus/controller busy waits in the AVRISP MKII clone project...
[pub/lufa.git] / Projects / AVRISP-MKII / Lib / XPROG / XMEGANVM.c
1 /*
2 LUFA Library
3 Copyright (C) Dean Camera, 2010.
4
5 dean [at] fourwalledcubicle [dot] com
6 www.fourwalledcubicle.com
7 */
8
9 /*
10 Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)
11
12 Permission to use, copy, modify, distribute, and sell this
13 software and its documentation for any purpose is hereby granted
14 without fee, provided that the above copyright notice appear in
15 all copies and that both that the copyright notice and this
16 permission notice and warranty disclaimer appear in supporting
17 documentation, and that the name of the author not be used in
18 advertising or publicity pertaining to distribution of the
19 software without specific, written prior permission.
20
21 The author disclaim all warranties with regard to this
22 software, including all implied warranties of merchantability
23 and fitness. In no event shall the author be liable for any
24 special, indirect or consequential damages or any damages
25 whatsoever resulting from loss of use, data or profits, whether
26 in an action of contract, negligence or other tortious action,
27 arising out of or in connection with the use or performance of
28 this software.
29 */
30
31 /** \file
32 *
33 * Target-related functions for the XMEGA target's NVM module.
34 */
35
36 #define INCLUDE_FROM_XMEGA_NVM_C
37 #include "XMEGANVM.h"
38
39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
40
41 /** Sends the given 32-bit absolute address to the target.
42 *
43 * \param[in] AbsoluteAddress Absolute address to send to the target
44 */
45 static void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)
46 {
47 /* Send the given 32-bit address to the target, LSB first */
48 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[0]);
49 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[1]);
50 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[2]);
51 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[3]);
52 }
53
54 /** Sends the given NVM register address to the target.
55 *
56 * \param[in] Register NVM register whose absolute address is to be sent
57 */
58 static void XMEGANVM_SendNVMRegAddress(const uint8_t Register)
59 {
60 /* Determine the absolute register address from the NVM base memory address and the NVM register address */
61 uint32_t Address = XPROG_Param_NVMBase | Register;
62
63 /* Send the calculated 32-bit address to the target, LSB first */
64 XMEGANVM_SendAddress(Address);
65 }
66
67 /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC
68 * calculation.
69 *
70 * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
71 */
72 bool XMEGANVM_WaitWhileNVMBusBusy(void)
73 {
74 /* Poll the STATUS register to check to see if NVM access has been enabled */
75 while (TimeoutMSRemaining)
76 {
77 /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */
78 XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
79
80 uint8_t StatusRegister = XPROGTarget_ReceiveByte();
81
82 /* We might have timed out waiting for the status register read response, check here */
83 if (!(TimeoutMSRemaining))
84 return false;
85
86 /* Check the status register read response to see if the NVM bus is enabled */
87 if (StatusRegister & PDI_STATUS_NVM)
88 {
89 TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
90 return true;
91 }
92
93 /* Manage software timeout */
94 if (TIFR0 & (1 << OCF0A))
95 {
96 TIFR0 |= (1 << OCF0A);
97 TimeoutMSRemaining--;
98 }
99 }
100
101 return false;
102 }
103
104 /** Waits while the target's NVM controller is busy performing an operation, exiting if the
105 * timeout period expires.
106 *
107 * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
108 */
109 bool XMEGANVM_WaitWhileNVMControllerBusy(void)
110 {
111 /* Poll the NVM STATUS register while the NVM controller is busy */
112 while (TimeoutMSRemaining)
113 {
114 /* Send a LDS command to read the NVM STATUS register to check the BUSY flag */
115 XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
116 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_STATUS);
117
118 uint8_t StatusRegister = XPROGTarget_ReceiveByte();
119
120 /* We might have timed out waiting for the status register read response, check here */
121 if (!(TimeoutMSRemaining))
122 return false;
123
124 /* Check to see if the BUSY flag is still set */
125 if (!(StatusRegister & (1 << 7)))
126 {
127 TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
128 return true;
129 }
130
131 /* Manage software timeout */
132 if (TIFR0 & (1 << OCF0A))
133 {
134 TIFR0 |= (1 << OCF0A);
135 TimeoutMSRemaining--;
136 }
137 }
138
139 return false;
140 }
141
142 /** Retrieves the CRC value of the given memory space.
143 *
144 * \param[in] CRCCommand NVM CRC command to issue to the target
145 * \param[out] CRCDest CRC Destination when read from the target
146 *
147 * \return Boolean true if the command sequence complete successfully
148 */
149 bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
150 {
151 /* Wait until the NVM controller is no longer busy */
152 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
153 return false;
154
155 /* Set the NVM command to the correct CRC read command */
156 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
157 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
158 XPROGTarget_SendByte(CRCCommand);
159
160 /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
161 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
162 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
163 XPROGTarget_SendByte(1 << 0);
164
165 /* Wait until the NVM bus is ready again */
166 if (!(XMEGANVM_WaitWhileNVMBusBusy()))
167 return false;
168
169 /* Wait until the NVM controller is no longer busy */
170 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
171 return false;
172
173 /* Load the PDI pointer register with the DAT0 register start address */
174 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
175 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0);
176
177 /* Send the REPEAT command to grab the CRC bytes */
178 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
179 XPROGTarget_SendByte(XMEGA_CRC_LENGTH - 1);
180
181 /* Read in the CRC bytes from the target */
182 XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
183 for (uint8_t i = 0; i < XMEGA_CRC_LENGTH; i++)
184 ((uint8_t*)CRCDest)[i] = XPROGTarget_ReceiveByte();
185
186 return true;
187 }
188
189 /** Reads memory from the target's memory spaces.
190 *
191 * \param[in] ReadAddress Start address to read from within the target's address space
192 * \param[out] ReadBuffer Buffer to store read data into
193 * \param[in] ReadSize Number of bytes to read
194 *
195 * \return Boolean true if the command sequence complete successfully
196 */
197 bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)
198 {
199 /* Wait until the NVM controller is no longer busy */
200 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
201 return false;
202
203 /* Send the READNVM command to the NVM controller for reading of an arbitrary location */
204 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
205 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
206 XPROGTarget_SendByte(XMEGA_NVM_CMD_READNVM);
207
208 /* Load the PDI pointer register with the start address we want to read from */
209 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
210 XMEGANVM_SendAddress(ReadAddress);
211
212 /* Send the REPEAT command with the specified number of bytes to read */
213 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
214 XPROGTarget_SendByte(ReadSize - 1);
215
216 /* Send a LD command with indirect access and postincrement to read out the bytes */
217 XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
218 while (ReadSize--)
219 *(ReadBuffer++) = XPROGTarget_ReceiveByte();
220
221 return true;
222 }
223
224 /** Writes byte addressed memory to the target's memory spaces.
225 *
226 * \param[in] WriteCommand Command to send to the device to write each memory byte
227 * \param[in] WriteAddress Address to write to within the target's address space
228 * \param[in] Byte Byte to write to the target
229 *
230 * \return Boolean true if the command sequence complete successfully
231 */
232 bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t Byte)
233 {
234 /* Wait until the NVM controller is no longer busy */
235 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
236 return false;
237
238 /* Send the memory write command to the target */
239 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
240 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
241 XPROGTarget_SendByte(WriteCommand);
242
243 /* Send new memory byte to the memory to the target */
244 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
245 XMEGANVM_SendAddress(WriteAddress);
246 XPROGTarget_SendByte(Byte);
247
248 return true;
249 }
250
251 /** Writes page addressed memory to the target's memory spaces.
252 *
253 * \param[in] WriteBuffCommand Command to send to the device to write a byte to the memory page buffer
254 * \param[in] EraseBuffCommand Command to send to the device to erase the memory page buffer
255 * \param[in] WritePageCommand Command to send to the device to write the page buffer to the destination memory
256 * \param[in] PageMode Bitfield indicating what operations need to be executed on the specified page
257 * \param[in] WriteAddress Start address to write the page data to within the target's address space
258 * \param[in] WriteBuffer Buffer to source data from
259 * \param[in] WriteSize Number of bytes to write
260 *
261 * \return Boolean true if the command sequence complete successfully
262 */
263 bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,
264 const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,
265 const uint8_t* WriteBuffer, uint16_t WriteSize)
266 {
267 if (PageMode & XPRG_PAGEMODE_ERASE)
268 {
269 /* Wait until the NVM controller is no longer busy */
270 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
271 return false;
272
273 /* Send the memory buffer erase command to the target */
274 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
275 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
276 XPROGTarget_SendByte(EraseBuffCommand);
277
278 /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
279 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
280 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
281 XPROGTarget_SendByte(1 << 0);
282 }
283
284 if (WriteSize)
285 {
286 /* Wait until the NVM controller is no longer busy */
287 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
288 return false;
289
290 /* Send the memory buffer write command to the target */
291 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
292 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
293 XPROGTarget_SendByte(WriteBuffCommand);
294
295 /* Load the PDI pointer register with the start address we want to write to */
296 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
297 XMEGANVM_SendAddress(WriteAddress);
298
299 /* Send the REPEAT command with the specified number of bytes to write */
300 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
301 XPROGTarget_SendByte(WriteSize - 1);
302
303 /* Send a ST command with indirect access and postincrement to write the bytes */
304 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
305 while (WriteSize--)
306 XPROGTarget_SendByte(*(WriteBuffer++));
307 }
308
309 if (PageMode & XPRG_PAGEMODE_WRITE)
310 {
311 /* Wait until the NVM controller is no longer busy */
312 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
313 return false;
314
315 /* Send the memory write command to the target */
316 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
317 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
318 XPROGTarget_SendByte(WritePageCommand);
319
320 /* Send the address of the first page location to write the memory page */
321 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
322 XMEGANVM_SendAddress(WriteAddress);
323 XPROGTarget_SendByte(0x00);
324 }
325
326 return true;
327 }
328
329 /** Erases a specific memory space of the target.
330 *
331 * \param[in] EraseCommand NVM erase command to send to the device
332 * \param[in] Address Address inside the memory space to erase
333 *
334 * \return Boolean true if the command sequence complete successfully
335 */
336 bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)
337 {
338 /* Wait until the NVM controller is no longer busy */
339 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
340 return false;
341
342 /* Send the memory erase command to the target */
343 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
344 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
345 XPROGTarget_SendByte(EraseCommand);
346
347 /* Chip erase is handled separately, since it's procedure is different to other erase types */
348 if (EraseCommand == XMEGA_NVM_CMD_CHIPERASE)
349 {
350 /* Set CMDEX bit in NVM CTRLA register to start the chip erase */
351 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
352 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
353 XPROGTarget_SendByte(1 << 0);
354 }
355 else
356 {
357 /* Other erase modes just need us to address a byte within the target memory space */
358 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
359 XMEGANVM_SendAddress(Address);
360 XPROGTarget_SendByte(0x00);
361 }
362
363 /* Wait until the NVM bus is ready again */
364 if (!(XMEGANVM_WaitWhileNVMBusBusy()))
365 return false;
366
367 return true;
368 }
369
370 #endif