Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2010.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2010  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, distribute, and sell this
  13   software and its documentation for any purpose is hereby granted
  14   without fee, provided that the above copyright notice appear in
  15   all copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 /** \file
  32  *
  33  *  Target-related functions for the PDI Protocol decoder.
  34  */
  35
  36 #define  INCLUDE_FROM_XPROGTARGET_C
  37 #include "XPROGTarget.h"
  38
  39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
  40
  41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
  42 volatile bool               IsSending;
  43
  44 #if !defined(XPROG_VIA_HARDWARE_USART)
  45 /** Software USART raw frame bits for transmission/reception. */
  46 volatile uint16_t           SoftUSART_Data;
  47
  48 /** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
  49 #define SoftUSART_BitCount  GPIOR2
  50
  51
  52 /** ISR to manage the rising edge of the PDI/TPI software USART when bit-banged USART mode is selected. */
  53 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
  54 {
  55         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
  56         BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;
  57         TIFR1 |= (1 << OCF1B);
  58         TIMSK1 = (1 << OCIE1B);
  59
  60         /* If not sending or receiving, just exit */
  61         if (!(SoftUSART_BitCount))
  62           return;
  63
  64         /* If at rising clock edge and we are in send mode, abort */
  65         if (IsSending)
  66           return;
  67
  68         /* Wait for the start bit when receiving */
  69         if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
  70           return;
  71
  72         /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
  73          * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */
  74         if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)
  75           ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
  76
  77         SoftUSART_Data >>= 1;
  78         SoftUSART_BitCount--;
  79 }
  80
  81 /** ISR to manage the falling edge of the PDI/TPI software USART when bit-banged USART mode is selected. */
  82 ISR(TIMER1_COMPB_vect, ISR_BLOCK)
  83 {
  84         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
  85         BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;
  86         TIFR1 |= (1 << OCF1A);
  87         TIMSK1 = (1 << OCIE1A);
  88
  89         /* If not sending or receiving, just exit */
  90         if (!(SoftUSART_BitCount))
  91           return;
  92
  93         /* If at falling clock edge and we are in receive mode, abort */
  94         if (!IsSending)
  95           return;
  96
  97         /* Set the data line to the next bit value */
  98         if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
  99           BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;
 100         else
 101           BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 102
 103         SoftUSART_Data >>= 1;
 104         SoftUSART_BitCount--;
 105 }
 106
 107 /** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */
 108 ISR(TIMER1_CAPT_vect, ISR_BLOCK)
 109 {
 110         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
 111         BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;
 112
 113         /* If not sending or receiving, just exit */
 114         if (!(SoftUSART_BitCount))
 115           return;
 116
 117         /* Check to see if we are at a rising or falling edge of the clock */
 118         if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)
 119         {
 120                 /* If at rising clock edge and we are in send mode, abort */
 121                 if (IsSending)
 122                   return;
 123
 124                 /* Wait for the start bit when receiving */
 125                 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))
 126                   return;
 127
 128                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
 129                  * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */
 130                 if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)
 131                  ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
 132
 133                 SoftUSART_Data >>= 1;
 134                 SoftUSART_BitCount--;
 135         }
 136         else
 137         {
 138                 /* If at falling clock edge and we are in receive mode, abort */
 139                 if (!IsSending)
 140                   return;
 141
 142                 /* Set the data line to the next bit value */
 143                 if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
 144                   BITBANG_TPIDATA_PORT |=  BITBANG_TPIDATA_MASK;
 145                 else
 146                   BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
 147
 148                 SoftUSART_Data >>= 1;
 149                 SoftUSART_BitCount--;
 150         }
 151 }
 152 #endif
 153
 154 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
 155 void XPROGTarget_EnableTargetPDI(void)
 156 {
 157         IsSending = false;
 158
 159 #if defined(XPROG_VIA_HARDWARE_USART)
 160         /* Set Tx and XCK as outputs, Rx as input */
 161         DDRD |=  (1 << 5) | (1 << 3);
 162         DDRD &= ~(1 << 2);
 163
 164         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 165         PORTD |= (1 << 3);
 166         _delay_us(1);
 167
 168         /* Set up the synchronous USART for XMEGA communications -
 169            8 data bits, even parity, 2 stop bits */
 170         UBRR1  = (F_CPU / 500000UL);
 171         UCSR1B = (1 << TXEN1);
 172         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 173 #else
 174         /* Set DATA and CLOCK lines to outputs */
 175         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 176         BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
 177
 178         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 179         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 180         _delay_us(1);
 181
 182         /* Fire timer compare channel A ISR to manage the software USART */
 183         OCR1A   = BITS_BETWEEN_USART_CLOCKS;
 184         OCR1B   = BITS_BETWEEN_USART_CLOCKS;
 185         TCCR1B  = (1 << WGM12) | (1 << CS10);
 186         TCCR1C  = (1 << FOC1B);
 187         TIMSK1  = (1 << OCIE1A);
 188 #endif
 189
 190         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
 191         XPROGTarget_SendBreak();
 192         XPROGTarget_SendBreak();
 193 }
 194
 195 /** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
 196 void XPROGTarget_EnableTargetTPI(void)
 197 {
 198         IsSending = false;
 199
 200         /* Set /RESET line low for at least 400ns to enable TPI functionality */
 201         AUX_LINE_DDR  |=  AUX_LINE_MASK;
 202         AUX_LINE_PORT &= ~AUX_LINE_MASK;
 203         _delay_us(1);
 204
 205 #if defined(XPROG_VIA_HARDWARE_USART)
 206         /* Set Tx and XCK as outputs, Rx as input */
 207         DDRD |=  (1 << 5) | (1 << 3);
 208         DDRD &= ~(1 << 2);
 209
 210         /* Set up the synchronous USART for TINY communications -
 211            8 data bits, even parity, 2 stop bits */
 212         UBRR1  = (F_CPU / 500000UL);
 213         UCSR1B = (1 << TXEN1);
 214         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 215 #else
 216         /* Set DATA and CLOCK lines to outputs */
 217         BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;
 218         BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;
 219
 220         /* Set DATA line high for idle state */
 221         BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 222
 223         /* Fire timer capture channel ISR to manage the software USART */
 224         ICR1    = BITS_BETWEEN_USART_CLOCKS;
 225         TCCR1B  = (1 << WGM13) | (1 << WGM12) | (1 << CS10);
 226         TIMSK1  = (1 << ICIE1);
 227 #endif
 228
 229         /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
 230         XPROGTarget_SendBreak();
 231         XPROGTarget_SendBreak();
 232 }
 233
 234 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
 235 void XPROGTarget_DisableTargetPDI(void)
 236 {
 237         /* Switch to Rx mode to ensure that all pending transmissions are complete */
 238         XPROGTarget_SetRxMode();
 239
 240 #if defined(XPROG_VIA_HARDWARE_USART)
 241         /* Set /RESET high for a one millisecond to ensure target device is restarted */
 242         PORTD |= (1 << 5);
 243         _delay_ms(1);
 244
 245         /* Turn off receiver and transmitter of the USART, clear settings */
 246         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 247         UCSR1B  = 0;
 248         UCSR1C  = 0;
 249
 250         /* Set all USART lines as input, tristate */
 251         DDRD  &= ~((1 << 5) | (1 << 3));
 252         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 253 #else
 254         /* Turn off software USART management timer */
 255         TCCR1B = 0;
 256         TCCR1C = 0;
 257
 258         /* Set /RESET high for a one millisecond to ensure target device is restarted */
 259         BITBANG_PDICLOCK_PORT |= BITBANG_PDICLOCK_MASK;
 260         _delay_ms(1);
 261
 262         /* Set DATA and CLOCK lines to inputs */
 263         BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 264         BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
 265
 266         /* Tristate DATA and CLOCK lines */
 267         BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;
 268         BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
 269 #endif
 270 }
 271
 272 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */
 273 void XPROGTarget_DisableTargetTPI(void)
 274 {
 275         /* Switch to Rx mode to ensure that all pending transmissions are complete */
 276         XPROGTarget_SetRxMode();
 277
 278 #if defined(XPROG_VIA_HARDWARE_USART)
 279         /* Turn off receiver and transmitter of the USART, clear settings */
 280         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 281         UCSR1B  = 0;
 282         UCSR1C  = 0;
 283
 284         /* Set all USART lines as input, tristate */
 285         DDRD  &= ~((1 << 5) | (1 << 3));
 286         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 287 #else
 288         /* Turn off software USART management timer */
 289         TCCR1B = 0;
 290
 291         /* Set DATA and CLOCK lines to inputs */
 292         BITBANG_TPIDATA_DDR   &= ~BITBANG_TPIDATA_MASK;
 293         BITBANG_TPICLOCK_DDR  &= ~BITBANG_TPICLOCK_MASK;
 294
 295         /* Tristate DATA and CLOCK lines */
 296         BITBANG_TPIDATA_PORT  &= ~BITBANG_TPIDATA_MASK;
 297         BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;
 298 #endif
 299
 300         /* Tristate target /RESET line */
 301         AUX_LINE_DDR  &= ~AUX_LINE_MASK;
 302         AUX_LINE_PORT &= ~AUX_LINE_MASK;
 303 }
 304
 305 /** Sends a byte via the USART.
 306  *
 307  *  \param[in] Byte  Byte to send through the USART
 308  */
 309 void XPROGTarget_SendByte(const uint8_t Byte)
 310 {
 311         /* Switch to Tx mode if currently in Rx mode */
 312         if (!(IsSending))
 313           XPROGTarget_SetTxMode();
 314
 315 #if defined(XPROG_VIA_HARDWARE_USART)
 316         /* Wait until there is space in the hardware Tx buffer before writing */
 317         while (!(UCSR1A & (1 << UDRE1)));
 318         UCSR1A |= (1 << TXC1);
 319         UDR1    = Byte;
 320 #else
 321         /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */
 322         uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));
 323
 324         /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */
 325         uint8_t ParityData = Byte;
 326         while (ParityData)
 327         {
 328                 NewUSARTData ^= (1 << 9);
 329                 ParityData   &= (ParityData - 1);
 330         }
 331
 332         /* Wait until transmitter is idle before writing new data */
 333         while (SoftUSART_BitCount);
 334
 335         /* Data shifted out LSB first, START DATA PARITY STOP STOP */
 336         SoftUSART_Data     = NewUSARTData;
 337         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 338 #endif
 339 }
 340
 341 /** Receives a byte via the software USART, blocking until data is received.
 342  *
 343  *  \return Received byte from the USART
 344  */
 345 uint8_t XPROGTarget_ReceiveByte(void)
 346 {
 347         /* Switch to Rx mode if currently in Tx mode */
 348         if (IsSending)
 349           XPROGTarget_SetRxMode();
 350
 351 #if defined(XPROG_VIA_HARDWARE_USART)
 352         /* Wait until a byte has been received before reading */
 353         uint8_t TimeoutMSRemaining = 100;
 354         while (!(UCSR1A & (1 << RXC1)) && TimeoutMSRemaining)
 355         {
 356                 /* Manage software timeout */
 357                 if (TIFR0 & (1 << OCF0A))
 358                 {
 359                         TIFR0 |= (1 << OCF0A);
 360                         TimeoutMSRemaining--;
 361                 }
 362         }
 363
 364         return UDR1;
 365 #else
 366         /* Wait until a byte has been received before reading */
 367         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 368         uint8_t TimeoutMSRemaining = 100;
 369         while (SoftUSART_BitCount && TimeoutMSRemaining)
 370         {
 371                 /* Manage software timeout */
 372                 if (TIFR0 & (1 << OCF0A))
 373                 {
 374                         TIFR0 |= (1 << OCF0A);
 375                         TimeoutMSRemaining--;
 376                 }
 377         }
 378
 379         /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */
 380         return (uint8_t)SoftUSART_Data;
 381 #endif
 382 }
 383
 384 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
 385 void XPROGTarget_SendBreak(void)
 386 {
 387         /* Switch to Tx mode if currently in Rx mode */
 388         if (!(IsSending))
 389           XPROGTarget_SetTxMode();
 390
 391 #if defined(XPROG_VIA_HARDWARE_USART)
 392         /* Need to do nothing for a full frame to send a BREAK */
 393         for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
 394         {
 395                 /* Wait for a full cycle of the clock */
 396                 while (PIND & (1 << 5));
 397                 while (!(PIND & (1 << 5)));
 398         }
 399 #else
 400         while (SoftUSART_BitCount);
 401
 402         /* Need to do nothing for a full frame to send a BREAK */
 403         SoftUSART_Data     = 0x0FFF;
 404         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 405 #endif
 406 }
 407
 408 static void XPROGTarget_SetTxMode(void)
 409 {
 410 #if defined(XPROG_VIA_HARDWARE_USART)
 411         /* Wait for a full cycle of the clock */
 412         while (PIND & (1 << 5));
 413         while (!(PIND & (1 << 5)));
 414
 415         PORTD  |=  (1 << 3);
 416         DDRD   |=  (1 << 3);
 417
 418         UCSR1B &= ~(1 << RXEN1);
 419         UCSR1B |=  (1 << TXEN1);
 420
 421         IsSending = true;
 422 #else
 423         while (SoftUSART_BitCount);
 424
 425         /* Wait for a full cycle of the clock */
 426         SoftUSART_Data     = 0x0001;
 427         SoftUSART_BitCount = 1;
 428         while (SoftUSART_BitCount);
 429
 430         if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
 431         {
 432                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 433                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 434         }
 435         else
 436         {
 437                 BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 438                 BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;
 439         }
 440 #endif
 441
 442         IsSending = true;
 443 }
 444
 445 static void XPROGTarget_SetRxMode(void)
 446 {
 447 #if defined(XPROG_VIA_HARDWARE_USART)
 448         while (!(UCSR1A & (1 << TXC1)));
 449         UCSR1A |=  (1 << TXC1);
 450
 451         UCSR1B &= ~(1 << TXEN1);
 452         UCSR1B |=  (1 << RXEN1);
 453
 454         DDRD   &= ~(1 << 3);
 455         PORTD  &= ~(1 << 3);
 456 #else
 457         while (SoftUSART_BitCount);
 458
 459         if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
 460         {
 461                 BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 462                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 463         }
 464         else
 465         {
 466                 BITBANG_TPIDATA_DDR  &= ~BITBANG_TPIDATA_MASK;
 467                 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
 468         }
 469
 470         /* Wait until DATA line has been pulled up to idle by the target */
 471         uint8_t TimeoutMSRemaining = 100;
 472         while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK) && TimeoutMSRemaining)
 473         {
 474                 /* Manage software timeout */
 475                 if (TIFR0 & (1 << OCF0A))
 476                 {
 477                         TIFR0 |= (1 << OCF0A);
 478                         TimeoutMSRemaining--;
 479                 }
 480         }
 481 #endif
 482
 483         IsSending = false;
 484 }
 485
 486 #endif