Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2009.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, distribute, and sell this
  13   software and its documentation for any purpose is hereby granted
  14   without fee, provided that the above copyright notice appear in
  15   all copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 /** \file
  32  *
  33  *  Target-related functions for the PDI Protocol decoder.
  34  */
  35
  36 #define  INCLUDE_FROM_XPROGTARGET_C
  37 #include "XPROGTarget.h"
  38
  39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
  40
  41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
  42 volatile bool               IsSending;
  43
  44 #if !defined(XPROG_VIA_HARDWARE_USART)
  45 /** Software USART raw frame bits for transmission/reception. */
  46 volatile uint16_t           SoftUSART_Data;
  47
  48 /** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
  49 #define SoftUSART_BitCount  GPIOR2
  50
  51
  52 /** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */
  53 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
  54 {
  55         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
  56         BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;
  57
  58         /* If not sending or receiving, just exit */
  59         if (!(SoftUSART_BitCount))
  60           return;
  61
  62         /* Check to see if we are at a rising or falling edge of the clock */
  63         if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)
  64         {
  65                 /* If at rising clock edge and we are in send mode, abort */
  66                 if (IsSending)
  67                   return;
  68
  69                 /* Wait for the start bit when receiving */
  70                 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
  71                   return;
  72
  73                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
  74                  * be discarded leaving the data to be byte-aligned for quick access */
  75                 if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)
  76                   ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
  77
  78                 SoftUSART_Data >>= 1;
  79                 SoftUSART_BitCount--;
  80         }
  81         else
  82         {
  83                 /* If at falling clock edge and we are in receive mode, abort */
  84                 if (!IsSending)
  85                   return;
  86
  87                 /* Set the data line to the next bit value */
  88                 if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
  89                   BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;
  90                 else
  91                   BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
  92
  93                 SoftUSART_Data >>= 1;
  94                 SoftUSART_BitCount--;
  95         }
  96 }
  97
  98 /** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */
  99 ISR(TIMER1_COMPB_vect, ISR_BLOCK)
 100 {
 101         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
 102         BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;
 103
 104         /* If not sending or receiving, just exit */
 105         if (!(SoftUSART_BitCount))
 106           return;
 107
 108         /* Check to see if we are at a rising or falling edge of the clock */
 109         if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)
 110         {
 111                 /* If at rising clock edge and we are in send mode, abort */
 112                 if (IsSending)
 113                   return;
 114
 115                 /* Wait for the start bit when receiving */
 116                 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))
 117                   return;
 118
 119                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
 120                  * be discarded leaving the data to be byte-aligned for quick access */
 121                 if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)
 122                  ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
 123
 124                 SoftUSART_Data >>= 1;
 125                 SoftUSART_BitCount--;
 126         }
 127         else
 128         {
 129                 /* If at falling clock edge and we are in receive mode, abort */
 130                 if (!IsSending)
 131                   return;
 132
 133                 /* Set the data line to the next bit value */
 134                 if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
 135                   BITBANG_TPIDATA_PORT |=  BITBANG_TPIDATA_MASK;
 136                 else
 137                   BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
 138
 139                 SoftUSART_Data >>= 1;
 140                 SoftUSART_BitCount--;
 141         }
 142 }
 143 #endif
 144
 145 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
 146 void XPROGTarget_EnableTargetPDI(void)
 147 {
 148         IsSending = false;
 149
 150 #if defined(XPROG_VIA_HARDWARE_USART)
 151         /* Set Tx and XCK as outputs, Rx as input */
 152         DDRD |=  (1 << 5) | (1 << 3);
 153         DDRD &= ~(1 << 2);
 154
 155         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 156         PORTD |= (1 << 3);
 157         asm volatile ("NOP"::);
 158         asm volatile ("NOP"::);
 159
 160         /* Set up the synchronous USART for XMEGA communications -
 161            8 data bits, even parity, 2 stop bits */
 162         UBRR1  = (F_CPU / 1000000UL);
 163         UCSR1B = (1 << TXEN1);
 164         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 165 #else
 166         /* Set DATA and CLOCK lines to outputs */
 167         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 168         BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
 169
 170         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 171         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 172         asm volatile ("NOP"::);
 173         asm volatile ("NOP"::);
 174
 175         /* Fire timer compare channel A ISR to manage the software USART */
 176         OCR1A   = BITS_BETWEEN_USART_CLOCKS;
 177         TCCR1B  = (1 << WGM12) | (1 << CS10);
 178         TIMSK1  = (1 << OCIE1A);
 179 #endif
 180
 181         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
 182         XPROGTarget_SendBreak();
 183         XPROGTarget_SendBreak();
 184 }
 185
 186 /** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
 187 void XPROGTarget_EnableTargetTPI(void)
 188 {
 189         IsSending = false;
 190
 191         /* Set /RESET line low for at least 90ns to enable TPI functionality */
 192         AUX_LINE_DDR  |=  AUX_LINE_MASK;
 193         AUX_LINE_PORT &= ~AUX_LINE_MASK;
 194         asm volatile ("NOP"::);
 195         asm volatile ("NOP"::);
 196
 197 #if defined(XPROG_VIA_HARDWARE_USART)
 198         /* Set Tx and XCK as outputs, Rx as input */
 199         DDRD |=  (1 << 5) | (1 << 3);
 200         DDRD &= ~(1 << 2);
 201
 202         /* Set up the synchronous USART for XMEGA communications -
 203            8 data bits, even parity, 2 stop bits */
 204         UBRR1  = (F_CPU / 1000000UL);
 205         UCSR1B = (1 << TXEN1);
 206         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 207 #else
 208         /* Set DATA and CLOCK lines to outputs */
 209         BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;
 210         BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;
 211
 212         /* Set DATA line high for idle state */
 213         BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 214
 215         /* Fire timer capture channel B ISR to manage the software USART */
 216         OCR1B   = BITS_BETWEEN_USART_CLOCKS;
 217         TCCR1B  = (1 << WGM12) | (1 << CS10);
 218         TIMSK1  = (1 << OCIE1B);
 219 #endif
 220
 221         /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
 222         XPROGTarget_SendBreak();
 223         XPROGTarget_SendBreak();
 224 }
 225
 226 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
 227 void XPROGTarget_DisableTargetPDI(void)
 228 {
 229 #if defined(XPROG_VIA_HARDWARE_USART)
 230         /* Turn off receiver and transmitter of the USART, clear settings */
 231         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 232         UCSR1B  = 0;
 233         UCSR1C  = 0;
 234
 235         /* Set all USART lines as input, tristate */
 236         DDRD  &= ~((1 << 5) | (1 << 3));
 237         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 238 #else
 239         /* Set DATA and CLOCK lines to inputs */
 240         BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 241         BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
 242
 243         /* Tristate DATA and CLOCK lines */
 244         BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;
 245         BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
 246 #endif
 247 }
 248
 249 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */
 250 void XPROGTarget_DisableTargetTPI(void)
 251 {
 252 #if defined(XPROG_VIA_HARDWARE_USART)
 253         /* Turn off receiver and transmitter of the USART, clear settings */
 254         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 255         UCSR1B  = 0;
 256         UCSR1C  = 0;
 257
 258         /* Set all USART lines as input, tristate */
 259         DDRD  &= ~((1 << 5) | (1 << 3));
 260         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 261 #else
 262         /* Set DATA and CLOCK lines to inputs */
 263         BITBANG_TPIDATA_DDR   &= ~BITBANG_TPIDATA_MASK;
 264         BITBANG_TPICLOCK_DDR  &= ~BITBANG_TPICLOCK_MASK;
 265
 266         /* Tristate DATA and CLOCK lines */
 267         BITBANG_TPIDATA_PORT  &= ~BITBANG_TPIDATA_MASK;
 268         BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;
 269 #endif
 270
 271         /* Tristate target /RESET line */
 272         AUX_LINE_DDR  &= ~AUX_LINE_MASK;
 273         AUX_LINE_PORT &= ~AUX_LINE_MASK;
 274 }
 275
 276 /** Sends a byte via the USART.
 277  *
 278  *  \param[in] Byte  Byte to send through the USART
 279  */
 280 void XPROGTarget_SendByte(const uint8_t Byte)
 281 {
 282         /* Switch to Tx mode if currently in Rx mode */
 283         if (!(IsSending))
 284           XPROGTarget_SetTxMode();
 285
 286 #if defined(XPROG_VIA_HARDWARE_USART)
 287         /* Wait until there is space in the hardware Tx buffer before writing */
 288         while (!(UCSR1A & (1 << UDRE1)));
 289         UCSR1A |= (1 << TXC1);
 290         UDR1    = Byte;
 291 #else
 292         /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */
 293         uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));
 294
 295         /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */
 296         uint8_t ParityData    = Byte;
 297         while (ParityData)
 298         {
 299                 NewUSARTData ^= (1 << 9);
 300                 ParityData   &= (ParityData - 1);
 301         }
 302
 303         /* Wait until transmitter is idle before writing new data */
 304         while (SoftUSART_BitCount);
 305
 306         /* Data shifted out LSB first, START DATA PARITY STOP STOP */
 307         SoftUSART_Data     = NewUSARTData;
 308         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 309 #endif
 310 }
 311
 312 /** Receives a byte via the software USART, blocking until data is received.
 313  *
 314  *  \return Received byte from the USART
 315  */
 316 uint8_t XPROGTarget_ReceiveByte(void)
 317 {
 318         /* Switch to Rx mode if currently in Tx mode */
 319         if (IsSending)
 320           XPROGTarget_SetRxMode();
 321
 322 #if defined(XPROG_VIA_HARDWARE_USART)
 323         /* Wait until a byte has been received before reading */
 324         while (!(UCSR1A & (1 << RXC1)) && TimeoutMSRemaining);
 325         return UDR1;
 326 #else
 327         /* Wait until a byte has been received before reading */
 328         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 329         while (SoftUSART_BitCount && TimeoutMSRemaining);
 330
 331         /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */
 332         return (uint8_t)SoftUSART_Data;
 333 #endif
 334 }
 335
 336 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
 337 void XPROGTarget_SendBreak(void)
 338 {
 339         /* Switch to Tx mode if currently in Rx mode */
 340         if (!(IsSending))
 341           XPROGTarget_SetTxMode();
 342
 343 #if defined(XPROG_VIA_HARDWARE_USART)
 344         /* Need to do nothing for a full frame to send a BREAK */
 345         for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
 346         {
 347                 /* Wait for a full cycle of the clock */
 348                 while (PIND & (1 << 5));
 349                 while (!(PIND & (1 << 5)));
 350         }
 351 #else
 352         while (SoftUSART_BitCount);
 353
 354         /* Need to do nothing for a full frame to send a BREAK */
 355         SoftUSART_Data     = 0x0FFF;
 356         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 357 #endif
 358 }
 359
 360 static void XPROGTarget_SetTxMode(void)
 361 {
 362 #if defined(XPROG_VIA_HARDWARE_USART)
 363         /* Wait for a full cycle of the clock */
 364         while (PIND & (1 << 5));
 365         while (!(PIND & (1 << 5)));
 366
 367         PORTD  |=  (1 << 3);
 368         DDRD   |=  (1 << 3);
 369
 370         UCSR1B &= ~(1 << RXEN1);
 371         UCSR1B |=  (1 << TXEN1);
 372
 373         IsSending = true;
 374 #else
 375         while (SoftUSART_BitCount);
 376
 377         /* Wait for a full cycle of the clock */
 378         SoftUSART_Data     = 0x0001;
 379         SoftUSART_BitCount = 1;
 380         while (SoftUSART_BitCount);
 381
 382         if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
 383         {
 384                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 385                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 386         }
 387         else
 388         {
 389                 BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 390                 BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;
 391         }
 392 #endif
 393
 394         IsSending = true;
 395 }
 396
 397 static void XPROGTarget_SetRxMode(void)
 398 {
 399 #if defined(XPROG_VIA_HARDWARE_USART)
 400         while (!(UCSR1A & (1 << TXC1)));
 401         UCSR1A |=  (1 << TXC1);
 402
 403         UCSR1B &= ~(1 << TXEN1);
 404         UCSR1B |=  (1 << RXEN1);
 405
 406         DDRD   &= ~(1 << 3);
 407         PORTD  &= ~(1 << 3);
 408 #else
 409         while (SoftUSART_BitCount);
 410
 411         if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
 412         {
 413                 BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 414                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 415         }
 416         else
 417         {
 418                 BITBANG_TPIDATA_DDR  &= ~BITBANG_TPIDATA_MASK;
 419                 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
 420         }
 421
 422         /* Wait until DATA line has been pulled up to idle by the target */
 423         while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK));
 424 #endif
 425
 426         IsSending = false;
 427 }
 428
 429 #endif