Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2010.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2010  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, distribute, and sell this
  13   software and its documentation for any purpose is hereby granted
  14   without fee, provided that the above copyright notice appear in
  15   all copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 /** \file
  32  *
  33  *  Target-related functions for the PDI Protocol decoder.
  34  */
  35
  36 #define  INCLUDE_FROM_XPROGTARGET_C
  37 #include "XPROGTarget.h"
  38
  39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
  40
  41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
  42 volatile bool               IsSending;
  43
  44 #if !defined(XPROG_VIA_HARDWARE_USART)
  45 /** Software USART raw frame bits for transmission/reception. */
  46 volatile uint16_t           SoftUSART_Data;
  47
  48 /** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
  49 #define SoftUSART_BitCount  GPIOR2
  50
  51
  52 /** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */
  53 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
  54 {
  55         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
  56         BITBANG_PDICLOCK_PIN = BITBANG_PDICLOCK_MASK;
  57
  58         /* If not sending or receiving, just exit */
  59         if (!(SoftUSART_BitCount))
  60           return;
  61
  62         /* Check to see if we are at a rising or falling edge of the clock */
  63         if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)
  64         {
  65                 /* If at rising clock edge and we are in send mode, abort */
  66                 if (IsSending)
  67                   return;
  68
  69                 /* Wait for the start bit when receiving */
  70                 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
  71                   return;
  72
  73                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
  74                  * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */
  75                 if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)
  76                   ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
  77
  78                 SoftUSART_Data >>= 1;
  79                 SoftUSART_BitCount--;
  80         }
  81         else
  82         {
  83                 /* If at falling clock edge and we are in receive mode, abort */
  84                 if (!IsSending)
  85                   return;
  86
  87                 /* Set the data line to the next bit value */
  88                 if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
  89                   BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;
  90                 else
  91                   BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
  92
  93                 SoftUSART_Data >>= 1;
  94                 SoftUSART_BitCount--;
  95         }
  96 }
  97
  98 /** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */
  99 ISR(TIMER1_CAPT_vect, ISR_BLOCK)
 100 {
 101         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
 102         BITBANG_TPICLOCK_PIN = BITBANG_TPICLOCK_MASK;
 103
 104         /* If not sending or receiving, just exit */
 105         if (!(SoftUSART_BitCount))
 106           return;
 107
 108         /* Check to see if we are at a rising or falling edge of the clock */
 109         if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)
 110         {
 111                 /* If at rising clock edge and we are in send mode, abort */
 112                 if (IsSending)
 113                   return;
 114
 115                 /* Wait for the start bit when receiving */
 116                 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))
 117                   return;
 118
 119                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
 120                  * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */
 121                 if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)
 122                  ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
 123
 124                 SoftUSART_Data >>= 1;
 125                 SoftUSART_BitCount--;
 126         }
 127         else
 128         {
 129                 /* If at falling clock edge and we are in receive mode, abort */
 130                 if (!IsSending)
 131                   return;
 132
 133                 /* Set the data line to the next bit value */
 134                 if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
 135                   BITBANG_TPIDATA_PORT |=  BITBANG_TPIDATA_MASK;
 136                 else
 137                   BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
 138
 139                 SoftUSART_Data >>= 1;
 140                 SoftUSART_BitCount--;
 141         }
 142 }
 143 #endif
 144
 145 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
 146 void XPROGTarget_EnableTargetPDI(void)
 147 {
 148         IsSending = false;
 149
 150 #if defined(XPROG_VIA_HARDWARE_USART)
 151         /* Set Tx and XCK as outputs, Rx as input */
 152         DDRD |=  (1 << 5) | (1 << 3);
 153         DDRD &= ~(1 << 2);
 154
 155         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 156         PORTD |= (1 << 3);
 157         _delay_us(1);
 158
 159         /* Set up the synchronous USART for XMEGA communications - 8 data bits, even parity, 2 stop bits */
 160         UBRR1  = (F_CPU / XPROG_HARDWARE_SPEED);
 161         UCSR1B = (1 << TXEN1);
 162         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 163 #else
 164         /* Set DATA and CLOCK lines to outputs */
 165         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 166         BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
 167
 168         /* Set DATA line low for at least 90ns to ensure that the device is ready for PDI mode to be entered */
 169         BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 170         _delay_us(1);
 171
 172         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 173         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 174         _delay_us(1);
 175
 176         /* Fire timer compare channel A ISR to manage the software USART */
 177         OCR1A  = BITS_BETWEEN_USART_CLOCKS;
 178         TCCR1B = (1 << WGM12) | (1 << CS10);
 179         TIMSK1 = (1 << OCIE1A);
 180 #endif
 181
 182         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
 183         XPROGTarget_SendBreak();
 184         XPROGTarget_SendBreak();
 185 }
 186
 187 /** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
 188 void XPROGTarget_EnableTargetTPI(void)
 189 {
 190         IsSending = false;
 191
 192         /* Set /RESET line low for at least 400ns to enable TPI functionality */
 193         AUX_LINE_DDR  |=  AUX_LINE_MASK;
 194         AUX_LINE_PORT &= ~AUX_LINE_MASK;
 195         _delay_us(1);
 196
 197 #if defined(XPROG_VIA_HARDWARE_USART)
 198         /* Set Tx and XCK as outputs, Rx as input */
 199         DDRD |=  (1 << 5) | (1 << 3);
 200         DDRD &= ~(1 << 2);
 201
 202         /* Set up the synchronous USART for TINY communications - 8 data bits, even parity, 2 stop bits */
 203         UBRR1  = (F_CPU / XPROG_HARDWARE_SPEED);
 204         UCSR1B = (1 << TXEN1);
 205         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 206 #else
 207         /* Set DATA and CLOCK lines to outputs */
 208         BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;
 209         BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;
 210
 211         /* Set DATA line high for idle state */
 212         BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 213
 214         /* Fire timer capture channel ISR to manage the software USART */
 215         ICR1   = BITS_BETWEEN_USART_CLOCKS;
 216         TCCR1B = (1 << WGM13) | (1 << WGM12) | (1 << CS10);
 217         TIMSK1 = (1 << ICIE1);
 218 #endif
 219
 220         /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
 221         XPROGTarget_SendBreak();
 222         XPROGTarget_SendBreak();
 223 }
 224
 225 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
 226 void XPROGTarget_DisableTargetPDI(void)
 227 {
 228         /* Switch to Rx mode to ensure that all pending transmissions are complete */
 229         XPROGTarget_SetRxMode();
 230
 231 #if defined(XPROG_VIA_HARDWARE_USART)
 232         /* Turn off receiver and transmitter of the USART, clear settings */
 233         UCSR1A  = ((1 << TXC1) | (1 << RXC1));
 234         UCSR1B  = 0;
 235         UCSR1C  = 0;
 236
 237         /* Tristate all pins */
 238         DDRD  &= ~((1 << 5) | (1 << 3));
 239         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 240 #else
 241         /* Turn off software USART management timer */
 242         TCCR1B = 0;
 243
 244         /* Set DATA and CLOCK lines to inputs */
 245         BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 246         BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
 247
 248         /* Tristate DATA and CLOCK lines */
 249         BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;
 250         BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
 251 #endif
 252 }
 253
 254 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */
 255 void XPROGTarget_DisableTargetTPI(void)
 256 {
 257         /* Switch to Rx mode to ensure that all pending transmissions are complete */
 258         XPROGTarget_SetRxMode();
 259
 260 #if defined(XPROG_VIA_HARDWARE_USART)
 261         /* Turn off receiver and transmitter of the USART, clear settings */
 262         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 263         UCSR1B  = 0;
 264         UCSR1C  = 0;
 265
 266         /* Set all USART lines as input, tristate */
 267         DDRD  &= ~((1 << 5) | (1 << 3));
 268         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 269 #else
 270         /* Turn off software USART management timer */
 271         TCCR1B = 0;
 272
 273         /* Set DATA and CLOCK lines to inputs */
 274         BITBANG_TPIDATA_DDR   &= ~BITBANG_TPIDATA_MASK;
 275         BITBANG_TPICLOCK_DDR  &= ~BITBANG_TPICLOCK_MASK;
 276
 277         /* Tristate DATA and CLOCK lines */
 278         BITBANG_TPIDATA_PORT  &= ~BITBANG_TPIDATA_MASK;
 279         BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;
 280 #endif
 281
 282         /* Tristate target /RESET line */
 283         AUX_LINE_DDR  &= ~AUX_LINE_MASK;
 284         AUX_LINE_PORT &= ~AUX_LINE_MASK;
 285 }
 286
 287 /** Sends a byte via the USART.
 288  *
 289  *  \param[in] Byte  Byte to send through the USART
 290  */
 291 void XPROGTarget_SendByte(const uint8_t Byte)
 292 {
 293         /* Switch to Tx mode if currently in Rx mode */
 294         if (!(IsSending))
 295           XPROGTarget_SetTxMode();
 296
 297 #if defined(XPROG_VIA_HARDWARE_USART)
 298         /* Wait until there is space in the hardware Tx buffer before writing */
 299         while (!(UCSR1A & (1 << UDRE1)));
 300         UCSR1A |= (1 << TXC1);
 301         UDR1    = Byte;
 302 #else
 303         /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */
 304         uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));
 305
 306         /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */
 307         uint8_t ParityData = Byte;
 308         while (ParityData)
 309         {
 310                 NewUSARTData ^= (1 << 9);
 311                 ParityData   &= (ParityData - 1);
 312         }
 313
 314         /* Wait until transmitter is idle before writing new data */
 315         while (SoftUSART_BitCount);
 316
 317         /* Data shifted out LSB first, START DATA PARITY STOP STOP */
 318         SoftUSART_Data     = NewUSARTData;
 319         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 320 #endif
 321
 322     if (TimeoutMSRemaining)
 323           TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
 324 }
 325
 326 /** Receives a byte via the software USART, blocking until data is received.
 327  *
 328  *  \return Received byte from the USART
 329  */
 330 uint8_t XPROGTarget_ReceiveByte(void)
 331 {
 332         /* Switch to Rx mode if currently in Tx mode */
 333         if (IsSending)
 334           XPROGTarget_SetRxMode();
 335
 336 #if defined(XPROG_VIA_HARDWARE_USART)
 337         /* Wait until a byte has been received before reading */
 338         while (!(UCSR1A & (1 << RXC1)) && TimeoutMSRemaining);
 339
 340         if (TimeoutMSRemaining)
 341           TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
 342
 343         return UDR1;
 344 #else
 345         /* Wait until a byte has been received before reading */
 346         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 347         while (SoftUSART_BitCount && TimeoutMSRemaining);
 348
 349         if (TimeoutMSRemaining)
 350           TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
 351
 352         /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */
 353         return (uint8_t)SoftUSART_Data;
 354 #endif
 355 }
 356
 357 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
 358 void XPROGTarget_SendBreak(void)
 359 {
 360         /* Switch to Tx mode if currently in Rx mode */
 361         if (!(IsSending))
 362           XPROGTarget_SetTxMode();
 363
 364 #if defined(XPROG_VIA_HARDWARE_USART)
 365         /* Need to do nothing for a full frame to send a BREAK */
 366         for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
 367         {
 368                 /* Wait for a full cycle of the clock */
 369                 while (PIND & (1 << 5));
 370                 while (!(PIND & (1 << 5)));
 371         }
 372 #else
 373         while (SoftUSART_BitCount);
 374
 375         /* Need to do nothing for a full frame to send a BREAK */
 376         SoftUSART_Data     = 0x0FFF;
 377         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 378 #endif
 379
 380     if (TimeoutMSRemaining)
 381           TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
 382 }
 383
 384 static void XPROGTarget_SetTxMode(void)
 385 {
 386 #if defined(XPROG_VIA_HARDWARE_USART)
 387         /* Wait for a full cycle of the clock */
 388         while (PIND & (1 << 5));
 389         while (!(PIND & (1 << 5)));
 390
 391         PORTD  |=  (1 << 3);
 392         DDRD   |=  (1 << 3);
 393
 394         UCSR1B &= ~(1 << RXEN1);
 395         UCSR1B |=  (1 << TXEN1);
 396
 397         IsSending = true;
 398 #else
 399         while (SoftUSART_BitCount && TimeoutMSRemaining);
 400
 401         /* Wait for a full cycle of the clock */
 402         SoftUSART_Data     = 0x0001;
 403         SoftUSART_BitCount = 1;
 404         while (SoftUSART_BitCount);
 405
 406         if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
 407         {
 408                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 409                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 410         }
 411         else
 412         {
 413                 BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 414                 BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;
 415         }
 416 #endif
 417
 418     if (TimeoutMSRemaining)
 419           TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
 420
 421         IsSending = true;
 422 }
 423
 424 static void XPROGTarget_SetRxMode(void)
 425 {
 426 #if defined(XPROG_VIA_HARDWARE_USART)
 427         while (!(UCSR1A & (1 << TXC1)));
 428         UCSR1A |=  (1 << TXC1);
 429
 430         UCSR1B &= ~(1 << TXEN1);
 431         UCSR1B |=  (1 << RXEN1);
 432
 433         DDRD   &= ~(1 << 3);
 434         PORTD  &= ~(1 << 3);
 435 #else
 436         while (SoftUSART_BitCount && TimeoutMSRemaining);
 437
 438         if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
 439         {
 440                 BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 441                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 442
 443                 /* Wait until DATA line has been pulled up to idle by the target */
 444                 while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK) && TimeoutMSRemaining);
 445         }
 446         else
 447         {
 448                 BITBANG_TPIDATA_DDR  &= ~BITBANG_TPIDATA_MASK;
 449                 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
 450
 451                 /* Wait until DATA line has been pulled up to idle by the target */
 452                 while (!(BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK) && TimeoutMSRemaining);
 453         }
 454 #endif
 455
 456     if (TimeoutMSRemaining)
 457           TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
 458
 459         IsSending = false;
 460 }
 461
 462 #endif