Fixed broken lock byte programming in the AVRISP-MKII clone project for some XMEGA...
[pub/lufa.git] / Projects / AVRISP-MKII / Lib / XPROG / XMEGANVM.c
1 /*
2 LUFA Library
3 Copyright (C) Dean Camera, 2010.
4
5 dean [at] fourwalledcubicle [dot] com
6 www.fourwalledcubicle.com
7 */
8
9 /*
10 Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)
11
12 Permission to use, copy, modify, distribute, and sell this
13 software and its documentation for any purpose is hereby granted
14 without fee, provided that the above copyright notice appear in
15 all copies and that both that the copyright notice and this
16 permission notice and warranty disclaimer appear in supporting
17 documentation, and that the name of the author not be used in
18 advertising or publicity pertaining to distribution of the
19 software without specific, written prior permission.
20
21 The author disclaim all warranties with regard to this
22 software, including all implied warranties of merchantability
23 and fitness. In no event shall the author be liable for any
24 special, indirect or consequential damages or any damages
25 whatsoever resulting from loss of use, data or profits, whether
26 in an action of contract, negligence or other tortious action,
27 arising out of or in connection with the use or performance of
28 this software.
29 */
30
31 /** \file
32 *
33 * Target-related functions for the XMEGA target's NVM module.
34 */
35
36 #define INCLUDE_FROM_XMEGA_NVM_C
37 #include "XMEGANVM.h"
38
39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
40
41 /** Sends the given 32-bit absolute address to the target.
42 *
43 * \param[in] AbsoluteAddress Absolute address to send to the target
44 */
45 static void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)
46 {
47 /* Send the given 32-bit address to the target, LSB first */
48 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[0]);
49 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[1]);
50 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[2]);
51 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[3]);
52 }
53
54 /** Sends the given NVM register address to the target.
55 *
56 * \param[in] Register NVM register whose absolute address is to be sent
57 */
58 static void XMEGANVM_SendNVMRegAddress(const uint8_t Register)
59 {
60 /* Determine the absolute register address from the NVM base memory address and the NVM register address */
61 uint32_t Address = XPROG_Param_NVMBase | Register;
62
63 /* Send the calculated 32-bit address to the target, LSB first */
64 XMEGANVM_SendAddress(Address);
65 }
66
67 /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC
68 * calculation.
69 *
70 * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
71 */
72 bool XMEGANVM_WaitWhileNVMBusBusy(void)
73 {
74 /* Poll the STATUS register to check to see if NVM access has been enabled */
75 for (;;)
76 {
77 /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */
78 XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
79
80 uint8_t StatusRegister = XPROGTarget_ReceiveByte();
81
82 /* We might have timed out waiting for the status register read response, check here */
83 if (!(TimeoutTicksRemaining))
84 return false;
85
86 /* Check the status register read response to see if the NVM bus is enabled */
87 if (StatusRegister & PDI_STATUS_NVM)
88 return true;
89 }
90 }
91
92 /** Waits while the target's NVM controller is busy performing an operation, exiting if the
93 * timeout period expires.
94 *
95 * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
96 */
97 bool XMEGANVM_WaitWhileNVMControllerBusy(void)
98 {
99 /* Poll the NVM STATUS register while the NVM controller is busy */
100 for (;;)
101 {
102 /* Send a LDS command to read the NVM STATUS register to check the BUSY flag */
103 XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
104 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_STATUS);
105
106 uint8_t StatusRegister = XPROGTarget_ReceiveByte();
107
108 /* We might have timed out waiting for the status register read response, check here */
109 if (!(TimeoutTicksRemaining))
110 return false;
111
112 /* Check to see if the BUSY flag is still set */
113 if (!(StatusRegister & (1 << 7)))
114 return true;
115 }
116 }
117
118 /** Retrieves the CRC value of the given memory space.
119 *
120 * \param[in] CRCCommand NVM CRC command to issue to the target
121 * \param[out] CRCDest CRC Destination when read from the target
122 *
123 * \return Boolean true if the command sequence complete successfully
124 */
125 bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
126 {
127 /* Wait until the NVM controller is no longer busy */
128 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
129 return false;
130
131 /* Set the NVM command to the correct CRC read command */
132 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
133 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
134 XPROGTarget_SendByte(CRCCommand);
135
136 /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
137 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
138 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
139 XPROGTarget_SendByte(1 << 0);
140
141 /* Wait until the NVM bus is ready again */
142 if (!(XMEGANVM_WaitWhileNVMBusBusy()))
143 return false;
144
145 /* Wait until the NVM controller is no longer busy */
146 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
147 return false;
148
149 /* Load the PDI pointer register with the DAT0 register start address */
150 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
151 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0);
152
153 /* Send the REPEAT command to grab the CRC bytes */
154 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
155 XPROGTarget_SendByte(XMEGA_CRC_LENGTH - 1);
156
157 /* Read in the CRC bytes from the target */
158 XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
159 for (uint8_t i = 0; i < XMEGA_CRC_LENGTH; i++)
160 ((uint8_t*)CRCDest)[i] = XPROGTarget_ReceiveByte();
161
162 return (TimeoutTicksRemaining != 0);
163 }
164
165 /** Reads memory from the target's memory spaces.
166 *
167 * \param[in] ReadAddress Start address to read from within the target's address space
168 * \param[out] ReadBuffer Buffer to store read data into
169 * \param[in] ReadSize Number of bytes to read
170 *
171 * \return Boolean true if the command sequence complete successfully
172 */
173 bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)
174 {
175 /* Wait until the NVM controller is no longer busy */
176 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
177 return false;
178
179 /* Send the READNVM command to the NVM controller for reading of an arbitrary location */
180 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
181 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
182 XPROGTarget_SendByte(XMEGA_NVM_CMD_READNVM);
183
184 /* Load the PDI pointer register with the start address we want to read from */
185 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
186 XMEGANVM_SendAddress(ReadAddress);
187
188 /* Send the REPEAT command with the specified number of bytes to read */
189 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
190 XPROGTarget_SendByte(ReadSize - 1);
191
192 /* Send a LD command with indirect access and post-increment to read out the bytes */
193 XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
194 while (ReadSize-- && TimeoutTicksRemaining)
195 *(ReadBuffer++) = XPROGTarget_ReceiveByte();
196
197 return (TimeoutTicksRemaining != 0);
198 }
199
200 /** Writes byte addressed memory to the target's memory spaces.
201 *
202 * \param[in] WriteCommand Command to send to the device to write each memory byte
203 * \param[in] WriteAddress Address to write to within the target's address space
204 * \param[in] Byte Byte to write to the target
205 *
206 * \return Boolean true if the command sequence complete successfully
207 */
208 bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t Byte)
209 {
210 /* Wait until the NVM controller is no longer busy */
211 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
212 return false;
213
214 /* Send the memory write command to the target */
215 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
216 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
217 XPROGTarget_SendByte(WriteCommand);
218
219 /* Send new memory byte to the memory of the target */
220 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
221 XMEGANVM_SendAddress(WriteAddress);
222 XPROGTarget_SendByte(Byte);
223
224 /* Lock bytes need a special confirmation sequence for the write to complete */
225 if (WriteCommand == XMEGA_NVM_CMD_WRITELOCK)
226 {
227 /* Set CMDEX bit in NVM CTRLA register to start the Lock Byte write sequence */
228 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
229 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
230 XPROGTarget_SendByte(1 << 0);
231 }
232
233 return true;
234 }
235
236 /** Writes page addressed memory to the target's memory spaces.
237 *
238 * \param[in] WriteBuffCommand Command to send to the device to write a byte to the memory page buffer
239 * \param[in] EraseBuffCommand Command to send to the device to erase the memory page buffer
240 * \param[in] WritePageCommand Command to send to the device to write the page buffer to the destination memory
241 * \param[in] PageMode Bitfield indicating what operations need to be executed on the specified page
242 * \param[in] WriteAddress Start address to write the page data to within the target's address space
243 * \param[in] WriteBuffer Buffer to source data from
244 * \param[in] WriteSize Number of bytes to write
245 *
246 * \return Boolean true if the command sequence complete successfully
247 */
248 bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,
249 const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,
250 const uint8_t* WriteBuffer, uint16_t WriteSize)
251 {
252 if (PageMode & XPRG_PAGEMODE_ERASE)
253 {
254 /* Wait until the NVM controller is no longer busy */
255 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
256 return false;
257
258 /* Send the memory buffer erase command to the target */
259 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
260 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
261 XPROGTarget_SendByte(EraseBuffCommand);
262
263 /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
264 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
265 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
266 XPROGTarget_SendByte(1 << 0);
267 }
268
269 if (WriteSize)
270 {
271 /* Wait until the NVM controller is no longer busy */
272 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
273 return false;
274
275 /* Send the memory buffer write command to the target */
276 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
277 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
278 XPROGTarget_SendByte(WriteBuffCommand);
279
280 /* Load the PDI pointer register with the start address we want to write to */
281 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
282 XMEGANVM_SendAddress(WriteAddress);
283
284 /* Send the REPEAT command with the specified number of bytes to write */
285 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
286 XPROGTarget_SendByte(WriteSize - 1);
287
288 /* Send a ST command with indirect access and post-increment to write the bytes */
289 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
290 while (WriteSize--)
291 XPROGTarget_SendByte(*(WriteBuffer++));
292 }
293
294 if (PageMode & XPRG_PAGEMODE_WRITE)
295 {
296 /* Wait until the NVM controller is no longer busy */
297 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
298 return false;
299
300 /* Send the memory write command to the target */
301 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
302 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
303 XPROGTarget_SendByte(WritePageCommand);
304
305 /* Send the address of the first page location to write the memory page */
306 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
307 XMEGANVM_SendAddress(WriteAddress);
308 XPROGTarget_SendByte(0x00);
309 }
310
311 return true;
312 }
313
314 /** Erases a specific memory space of the target.
315 *
316 * \param[in] EraseCommand NVM erase command to send to the device
317 * \param[in] Address Address inside the memory space to erase
318 *
319 * \return Boolean true if the command sequence complete successfully
320 */
321 bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)
322 {
323 /* Wait until the NVM controller is no longer busy */
324 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
325 return false;
326
327 /* EEPROM and Chip erasures are triggered differently to FLASH section erasures */
328 if (EraseCommand == XMEGA_NVM_CMD_CHIPERASE)
329 {
330 /* Send the memory erase command to the target */
331 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
332 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
333 XPROGTarget_SendByte(EraseCommand);
334
335 /* Set CMDEX bit in NVM CTRLA register to start the erase sequence */
336 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
337 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
338 XPROGTarget_SendByte(1 << 0);
339 }
340 else if (EraseCommand == XMEGA_NVM_CMD_ERASEEEPROM)
341 {
342 /* Send the EEPROM page buffer erase command to the target */
343 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
344 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
345 XPROGTarget_SendByte(XMEGA_NVM_CMD_ERASEEEPROMPAGEBUFF);
346
347 /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
348 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
349 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
350 XPROGTarget_SendByte(1 << 0);
351
352 /* Wait until the NVM controller is no longer busy */
353 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
354 return false;
355
356 /* Send the EEPROM memory buffer write command to the target */
357 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
358 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
359 XPROGTarget_SendByte(XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF);
360
361 /* Load the PDI pointer register with the EEPROM page start address */
362 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
363 XMEGANVM_SendAddress(Address);
364
365 /* Send the REPEAT command with the specified number of bytes to write */
366 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
367 XPROGTarget_SendByte(XPROG_Param_EEPageSize - 1);
368
369 /* Send a ST command with indirect access and post-increment to tag each byte in the EEPROM page buffer */
370 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
371 for (uint8_t PageByte = 0; PageByte < XPROG_Param_EEPageSize; PageByte++)
372 XPROGTarget_SendByte(0x00);
373
374 /* Send the memory erase command to the target */
375 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
376 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
377 XPROGTarget_SendByte(EraseCommand);
378
379 /* Set CMDEX bit in NVM CTRLA register to start the EEPROM erase sequence */
380 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
381 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
382 XPROGTarget_SendByte(1 << 0);
383 }
384 else
385 {
386 /* Send the memory erase command to the target */
387 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
388 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
389 XPROGTarget_SendByte(EraseCommand);
390
391 /* Other erase modes just need us to address a byte within the target memory space */
392 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
393 XMEGANVM_SendAddress(Address);
394 XPROGTarget_SendByte(0x00);
395 }
396
397 /* Wait until the NVM bus is ready again */
398 if (!(XMEGANVM_WaitWhileNVMBusBusy()))
399 return false;
400
401 return true;
402 }
403
404 #endif