Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2010.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2010  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, distribute, and sell this
  13   software and its documentation for any purpose is hereby granted
  14   without fee, provided that the above copyright notice appear in
  15   all copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 /** \file
  32  *
  33  *  Target-related functions for the PDI Protocol decoder.
  34  */
  35
  36 #define  INCLUDE_FROM_XPROGTARGET_C
  37 #include "XPROGTarget.h"
  38
  39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
  40
  41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
  42 volatile bool               IsSending;
  43
  44 #if !defined(XPROG_VIA_HARDWARE_USART)
  45 /** Software USART raw frame bits for transmission/reception. */
  46 volatile uint16_t           SoftUSART_Data;
  47
  48 /** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
  49 #define SoftUSART_BitCount  GPIOR2
  50
  51
  52 /** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */
  53 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
  54 {
  55         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
  56         BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;
  57
  58         /* If not sending or receiving, just exit */
  59         if (!(SoftUSART_BitCount))
  60           return;
  61
  62         /* Check to see if we are at a rising or falling edge of the clock */
  63         if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)
  64         {
  65                 /* If at rising clock edge and we are in send mode, abort */
  66                 if (IsSending)
  67                   return;
  68
  69                 /* Wait for the start bit when receiving */
  70                 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
  71                   return;
  72
  73                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
  74                  * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */
  75                 if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)
  76                   ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
  77
  78                 SoftUSART_Data >>= 1;
  79                 SoftUSART_BitCount--;
  80         }
  81         else
  82         {
  83                 /* If at falling clock edge and we are in receive mode, abort */
  84                 if (!IsSending)
  85                   return;
  86
  87                 /* Set the data line to the next bit value */
  88                 if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
  89                   BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;
  90                 else
  91                   BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
  92
  93                 SoftUSART_Data >>= 1;
  94                 SoftUSART_BitCount--;
  95         }
  96 }
  97
  98 /** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */
  99 ISR(TIMER1_CAPT_vect, ISR_BLOCK)
 100 {
 101         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
 102         BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;
 103
 104         /* If not sending or receiving, just exit */
 105         if (!(SoftUSART_BitCount))
 106           return;
 107
 108         /* Check to see if we are at a rising or falling edge of the clock */
 109         if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)
 110         {
 111                 /* If at rising clock edge and we are in send mode, abort */
 112                 if (IsSending)
 113                   return;
 114
 115                 /* Wait for the start bit when receiving */
 116                 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))
 117                   return;
 118
 119                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
 120                  * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */
 121                 if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)
 122                  ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
 123
 124                 SoftUSART_Data >>= 1;
 125                 SoftUSART_BitCount--;
 126         }
 127         else
 128         {
 129                 /* If at falling clock edge and we are in receive mode, abort */
 130                 if (!IsSending)
 131                   return;
 132
 133                 /* Set the data line to the next bit value */
 134                 if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
 135                   BITBANG_TPIDATA_PORT |=  BITBANG_TPIDATA_MASK;
 136                 else
 137                   BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
 138
 139                 SoftUSART_Data >>= 1;
 140                 SoftUSART_BitCount--;
 141         }
 142 }
 143 #endif
 144
 145 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
 146 void XPROGTarget_EnableTargetPDI(void)
 147 {
 148         IsSending = false;
 149
 150 #if defined(XPROG_VIA_HARDWARE_USART)
 151         /* Set Tx and XCK as outputs, Rx as input */
 152         DDRD |=  (1 << 5) | (1 << 3);
 153         DDRD &= ~(1 << 2);
 154
 155         /* Set DATA line high for at least 90ns to disable /RESET functionality (note: too long will enable it again,
 156          * so a fixed number of NOPs are used here */
 157         PORTD |= (1 << 3);
 158         asm volatile ("NOP"::);
 159         asm volatile ("NOP"::);
 160
 161         /* Set up the synchronous USART for XMEGA communications -
 162            8 data bits, even parity, 2 stop bits */
 163         UBRR1  = (F_CPU / 500000UL);
 164         UCSR1B = (1 << TXEN1);
 165         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 166 #else
 167         /* Set DATA and CLOCK lines to outputs */
 168         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 169         BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
 170
 171         /* Set DATA line high for at least 90ns to disable /RESET functionality (note: too long will enable it again,
 172          * so a fixed number of NOPs are used here */
 173         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 174         asm volatile ("NOP"::);
 175         asm volatile ("NOP"::);
 176
 177         /* Fire timer compare channel A ISR to manage the software USART */
 178         OCR1A   = BITS_BETWEEN_USART_CLOCKS;
 179         TCCR1B  = (1 << WGM12) | (1 << CS10);
 180         TIMSK1  = (1 << OCIE1A);
 181 #endif
 182
 183         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
 184         XPROGTarget_SendBreak();
 185         XPROGTarget_SendBreak();
 186 }
 187
 188 /** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
 189 void XPROGTarget_EnableTargetTPI(void)
 190 {
 191         IsSending = false;
 192
 193         /* Set /RESET line low for at least 400ns to enable TPI functionality */
 194         AUX_LINE_DDR  |=  AUX_LINE_MASK;
 195         AUX_LINE_PORT &= ~AUX_LINE_MASK;
 196         _delay_ms(1);
 197
 198 #if defined(XPROG_VIA_HARDWARE_USART)
 199         /* Set Tx and XCK as outputs, Rx as input */
 200         DDRD |=  (1 << 5) | (1 << 3);
 201         DDRD &= ~(1 << 2);
 202
 203         /* Set up the synchronous USART for TINY communications -
 204            8 data bits, even parity, 2 stop bits */
 205         UBRR1  = (F_CPU / 500000UL);
 206         UCSR1B = (1 << TXEN1);
 207         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 208 #else
 209         /* Set DATA and CLOCK lines to outputs */
 210         BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;
 211         BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;
 212
 213         /* Set DATA line high for idle state */
 214         BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 215
 216         /* Fire timer capture channel ISR to manage the software USART */
 217         ICR1    = BITS_BETWEEN_USART_CLOCKS;
 218         TCCR1B  = (1 << WGM13) | (1 << WGM12) | (1 << CS10);
 219         TIMSK1  = (1 << ICIE1);
 220 #endif
 221
 222         /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
 223         XPROGTarget_SendBreak();
 224         XPROGTarget_SendBreak();
 225 }
 226
 227 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
 228 void XPROGTarget_DisableTargetPDI(void)
 229 {
 230         /* Switch to Rx mode to ensure that all pending transmissions are complete */
 231         XPROGTarget_SetRxMode();
 232
 233 #if defined(XPROG_VIA_HARDWARE_USART)
 234         /* Set /RESET high for a one millisecond to ensure target device is restarted */
 235         PORTD |= (1 << 5);
 236         _delay_ms(1);
 237
 238         /* Turn off receiver and transmitter of the USART, clear settings */
 239         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 240         UCSR1B  = 0;
 241         UCSR1C  = 0;
 242
 243         /* Set all USART lines as input, tristate */
 244         DDRD  &= ~((1 << 5) | (1 << 3));
 245         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 246 #else
 247         /* Set /RESET high for a one millisecond to ensure target device is restarted */
 248         BITBANG_PDICLOCK_PORT |= BITBANG_PDICLOCK_MASK;
 249         _delay_ms(1);
 250
 251         /* Set DATA and CLOCK lines to inputs */
 252         BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 253         BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
 254
 255         /* Tristate DATA and CLOCK lines */
 256         BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;
 257         BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
 258 #endif
 259 }
 260
 261 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */
 262 void XPROGTarget_DisableTargetTPI(void)
 263 {
 264         /* Switch to Rx mode to ensure that all pending transmissions are complete */
 265         XPROGTarget_SetRxMode();
 266
 267 #if defined(XPROG_VIA_HARDWARE_USART)
 268         /* Turn off receiver and transmitter of the USART, clear settings */
 269         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 270         UCSR1B  = 0;
 271         UCSR1C  = 0;
 272
 273         /* Set all USART lines as input, tristate */
 274         DDRD  &= ~((1 << 5) | (1 << 3));
 275         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 276 #else
 277         /* Set DATA and CLOCK lines to inputs */
 278         BITBANG_TPIDATA_DDR   &= ~BITBANG_TPIDATA_MASK;
 279         BITBANG_TPICLOCK_DDR  &= ~BITBANG_TPICLOCK_MASK;
 280
 281         /* Tristate DATA and CLOCK lines */
 282         BITBANG_TPIDATA_PORT  &= ~BITBANG_TPIDATA_MASK;
 283         BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;
 284 #endif
 285
 286         /* Tristate target /RESET line */
 287         AUX_LINE_DDR  &= ~AUX_LINE_MASK;
 288         AUX_LINE_PORT &= ~AUX_LINE_MASK;
 289 }
 290
 291 /** Sends a byte via the USART.
 292  *
 293  *  \param[in] Byte  Byte to send through the USART
 294  */
 295 void XPROGTarget_SendByte(const uint8_t Byte)
 296 {
 297         /* Switch to Tx mode if currently in Rx mode */
 298         if (!(IsSending))
 299           XPROGTarget_SetTxMode();
 300
 301 #if defined(XPROG_VIA_HARDWARE_USART)
 302         /* Wait until there is space in the hardware Tx buffer before writing */
 303         while (!(UCSR1A & (1 << UDRE1)));
 304         UCSR1A |= (1 << TXC1);
 305         UDR1    = Byte;
 306 #else
 307         /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */
 308         uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));
 309
 310         /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */
 311         uint8_t ParityData = Byte;
 312         while (ParityData)
 313         {
 314                 NewUSARTData ^= (1 << 9);
 315                 ParityData   &= (ParityData - 1);
 316         }
 317
 318         /* Wait until transmitter is idle before writing new data */
 319         while (SoftUSART_BitCount);
 320
 321         /* Data shifted out LSB first, START DATA PARITY STOP STOP */
 322         SoftUSART_Data     = NewUSARTData;
 323         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 324 #endif
 325 }
 326
 327 /** Receives a byte via the software USART, blocking until data is received.
 328  *
 329  *  \return Received byte from the USART
 330  */
 331 uint8_t XPROGTarget_ReceiveByte(void)
 332 {
 333         /* Switch to Rx mode if currently in Tx mode */
 334         if (IsSending)
 335           XPROGTarget_SetRxMode();
 336
 337 #if defined(XPROG_VIA_HARDWARE_USART)
 338         /* Wait until a byte has been received before reading */
 339         while (!(UCSR1A & (1 << RXC1)) && TimeoutMSRemaining);
 340         return UDR1;
 341 #else
 342         /* Wait until a byte has been received before reading */
 343         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 344         while (SoftUSART_BitCount && TimeoutMSRemaining);
 345
 346         /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */
 347         return (uint8_t)SoftUSART_Data;
 348 #endif
 349 }
 350
 351 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
 352 void XPROGTarget_SendBreak(void)
 353 {
 354         /* Switch to Tx mode if currently in Rx mode */
 355         if (!(IsSending))
 356           XPROGTarget_SetTxMode();
 357
 358 #if defined(XPROG_VIA_HARDWARE_USART)
 359         /* Need to do nothing for a full frame to send a BREAK */
 360         for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
 361         {
 362                 /* Wait for a full cycle of the clock */
 363                 while (PIND & (1 << 5));
 364                 while (!(PIND & (1 << 5)));
 365         }
 366 #else
 367         while (SoftUSART_BitCount);
 368
 369         /* Need to do nothing for a full frame to send a BREAK */
 370         SoftUSART_Data     = 0x0FFF;
 371         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 372 #endif
 373 }
 374
 375 static void XPROGTarget_SetTxMode(void)
 376 {
 377 #if defined(XPROG_VIA_HARDWARE_USART)
 378         /* Wait for a full cycle of the clock */
 379         while (PIND & (1 << 5));
 380         while (!(PIND & (1 << 5)));
 381
 382         PORTD  |=  (1 << 3);
 383         DDRD   |=  (1 << 3);
 384
 385         UCSR1B &= ~(1 << RXEN1);
 386         UCSR1B |=  (1 << TXEN1);
 387
 388         IsSending = true;
 389 #else
 390         while (SoftUSART_BitCount);
 391
 392         /* Wait for a full cycle of the clock */
 393         SoftUSART_Data     = 0x0001;
 394         SoftUSART_BitCount = 1;
 395         while (SoftUSART_BitCount);
 396
 397         if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
 398         {
 399                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 400                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 401         }
 402         else
 403         {
 404                 BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 405                 BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;
 406         }
 407 #endif
 408
 409         IsSending = true;
 410 }
 411
 412 static void XPROGTarget_SetRxMode(void)
 413 {
 414 #if defined(XPROG_VIA_HARDWARE_USART)
 415         while (!(UCSR1A & (1 << TXC1)));
 416         UCSR1A |=  (1 << TXC1);
 417
 418         UCSR1B &= ~(1 << TXEN1);
 419         UCSR1B |=  (1 << RXEN1);
 420
 421         DDRD   &= ~(1 << 3);
 422         PORTD  &= ~(1 << 3);
 423 #else
 424         while (SoftUSART_BitCount);
 425
 426         if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
 427         {
 428                 BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 429                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 430         }
 431         else
 432         {
 433                 BITBANG_TPIDATA_DDR  &= ~BITBANG_TPIDATA_MASK;
 434                 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
 435         }
 436
 437         /* Wait until DATA line has been pulled up to idle by the target */
 438         while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK) && TimeoutMSRemaining);
 439 #endif
 440
 441         IsSending = false;
 442 }
 443
 444 #endif