Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2010.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2010  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, distribute, and sell this
  13   software and its documentation for any purpose is hereby granted
  14   without fee, provided that the above copyright notice appear in
  15   all copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 /** \file
  32  *
  33  *  Target-related functions for the PDI Protocol decoder.
  34  */
  35
  36 #define  INCLUDE_FROM_XPROGTARGET_C
  37 #include "XPROGTarget.h"
  38
  39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
  40
  41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
  42 volatile bool               IsSending;
  43
  44 #if !defined(XPROG_VIA_HARDWARE_USART)
  45 /** Software USART raw frame bits for transmission/reception. */
  46 volatile uint16_t           SoftUSART_Data;
  47
  48 /** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
  49 #define SoftUSART_BitCount  GPIOR2
  50
  51
  52 /** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */
  53 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
  54 {
  55         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
  56         BITBANG_PDICLOCK_PIN = BITBANG_PDICLOCK_MASK;
  57
  58         /* If not sending or receiving, just exit */
  59         if (!(SoftUSART_BitCount))
  60           return;
  61
  62         /* Check to see if we are at a rising or falling edge of the clock */
  63         if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)
  64         {
  65                 /* If at rising clock edge and we are in send mode, abort */
  66                 if (IsSending)
  67                   return;
  68
  69                 /* Wait for the start bit when receiving */
  70                 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
  71                   return;
  72
  73                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
  74                  * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */
  75                 if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)
  76                   ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
  77
  78                 SoftUSART_Data >>= 1;
  79                 SoftUSART_BitCount--;
  80         }
  81         else
  82         {
  83                 /* If at falling clock edge and we are in receive mode, abort */
  84                 if (!IsSending)
  85                   return;
  86
  87                 /* Set the data line to the next bit value */
  88                 if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
  89                   BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;
  90                 else
  91                   BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
  92
  93                 SoftUSART_Data >>= 1;
  94                 SoftUSART_BitCount--;
  95         }
  96 }
  97
  98 /** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */
  99 ISR(TIMER1_CAPT_vect, ISR_BLOCK)
 100 {
 101         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
 102         BITBANG_TPICLOCK_PIN = BITBANG_TPICLOCK_MASK;
 103
 104         /* If not sending or receiving, just exit */
 105         if (!(SoftUSART_BitCount))
 106           return;
 107
 108         /* Check to see if we are at a rising or falling edge of the clock */
 109         if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)
 110         {
 111                 /* If at rising clock edge and we are in send mode, abort */
 112                 if (IsSending)
 113                   return;
 114
 115                 /* Wait for the start bit when receiving */
 116                 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))
 117                   return;
 118
 119                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
 120                  * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */
 121                 if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)
 122                  ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
 123
 124                 SoftUSART_Data >>= 1;
 125                 SoftUSART_BitCount--;
 126         }
 127         else
 128         {
 129                 /* If at falling clock edge and we are in receive mode, abort */
 130                 if (!IsSending)
 131                   return;
 132
 133                 /* Set the data line to the next bit value */
 134                 if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
 135                   BITBANG_TPIDATA_PORT |=  BITBANG_TPIDATA_MASK;
 136                 else
 137                   BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
 138
 139                 SoftUSART_Data >>= 1;
 140                 SoftUSART_BitCount--;
 141         }
 142 }
 143 #endif
 144
 145 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
 146 void XPROGTarget_EnableTargetPDI(void)
 147 {
 148         IsSending = false;
 149
 150 #if defined(XPROG_VIA_HARDWARE_USART)
 151         /* Set Tx and XCK as outputs, Rx as input */
 152         DDRD |=  (1 << 5) | (1 << 3);
 153         DDRD &= ~(1 << 2);
 154
 155         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 156         PORTD |= (1 << 3);
 157         _delay_us(1);
 158
 159         /* Set up the synchronous USART for XMEGA communications - 8 data bits, even parity, 2 stop bits */
 160         UBRR1  = (F_CPU / XPROG_HARDWARE_SPEED);
 161         UCSR1B = (1 << TXEN1);
 162         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 163 #else
 164         /* Set DATA and CLOCK lines to outputs */
 165         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 166         BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
 167
 168         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 169         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 170         _delay_us(1);
 171
 172         /* Fire timer compare channel A ISR to manage the software USART */
 173         OCR1A  = BITS_BETWEEN_USART_CLOCKS;
 174         TCCR1B = (1 << WGM12) | (1 << CS10);
 175         TIMSK1 = (1 << OCIE1A);
 176 #endif
 177
 178         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
 179         XPROGTarget_SendBreak();
 180         XPROGTarget_SendBreak();
 181 }
 182
 183 /** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
 184 void XPROGTarget_EnableTargetTPI(void)
 185 {
 186         IsSending = false;
 187
 188         /* Set /RESET line low for at least 400ns to enable TPI functionality */
 189         AUX_LINE_DDR  |=  AUX_LINE_MASK;
 190         AUX_LINE_PORT &= ~AUX_LINE_MASK;
 191         _delay_us(1);
 192
 193 #if defined(XPROG_VIA_HARDWARE_USART)
 194         /* Set Tx and XCK as outputs, Rx as input */
 195         DDRD |=  (1 << 5) | (1 << 3);
 196         DDRD &= ~(1 << 2);
 197
 198         /* Set up the synchronous USART for TINY communications - 8 data bits, even parity, 2 stop bits */
 199         UBRR1  = (F_CPU / XPROG_HARDWARE_SPEED);
 200         UCSR1B = (1 << TXEN1);
 201         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 202 #else
 203         /* Set DATA and CLOCK lines to outputs */
 204         BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;
 205         BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;
 206
 207         /* Set DATA line high for idle state */
 208         BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 209
 210         /* Fire timer capture channel ISR to manage the software USART */
 211         ICR1   = BITS_BETWEEN_USART_CLOCKS;
 212         TCCR1B = (1 << WGM13) | (1 << WGM12) | (1 << CS10);
 213         TIMSK1 = (1 << ICIE1);
 214 #endif
 215
 216         /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
 217         XPROGTarget_SendBreak();
 218         XPROGTarget_SendBreak();
 219 }
 220
 221 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
 222 void XPROGTarget_DisableTargetPDI(void)
 223 {
 224         /* Switch to Rx mode to ensure that all pending transmissions are complete */
 225         XPROGTarget_SetRxMode();
 226
 227 #if defined(XPROG_VIA_HARDWARE_USART)
 228         /* Turn off receiver and transmitter of the USART, clear settings */
 229         UCSR1A  = ((1 << TXC1) | (1 << RXC1));
 230         UCSR1B  = 0;
 231         UCSR1C  = 0;
 232
 233         /* Tristate all pins */
 234         DDRD  &= ~((1 << 5) | (1 << 3));
 235         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 236 #else
 237         /* Turn off software USART management timer */
 238         TCCR1B = 0;
 239
 240         /* Set DATA and CLOCK lines to inputs */
 241         BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 242         BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
 243
 244         /* Tristate DATA and CLOCK lines */
 245         BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;
 246         BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
 247 #endif
 248 }
 249
 250 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */
 251 void XPROGTarget_DisableTargetTPI(void)
 252 {
 253         /* Switch to Rx mode to ensure that all pending transmissions are complete */
 254         XPROGTarget_SetRxMode();
 255
 256 #if defined(XPROG_VIA_HARDWARE_USART)
 257         /* Turn off receiver and transmitter of the USART, clear settings */
 258         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 259         UCSR1B  = 0;
 260         UCSR1C  = 0;
 261
 262         /* Set all USART lines as input, tristate */
 263         DDRD  &= ~((1 << 5) | (1 << 3));
 264         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 265 #else
 266         /* Turn off software USART management timer */
 267         TCCR1B = 0;
 268
 269         /* Set DATA and CLOCK lines to inputs */
 270         BITBANG_TPIDATA_DDR   &= ~BITBANG_TPIDATA_MASK;
 271         BITBANG_TPICLOCK_DDR  &= ~BITBANG_TPICLOCK_MASK;
 272
 273         /* Tristate DATA and CLOCK lines */
 274         BITBANG_TPIDATA_PORT  &= ~BITBANG_TPIDATA_MASK;
 275         BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;
 276 #endif
 277
 278         /* Tristate target /RESET line */
 279         AUX_LINE_DDR  &= ~AUX_LINE_MASK;
 280         AUX_LINE_PORT &= ~AUX_LINE_MASK;
 281 }
 282
 283 /** Sends a byte via the USART.
 284  *
 285  *  \param[in] Byte  Byte to send through the USART
 286  */
 287 void XPROGTarget_SendByte(const uint8_t Byte)
 288 {
 289         /* Switch to Tx mode if currently in Rx mode */
 290         if (!(IsSending))
 291           XPROGTarget_SetTxMode();
 292
 293 #if defined(XPROG_VIA_HARDWARE_USART)
 294         /* Wait until there is space in the hardware Tx buffer before writing */
 295         while (!(UCSR1A & (1 << UDRE1)));
 296         UCSR1A |= (1 << TXC1);
 297         UDR1    = Byte;
 298 #else
 299         /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */
 300         uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));
 301
 302         /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */
 303         uint8_t ParityData = Byte;
 304         while (ParityData)
 305         {
 306                 NewUSARTData ^= (1 << 9);
 307                 ParityData   &= (ParityData - 1);
 308         }
 309
 310         /* Wait until transmitter is idle before writing new data */
 311         while (SoftUSART_BitCount);
 312
 313         /* Data shifted out LSB first, START DATA PARITY STOP STOP */
 314         SoftUSART_Data     = NewUSARTData;
 315         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 316 #endif
 317 }
 318
 319 /** Receives a byte via the software USART, blocking until data is received.
 320  *
 321  *  \return Received byte from the USART
 322  */
 323 uint8_t XPROGTarget_ReceiveByte(void)
 324 {
 325         /* Switch to Rx mode if currently in Tx mode */
 326         if (IsSending)
 327           XPROGTarget_SetRxMode();
 328
 329 #if defined(XPROG_VIA_HARDWARE_USART)
 330         /* Wait until a byte has been received before reading */
 331         while (!(UCSR1A & (1 << RXC1)) && TimeoutMSRemaining);
 332
 333         if (TimeoutMSRemaining)
 334           TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
 335
 336         return UDR1;
 337 #else
 338         /* Wait until a byte has been received before reading */
 339         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 340         while (SoftUSART_BitCount && TimeoutMSRemaining);
 341
 342         if (TimeoutMSRemaining)
 343           TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
 344
 345         /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */
 346         return (uint8_t)SoftUSART_Data;
 347 #endif
 348 }
 349
 350 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
 351 void XPROGTarget_SendBreak(void)
 352 {
 353         /* Switch to Tx mode if currently in Rx mode */
 354         if (!(IsSending))
 355           XPROGTarget_SetTxMode();
 356
 357 #if defined(XPROG_VIA_HARDWARE_USART)
 358         /* Need to do nothing for a full frame to send a BREAK */
 359         for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
 360         {
 361                 /* Wait for a full cycle of the clock */
 362                 while (PIND & (1 << 5));
 363                 while (!(PIND & (1 << 5)));
 364         }
 365 #else
 366         while (SoftUSART_BitCount);
 367
 368         /* Need to do nothing for a full frame to send a BREAK */
 369         SoftUSART_Data     = 0x0FFF;
 370         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 371 #endif
 372 }
 373
 374 static void XPROGTarget_SetTxMode(void)
 375 {
 376 #if defined(XPROG_VIA_HARDWARE_USART)
 377         /* Wait for a full cycle of the clock */
 378         while (PIND & (1 << 5));
 379         while (!(PIND & (1 << 5)));
 380
 381         PORTD  |=  (1 << 3);
 382         DDRD   |=  (1 << 3);
 383
 384         UCSR1B &= ~(1 << RXEN1);
 385         UCSR1B |=  (1 << TXEN1);
 386
 387         IsSending = true;
 388 #else
 389         while (SoftUSART_BitCount && TimeoutMSRemaining);
 390
 391         /* Wait for a full cycle of the clock */
 392         SoftUSART_Data     = 0x0001;
 393         SoftUSART_BitCount = 1;
 394         while (SoftUSART_BitCount);
 395
 396         if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
 397         {
 398                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 399                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 400         }
 401         else
 402         {
 403                 BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 404                 BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;
 405         }
 406 #endif
 407
 408         IsSending = true;
 409 }
 410
 411 static void XPROGTarget_SetRxMode(void)
 412 {
 413 #if defined(XPROG_VIA_HARDWARE_USART)
 414         while (!(UCSR1A & (1 << TXC1)));
 415         UCSR1A |=  (1 << TXC1);
 416
 417         UCSR1B &= ~(1 << TXEN1);
 418         UCSR1B |=  (1 << RXEN1);
 419
 420         DDRD   &= ~(1 << 3);
 421         PORTD  &= ~(1 << 3);
 422 #else
 423         while (SoftUSART_BitCount && TimeoutMSRemaining);
 424
 425         if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
 426         {
 427                 BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 428                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 429
 430                 /* Wait until DATA line has been pulled up to idle by the target */
 431                 while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK) && TimeoutMSRemaining);
 432         }
 433         else
 434         {
 435                 BITBANG_TPIDATA_DDR  &= ~BITBANG_TPIDATA_MASK;
 436                 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
 437
 438                 /* Wait until DATA line has been pulled up to idle by the target */
 439                 while (!(BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK) && TimeoutMSRemaining);
 440         }
 441 #endif
 442
 443     if (TimeoutMSRemaining)
 444           TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
 445
 446         IsSending = false;
 447 }
 448
 449 #endif