3      Copyright (C) Dean Camera, 2010. 
   5   dean [at] fourwalledcubicle [dot] com 
   6       www.fourwalledcubicle.com 
  10   Copyright 2010  Dean Camera (dean [at] fourwalledcubicle [dot] com) 
  12   Permission to use, copy, modify, distribute, and sell this  
  13   software and its documentation for any purpose is hereby granted 
  14   without fee, provided that the above copyright notice appear in  
  15   all copies and that both that the copyright notice and this 
  16   permission notice and warranty disclaimer appear in supporting  
  17   documentation, and that the name of the author not be used in  
  18   advertising or publicity pertaining to distribution of the  
  19   software without specific, written prior permission. 
  21   The author disclaim all warranties with regard to this 
  22   software, including all implied warranties of merchantability 
  23   and fitness.  In no event shall the author be liable for any 
  24   special, indirect or consequential damages or any damages 
  25   whatsoever resulting from loss of use, data or profits, whether 
  26   in an action of contract, negligence or other tortious action, 
  27   arising out of or in connection with the use or performance of 
  33  *  Target-related functions for the PDI Protocol decoder. 
  36 #define  INCLUDE_FROM_XPROGTARGET_C 
  37 #include "XPROGTarget.h" 
  39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__) 
  41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */ 
  42 volatile bool               IsSending
; 
  44 #if !defined(XPROG_VIA_HARDWARE_USART) 
  45 /** Software USART raw frame bits for transmission/reception. */ 
  46 volatile uint16_t           SoftUSART_Data
; 
  48 /** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */ 
  49 #define SoftUSART_BitCount  GPIOR2 
  52 /** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */ 
  53 ISR(TIMER1_COMPA_vect
, ISR_BLOCK
) 
  55         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */ 
  56         BITBANG_PDICLOCK_PIN 
= BITBANG_PDICLOCK_MASK
; 
  58         /* If not sending or receiving, just exit */ 
  59         if (!(SoftUSART_BitCount
)) 
  62         /* Check to see if we are at a rising or falling edge of the clock */ 
  63         if (BITBANG_PDICLOCK_PORT 
& BITBANG_PDICLOCK_MASK
) 
  65                 /* If at rising clock edge and we are in send mode, abort */ 
  69                 /* Wait for the start bit when receiving */ 
  70                 if ((SoftUSART_BitCount 
== BITS_IN_USART_FRAME
) && (BITBANG_PDIDATA_PIN 
& BITBANG_PDIDATA_MASK
)) 
  73                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually 
  74                  * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */ 
  75                 if (BITBANG_PDIDATA_PIN 
& BITBANG_PDIDATA_MASK
) 
  76                   ((uint8_t*)&SoftUSART_Data
)[1] |= (1 << (BITS_IN_USART_FRAME 
- 9)); 
  83                 /* If not sending or receiving, just exit */ 
  84                 if (!(SoftUSART_BitCount
)) 
  87                 /* If at falling clock edge and we are in receive mode, abort */ 
  91                 /* Set the data line to the next bit value */ 
  92                 if (((uint8_t*)&SoftUSART_Data
)[0] & 0x01) 
  93                   BITBANG_PDIDATA_PORT 
|=  BITBANG_PDIDATA_MASK
; 
  95                   BITBANG_PDIDATA_PORT 
&= ~BITBANG_PDIDATA_MASK
;                   
 102 /** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */ 
 103 ISR(TIMER1_CAPT_vect
, ISR_BLOCK
) 
 105         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */ 
 106         BITBANG_TPICLOCK_PIN 
= BITBANG_TPICLOCK_MASK
; 
 108         /* If not sending or receiving, just exit */ 
 109         if (!(SoftUSART_BitCount
)) 
 112         /* Check to see if we are at a rising or falling edge of the clock */ 
 113         if (BITBANG_TPICLOCK_PORT 
& BITBANG_TPICLOCK_MASK
) 
 115                 /* If at rising clock edge and we are in send mode, abort */ 
 119                 /* Wait for the start bit when receiving */ 
 120                 if ((SoftUSART_BitCount 
== BITS_IN_USART_FRAME
) && (BITBANG_TPIDATA_PIN 
& BITBANG_TPIDATA_MASK
)) 
 123                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually 
 124                  * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */ 
 125                 if (BITBANG_TPIDATA_PIN 
& BITBANG_TPIDATA_MASK
) 
 126                  ((uint8_t*)&SoftUSART_Data
)[1] |= (1 << (BITS_IN_USART_FRAME 
- 9)); 
 128                 SoftUSART_Data 
>>= 1; 
 129                 SoftUSART_BitCount
--; 
 133                 /* If at falling clock edge and we are in receive mode, abort */ 
 137                 /* Set the data line to the next bit value */ 
 138                 if (((uint8_t*)&SoftUSART_Data
)[0] & 0x01) 
 139                   BITBANG_TPIDATA_PORT 
|=  BITBANG_TPIDATA_MASK
; 
 141                   BITBANG_TPIDATA_PORT 
&= ~BITBANG_TPIDATA_MASK
;                   
 143                 SoftUSART_Data 
>>= 1; 
 144                 SoftUSART_BitCount
--; 
 149 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */ 
 150 void XPROGTarget_EnableTargetPDI(void) 
 154 #if defined(XPROG_VIA_HARDWARE_USART) 
 155         /* Set Tx and XCK as outputs, Rx as input */ 
 156         DDRD 
|=  (1 << 5) | (1 << 3); 
 159         /* Set DATA line high for at least 90ns to disable /RESET functionality */ 
 163         /* Set up the synchronous USART for XMEGA communications -  
 164            8 data bits, even parity, 2 stop bits */ 
 165         UBRR1  
= (F_CPU 
/ 500000UL); 
 166         UCSR1B 
= (1 << TXEN1
); 
 167         UCSR1C 
= (1 << UMSEL10
) | (1 << UPM11
) | (1 << USBS1
) | (1 << UCSZ11
) | (1 << UCSZ10
) | (1 << UCPOL1
); 
 169         /* Set DATA and CLOCK lines to outputs */ 
 170         BITBANG_PDIDATA_DDR  
|= BITBANG_PDIDATA_MASK
; 
 171         BITBANG_PDICLOCK_DDR 
|= BITBANG_PDICLOCK_MASK
; 
 173         /* Set DATA line high for at least 90ns to disable /RESET functionality */ 
 174         BITBANG_PDIDATA_PORT 
|= BITBANG_PDIDATA_MASK
; 
 177         /* Fire timer compare channel A ISR to manage the software USART */ 
 178         OCR1A   
= BITS_BETWEEN_USART_CLOCKS
; 
 179         OCR1B   
= BITS_BETWEEN_USART_CLOCKS
; 
 180         TCCR1B  
= (1 << WGM12
) | (1 << CS10
); 
 181         TIMSK1  
= (1 << OCIE1A
); 
 184         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */ 
 185         XPROGTarget_SendBreak(); 
 186         XPROGTarget_SendBreak(); 
 189 /** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */ 
 190 void XPROGTarget_EnableTargetTPI(void) 
 194         /* Set /RESET line low for at least 400ns to enable TPI functionality */ 
 195         AUX_LINE_DDR  
|=  AUX_LINE_MASK
; 
 196         AUX_LINE_PORT 
&= ~AUX_LINE_MASK
; 
 199 #if defined(XPROG_VIA_HARDWARE_USART) 
 200         /* Set Tx and XCK as outputs, Rx as input */ 
 201         DDRD 
|=  (1 << 5) | (1 << 3); 
 204         /* Set up the synchronous USART for TINY communications -  
 205            8 data bits, even parity, 2 stop bits */ 
 206         UBRR1  
= (F_CPU 
/ 500000UL); 
 207         UCSR1B 
= (1 << TXEN1
); 
 208         UCSR1C 
= (1 << UMSEL10
) | (1 << UPM11
) | (1 << USBS1
) | (1 << UCSZ11
) | (1 << UCSZ10
) | (1 << UCPOL1
); 
 210         /* Set DATA and CLOCK lines to outputs */ 
 211         BITBANG_TPIDATA_DDR  
|= BITBANG_TPIDATA_MASK
; 
 212         BITBANG_TPICLOCK_DDR 
|= BITBANG_TPICLOCK_MASK
; 
 214         /* Set DATA line high for idle state */ 
 215         BITBANG_TPIDATA_PORT 
|= BITBANG_TPIDATA_MASK
; 
 217         /* Fire timer capture channel ISR to manage the software USART */ 
 218         ICR1    
= BITS_BETWEEN_USART_CLOCKS
; 
 219         TCCR1B  
= (1 << WGM13
) | (1 << WGM12
) | (1 << CS10
); 
 220         TIMSK1  
= (1 << ICIE1
); 
 223         /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */ 
 224         XPROGTarget_SendBreak(); 
 225         XPROGTarget_SendBreak(); 
 228 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */ 
 229 void XPROGTarget_DisableTargetPDI(void) 
 231         /* Switch to Rx mode to ensure that all pending transmissions are complete */ 
 232         XPROGTarget_SetRxMode(); 
 234 #if defined(XPROG_VIA_HARDWARE_USART) 
 235         /* Turn off receiver and transmitter of the USART, clear settings */ 
 236         UCSR1A  
= ((1 << TXC1
) | (1 << RXC1
)); 
 240         /* Tristate all pins */ 
 241         DDRD  
&= ~((1 << 5) | (1 << 3)); 
 242         PORTD 
&= ~((1 << 3) | (1 << 2)); 
 244         /* Turn off software USART management timer */ 
 247         /* Tristate all pins */ 
 248         BITBANG_PDIDATA_DDR   
&= ~BITBANG_PDIDATA_MASK
; 
 249         BITBANG_PDICLOCK_DDR  
&= ~BITBANG_PDICLOCK_MASK
; 
 250         BITBANG_PDICLOCK_PORT 
&= ~BITBANG_PDICLOCK_MASK
;         
 251         BITBANG_PDIDATA_PORT  
&= ~BITBANG_PDIDATA_MASK
; 
 255 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */ 
 256 void XPROGTarget_DisableTargetTPI(void) 
 258         /* Switch to Rx mode to ensure that all pending transmissions are complete */ 
 259         XPROGTarget_SetRxMode(); 
 261 #if defined(XPROG_VIA_HARDWARE_USART) 
 262         /* Turn off receiver and transmitter of the USART, clear settings */ 
 263         UCSR1A 
|= (1 << TXC1
) | (1 << RXC1
); 
 267         /* Set all USART lines as input, tristate */ 
 268         DDRD  
&= ~((1 << 5) | (1 << 3)); 
 269         PORTD 
&= ~((1 << 5) | (1 << 3) | (1 << 2)); 
 271         /* Turn off software USART management timer */ 
 274         /* Set DATA and CLOCK lines to inputs */ 
 275         BITBANG_TPIDATA_DDR   
&= ~BITBANG_TPIDATA_MASK
; 
 276         BITBANG_TPICLOCK_DDR  
&= ~BITBANG_TPICLOCK_MASK
; 
 278         /* Tristate DATA and CLOCK lines */ 
 279         BITBANG_TPIDATA_PORT  
&= ~BITBANG_TPIDATA_MASK
; 
 280         BITBANG_TPICLOCK_PORT 
&= ~BITBANG_TPICLOCK_MASK
; 
 283         /* Tristate target /RESET line */ 
 284         AUX_LINE_DDR  
&= ~AUX_LINE_MASK
; 
 285         AUX_LINE_PORT 
&= ~AUX_LINE_MASK
; 
 288 /** Sends a byte via the USART. 
 290  *  \param[in] Byte  Byte to send through the USART 
 292 void XPROGTarget_SendByte(const uint8_t Byte
) 
 294         /* Switch to Tx mode if currently in Rx mode */ 
 296           XPROGTarget_SetTxMode(); 
 298 #if defined(XPROG_VIA_HARDWARE_USART) 
 299         /* Wait until there is space in the hardware Tx buffer before writing */ 
 300         while (!(UCSR1A 
& (1 << UDRE1
))); 
 301         UCSR1A 
|= (1 << TXC1
); 
 304         /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */ 
 305         uint16_t NewUSARTData 
= ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte 
<< 1) | (0 << 0)); 
 307         /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */ 
 308         uint8_t ParityData 
= Byte
; 
 311                 NewUSARTData 
^= (1 << 9); 
 312                 ParityData   
&= (ParityData 
- 1); 
 315         /* Wait until transmitter is idle before writing new data */ 
 316         while (SoftUSART_BitCount
); 
 318         /* Data shifted out LSB first, START DATA PARITY STOP STOP */ 
 319         SoftUSART_Data     
= NewUSARTData
; 
 320         SoftUSART_BitCount 
= BITS_IN_USART_FRAME
; 
 324 /** Receives a byte via the software USART, blocking until data is received. 
 326  *  \return Received byte from the USART 
 328 uint8_t XPROGTarget_ReceiveByte(void) 
 330         /* Switch to Rx mode if currently in Tx mode */ 
 332           XPROGTarget_SetRxMode(); 
 334 #if defined(XPROG_VIA_HARDWARE_USART) 
 335         /* Wait until a byte has been received before reading */ 
 336         while (!(UCSR1A 
& (1 << RXC1
)) && TimeoutMSRemaining
) 
 338                 /* Manage software timeout */ 
 339                 if (TIFR0 
& (1 << OCF0A
)) 
 341                         TIFR0 
|= (1 << OCF0A
); 
 342                         TimeoutMSRemaining
--; 
 348         /* Wait until a byte has been received before reading */ 
 349         SoftUSART_BitCount 
= BITS_IN_USART_FRAME
; 
 350         while (SoftUSART_BitCount 
&& TimeoutMSRemaining
) 
 352                 /* Manage software timeout */ 
 353                 if (TIFR0 
& (1 << OCF0A
)) 
 355                         TIFR0 
|= (1 << OCF0A
); 
 356                         TimeoutMSRemaining
--; 
 360         if (TimeoutMSRemaining
) 
 361           TimeoutMSRemaining 
= COMMAND_TIMEOUT_MS
; 
 363         /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */ 
 364         return (uint8_t)SoftUSART_Data
; 
 368 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */ 
 369 void XPROGTarget_SendBreak(void) 
 371         /* Switch to Tx mode if currently in Rx mode */ 
 373           XPROGTarget_SetTxMode(); 
 375 #if defined(XPROG_VIA_HARDWARE_USART) 
 376         /* Need to do nothing for a full frame to send a BREAK */ 
 377         for (uint8_t i 
= 0; i 
< BITS_IN_USART_FRAME
; i
++) 
 379                 /* Wait for a full cycle of the clock */ 
 380                 while (PIND 
& (1 << 5)); 
 381                 while (!(PIND 
& (1 << 5))); 
 384         while (SoftUSART_BitCount
); 
 386         /* Need to do nothing for a full frame to send a BREAK */ 
 387         SoftUSART_Data     
= 0x0FFF; 
 388         SoftUSART_BitCount 
= BITS_IN_USART_FRAME
; 
 392 static void XPROGTarget_SetTxMode(void) 
 394 #if defined(XPROG_VIA_HARDWARE_USART) 
 395         /* Wait for a full cycle of the clock */ 
 396         while (PIND 
& (1 << 5)); 
 397         while (!(PIND 
& (1 << 5))); 
 402         UCSR1B 
&= ~(1 << RXEN1
); 
 403         UCSR1B 
|=  (1 << TXEN1
); 
 407         while (SoftUSART_BitCount
); 
 409         /* Wait for a full cycle of the clock */ 
 410         SoftUSART_Data     
= 0x0001; 
 411         SoftUSART_BitCount 
= 1; 
 412         while (SoftUSART_BitCount
); 
 414         if (XPROG_SelectedProtocol 
== XPRG_PROTOCOL_PDI
) 
 416                 BITBANG_PDIDATA_PORT 
|= BITBANG_PDIDATA_MASK
; 
 417                 BITBANG_PDIDATA_DDR  
|= BITBANG_PDIDATA_MASK
; 
 421                 BITBANG_TPIDATA_PORT 
|= BITBANG_TPIDATA_MASK
; 
 422                 BITBANG_TPIDATA_DDR  
|= BITBANG_TPIDATA_MASK
;    
 429 static void XPROGTarget_SetRxMode(void) 
 431 #if defined(XPROG_VIA_HARDWARE_USART) 
 432         while (!(UCSR1A 
& (1 << TXC1
))); 
 433         UCSR1A 
|=  (1 << TXC1
); 
 435         UCSR1B 
&= ~(1 << TXEN1
); 
 436         UCSR1B 
|=  (1 << RXEN1
); 
 441         while (SoftUSART_BitCount
); 
 443         if (XPROG_SelectedProtocol 
== XPRG_PROTOCOL_PDI
) 
 445                 BITBANG_PDIDATA_DDR  
&= ~BITBANG_PDIDATA_MASK
; 
 446                 BITBANG_PDIDATA_PORT 
&= ~BITBANG_PDIDATA_MASK
; 
 450                 BITBANG_TPIDATA_DDR  
&= ~BITBANG_TPIDATA_MASK
; 
 451                 BITBANG_TPIDATA_PORT 
&= ~BITBANG_TPIDATA_MASK
;   
 454         /* Wait until DATA line has been pulled up to idle by the target */ 
 455         while (!(BITBANG_PDIDATA_PIN 
& BITBANG_PDIDATA_MASK
) && TimeoutMSRemaining
) 
 457                 /* Manage software timeout */ 
 458                 if (TIFR0 
& (1 << OCF0A
)) 
 460                         TIFR0 
|= (1 << OCF0A
); 
 461                         TimeoutMSRemaining
--; 
 466     if (TimeoutMSRemaining
) 
 467           TimeoutMSRemaining 
= COMMAND_TIMEOUT_MS
;