introduce spminterace capabilities for new devices (untested, yet)

Because of the same register-ids the actual code could be dupicated
to following devices:

	ATmega48
	ATmega48P
	ATmega88
	ATmega88P
	ATmega168
	ATmega168P

	ATmega48A
	ATmega48PA
	ATmega88A
	ATmega88PA
	ATmega168A
	ATmega168PA
	ATmega328
	ATmega328P

	ATmega164A
	ATmega164PA
	ATmega324A
	ATmega324PA
	ATmega644A
	ATmega644PA
	ATmega1284
	ATmega1284P

Signed-off-by: Stephan Bärwolf <stephan.baerwolf@tu-ilmenau.de>

diff --git a/firmware/spminterface.h b/firmware/spminterface.h
index 00747c7..d67c3e9 100644 (file)
--- a/firmware/spminterface.h
+++ b/firmware/spminterface.h
@@ -134,6 +134,110 @@ const uint16_t bootloader__do_spm[19] PROGMEM = {0x0000, 0x2dec, 0x2dfd, 0xb6b7,
     1842:      f4 cf           rjmp    .-24            ; 0x182c <waitA>
     1844:      08 95           ret
 */
     1842:      f4 cf           rjmp    .-24            ; 0x182c <waitA>
     1844:      08 95           ret
 */

+
+
+
+
+
+#elif defined (__AVR_ATmega48__) || defined (__AVR_ATmega48P__) || defined (__AVR_ATmega88__) || defined (__AVR_ATmega88P__) || defined (__AVR_ATmega168__) || defined (__AVR_ATmega168P__)
+//assume  SPMCR:=SPMCSR==0x37, SPMEN:=SELFPRGEN==0x0, RWWSRE=0x4, RWWSB=0x6
+const uint16_t bootloader__do_spm[19] PROGMEM = {0x0000, 0x2dec, 0x2dfd, 0xb6b7, 0xfcb0, 0xcffd, 0xbf27, 0x95e8, 0xb6b7,
+                                                0xfcb0, 0xcffd, 0xe121, 0xb6b7, 0xfcb6, 0xcff4, 0x9508, 0xFFFF, 0xFFFF,
+                                                0xFFFF};
+/*
+00001826 <bootloader__do_spm>:
+    1826:      00 00           nop
+    1828:      ec 2d           mov     r30, r12
+    182a:      fd 2d           mov     r31, r13
+
+0000182c <waitA>:
+    182c:      b7 b6           in      r11, 0x37       ; 55
+    182e:      b0 fc           sbrc    r11, 0
+    1830:      fd cf           rjmp    .-6             ; 0x182c <waitA>
+    1832:      27 bf           out     0x37, r18       ; 55
+    1834:      e8 95           spm
+
+00001836 <waitB>:
+    1836:      b7 b6           in      r11, 0x37       ; 55
+    1838:      b0 fc           sbrc    r11, 0
+    183a:      fd cf           rjmp    .-6             ; 0x1836 <waitB>
+    183c:      21 e1           ldi     r18, 0x11       ; 17
+    183e:      b7 b6           in      r11, 0x37       ; 55
+    1840:      b6 fc           sbrc    r11, 6
+    1842:      f4 cf           rjmp    .-24            ; 0x182c <waitA>
+    1844:      08 95           ret
+*/
+
+
+
+
+
+#elif defined (__AVR_ATmega48A__) || defined (__AVR_ATmega48PA__) || defined (__AVR_ATmega88A__) || defined (__AVR_ATmega88PA__) || defined (__AVR_ATmega168A__) || defined (__AVR_ATmega168PA__) || defined (__AVR_ATmega328__) || defined (__AVR_ATmega328P__)
+//assume  SPMCR:=SPMCSR==0x37, SPMEN:=SELFPRGEN==0x0, RWWSRE=0x4, RWWSB=0x6
+const uint16_t bootloader__do_spm[19] PROGMEM = {0x0000, 0x2dec, 0x2dfd, 0xb6b7, 0xfcb0, 0xcffd, 0xbf27, 0x95e8, 0xb6b7,
+                                                0xfcb0, 0xcffd, 0xe121, 0xb6b7, 0xfcb6, 0xcff4, 0x9508, 0xFFFF, 0xFFFF,
+                                                0xFFFF};
+/*
+00001826 <bootloader__do_spm>:
+    1826:      00 00           nop
+    1828:      ec 2d           mov     r30, r12
+    182a:      fd 2d           mov     r31, r13
+
+0000182c <waitA>:
+    182c:      b7 b6           in      r11, 0x37       ; 55
+    182e:      b0 fc           sbrc    r11, 0
+    1830:      fd cf           rjmp    .-6             ; 0x182c <waitA>
+    1832:      27 bf           out     0x37, r18       ; 55
+    1834:      e8 95           spm
+
+00001836 <waitB>:
+    1836:      b7 b6           in      r11, 0x37       ; 55
+    1838:      b0 fc           sbrc    r11, 0
+    183a:      fd cf           rjmp    .-6             ; 0x1836 <waitB>
+    183c:      21 e1           ldi     r18, 0x11       ; 17
+    183e:      b7 b6           in      r11, 0x37       ; 55
+    1840:      b6 fc           sbrc    r11, 6
+    1842:      f4 cf           rjmp    .-24            ; 0x182c <waitA>
+    1844:      08 95           ret
+*/
+
+
+
+
+
+#elif defined (__AVR_ATmega164A__) || defined (__AVR_ATmega164PA__) || defined (__AVR_ATmega324A__) || defined (__AVR_ATmega324PA__) || defined (__AVR_ATmega644A__) || defined (__AVR_ATmega644PA__) || defined (__AVR_ATmega1284__) || defined (__AVR_ATmega1284P__)
+//assume  SPMCR:=SPCSR==0x37, SPMEN==0x0, RWWSRE=0x4, RWWSB=0x6
+const uint16_t bootloader__do_spm[19] PROGMEM = {0x0000, 0x2dec, 0x2dfd, 0xb6b7, 0xfcb0, 0xcffd, 0xbf27, 0x95e8, 0xb6b7,
+                                                0xfcb0, 0xcffd, 0xe121, 0xb6b7, 0xfcb6, 0xcff4, 0x9508, 0xFFFF, 0xFFFF,
+                                                0xFFFF};
+/*
+00001826 <bootloader__do_spm>:
+    1826:      00 00           nop
+    1828:      ec 2d           mov     r30, r12
+    182a:      fd 2d           mov     r31, r13
+
+0000182c <waitA>:
+    182c:      b7 b6           in      r11, 0x37       ; 55
+    182e:      b0 fc           sbrc    r11, 0
+    1830:      fd cf           rjmp    .-6             ; 0x182c <waitA>
+    1832:      27 bf           out     0x37, r18       ; 55
+    1834:      e8 95           spm
+
+00001836 <waitB>:
+    1836:      b7 b6           in      r11, 0x37       ; 55
+    1838:      b0 fc           sbrc    r11, 0
+    183a:      fd cf           rjmp    .-6             ; 0x1836 <waitB>
+    183c:      21 e1           ldi     r18, 0x11       ; 17
+    183e:      b7 b6           in      r11, 0x37       ; 55
+    1840:      b6 fc           sbrc    r11, 6
+    1842:      f4 cf           rjmp    .-24            ; 0x182c <waitA>
+    1844:      08 95           ret
+*/
+
+
+
+
+

 #else
   #error "bootloader__do_spm has to be adapted, since there is no architecture code, yet"
 #endif  
 #else
   #error "bootloader__do_spm has to be adapted, since there is no architecture code, yet"
 #endif