2 # Project: USBaspLoader (updater)
3 # Author: Stephan Bärwolf
4 # Creation Date: 2012-09-01
6 # License: GNU GPL v2 (see License.txt)
11 # BOOTLOADER_ADDRESS is 1800 for 8k devices, 3800 for 16k and 7800 for 32k.
12 BOOTLOADER_ADDRESS = 0x1800
13 NEW_BOOTLOADER_ADDRESS = $(BOOTLOADER_ADDRESS)
15 # where the updating firmware should be located (starting address)
19 # PROGRAMMER contains AVRDUDE options to address your programmer
20 # PROGRAMMER = -c pony-stk200
21 PROGRAMMER = -c usbasp
23 # since USBaspLoader supports HAVE_BLB11_SOFTW_LOCKBIT...
24 LOCKOPT = -U lock:w:0x3f:m
25 FUSEOPT = $(FUSEOPT_8)
27 # standard atmega8 needs BODLEVEL to be programed, since it is a 5V device
28 # you may also want to UNprogram SUT1 to get a SLOWER bootup (lfuse then would be 0x3f)
29 FUSEOPT_8 = -U hfuse:w:0xc0:m -U lfuse:w:0x1f:m
31 FUSEOPT_88 = -U hfuse:w:0xd6:m -U lfuse:w:0xdf:m -U efuse:w:0x00:m
32 FUSEOPT_168 = -U hfuse:w:0xd6:m -U lfuse:w:0xdf:m -U efuse:w:0x00:m
33 FUSEOPT_328 = -U lfuse:w:0xf7:m -U hfuse:w:0xda:m -U efuse:w:0x03:m
34 # You may have to change the order of these -U commands.
36 #---------------------------------------------------------------------
38 #---------------------------------------------------------------------
40 # 0xc0 = 1 1 0 0 0 0 0 0 <-- BOOTRST (boot reset vector at 0x1800)
41 # ^ ^ ^ ^ ^ ^ ^------ BOOTSZ0
42 # | | | | | +-------- BOOTSZ1
43 # | | | | + --------- EESAVE (preserve EEPROM over chip erase)
44 # | | | +-------------- CKOPT (full output swing)
45 # | | +---------------- SPIEN (allow serial programming)
46 # | +------------------ WDTON (WDT not always on)
47 # +-------------------- RSTDISBL (reset pin is enabled)
49 # 0x9f = 1 0 0 1 1 1 1 1
51 # | | | +------- CKSEL 3..0 (external >8M crystal)
52 # | | +--------------- SUT 1..0 (crystal osc, BOD enabled)
53 # | +------------------ BODEN (BrownOut Detector enabled)
54 # +-------------------- BODLEVEL (2.7V)
55 #---------------------------------------------------------------------
57 #---------------------------------------------------------------------
59 # 0x00 = 0 0 0 0 0 0 0 0 <-- BOOTRST (boot reset vector at 0x1800)
61 # +------- BOOTSZ (00 = 2k bytes)
63 # 0xd6 = 1 1 0 1 0 1 1 0
65 # | | | | | +------ BODLEVEL 0..2 (110 = 1.8 V)
66 # | | | | + --------- EESAVE (preserve EEPROM over chip erase)
67 # | | | +-------------- WDTON (if 0: watchdog always on)
68 # | | +---------------- SPIEN (allow serial programming)
69 # | +------------------ DWEN (debug wire enable)
70 # +-------------------- RSTDISBL (reset pin is enabled)
72 # 0xdf = 1 1 0 1 1 1 1 1
74 # | | | +------- CKSEL 3..0 (external >8M crystal)
75 # | | +--------------- SUT 1..0 (crystal osc, BOD enabled)
76 # | +------------------ CKOUT (if 0: Clock output enabled)
77 # +-------------------- CKDIV8 (if 0: divide by 8)
78 #---------------------------------------------------------------------
80 #---------------------------------------------------------------------
82 # 0x03 = - - - - - 0 1 1
84 # +------ BODLEVEL 0..2 (011 = 4.3V)
86 # 0xda = 1 1 0 1 1 0 1 0 <-- BOOTRST (0 = jump to bootloader at start)
88 # | | | | | +------- BOOTSZ 0..1 (01 = 2KB starting at 0x7800)
89 # | | | | + --------- EESAVE (don't preserve EEPROM over chip erase)
90 # | | | +-------------- WDTON (1 = watchdog disabled at start)
91 # | | +---------------- SPIEN (0 = allow serial programming)
92 # | +------------------ DWEN (1 = debug wire disable)
93 # +-------------------- RSTDISBL (1 = reset pin is enabled)
95 # 0xf7 = 1 1 1 1 0 1 1 1
97 # | | | +------- CKSEL 3..0 (0111 = external full-swing crystal)
98 # | | +--------------- SUT 1..0 (11 = startup time 16K CK/14K + 65ms)
99 # | +------------------ CKOUT (1 = clock output disabled)
100 # +-------------------- CKDIV8 (1 = do not divide clock by 8)
103 ###############################################################################
107 AVRDUDE = @echo avrdude $(PROGRAMMER) -p $(DEVICE)
114 CC=@$(AVRPATH)avr-gcc
115 OBC=@$(AVRPATH)avr-objcopy
116 OBD=@$(AVRPATH)avr-objdump
117 SIZ=@$(AVRPATH)avr-size