/** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */\r
void XPROGTarget_EnableTargetPDI(void)\r
{\r
+ IsSending = false;\r
+\r
#if defined(XPROG_VIA_HARDWARE_USART)\r
/* Set Tx and XCK as outputs, Rx as input */\r
DDRD |= (1 << 5) | (1 << 3);\r
UBRR1 = (F_CPU / 1000000UL);\r
UCSR1B = (1 << TXEN1);\r
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
-\r
- /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */\r
- XPROGTarget_SendBreak();\r
- XPROGTarget_SendBreak();\r
#else\r
/* Set DATA and CLOCK lines to outputs */\r
BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
asm volatile ("NOP"::);\r
asm volatile ("NOP"::);\r
\r
- /* Fire timer compare channel A ISR every 90 cycles to manage the software USART */\r
- OCR1A = 90;\r
+ /* Fire timer compare channel A ISR to manage the software USART */\r
+ OCR1A = BITS_BETWEEN_USART_CLOCKS;\r
TCCR1B = (1 << WGM12) | (1 << CS10);\r
TIMSK1 = (1 << OCIE1A);\r
- \r
- /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
+#endif\r
+\r
+ /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */\r
XPROGTarget_SendBreak();\r
XPROGTarget_SendBreak();\r
-#endif\r
}\r
\r
/** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */\r
void XPROGTarget_EnableTargetTPI(void)\r
{\r
+ IsSending = false;\r
+\r
/* Set /RESET line low for at least 90ns to enable TPI functionality */\r
RESET_LINE_DDR |= RESET_LINE_MASK;\r
RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
UBRR1 = (F_CPU / 1000000UL);\r
UCSR1B = (1 << TXEN1);\r
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
-\r
- /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
- XPROGTarget_SendBreak();\r
- XPROGTarget_SendBreak();\r
#else\r
/* Set DATA and CLOCK lines to outputs */\r
BITBANG_TPIDATA_DDR |= BITBANG_TPIDATA_MASK;\r
/* Set DATA line high for idle state */\r
BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
\r
- /* Fire timer capture channel B ISR every 90 cycles to manage the software USART */\r
- OCR1B = 9;\r
+ /* Fire timer capture channel B ISR to manage the software USART */\r
+ OCR1B = BITS_BETWEEN_USART_CLOCKS;\r
TCCR1B = (1 << WGM12) | (1 << CS10);\r
TIMSK1 = (1 << OCIE1B);\r
- \r
+#endif\r
+\r
/* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
XPROGTarget_SendBreak();\r
XPROGTarget_SendBreak();\r
-#endif\r
}\r
\r
/** Disables the target's PDI interface, exits programming mode and starts the target's application. */\r
\r
/* Defines: */\r
#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
-// #define XPROG_VIA_HARDWARE_USART\r
-\r
- #define BITBANG_PDIDATA_PORT PORTD\r
- #define BITBANG_PDIDATA_DDR DDRD\r
- #define BITBANG_PDIDATA_PIN PIND\r
- #define BITBANG_PDIDATA_MASK (1 << 3)\r
- \r
- #define BITBANG_PDICLOCK_PORT PORTD\r
- #define BITBANG_PDICLOCK_DDR DDRD\r
- #define BITBANG_PDICLOCK_PIN PIND\r
- #define BITBANG_PDICLOCK_MASK (1 << 5)\r
-\r
- #define BITBANG_TPIDATA_PORT PORTB\r
- #define BITBANG_TPIDATA_DDR DDRB\r
- #define BITBANG_TPIDATA_PIN PINB\r
- #define BITBANG_TPIDATA_MASK (1 << 3)\r
- \r
- #define BITBANG_TPICLOCK_PORT PORTB\r
- #define BITBANG_TPICLOCK_DDR DDRB\r
- #define BITBANG_TPICLOCK_PIN PINB\r
- #define BITBANG_TPICLOCK_MASK (1 << 1)\r
-\r
-\r
+ #define XPROG_VIA_HARDWARE_USART\r
#else\r
#define BITBANG_PDIDATA_PORT PORTB\r
#define BITBANG_PDIDATA_DDR DDRB\r
#define BITBANG_TPICLOCK_MASK (1 << 1)\r
#endif\r
\r
+ /** Number of cycles between each clock when software USART mode is used */\r
+ #define BITS_BETWEEN_USART_CLOCKS 100\r
+ \r
/** Total number of bits in a single USART frame */\r
- #define BITS_IN_USART_FRAME 12\r
+ #define BITS_IN_USART_FRAME 12\r
\r
- #define PDI_CMD_LDS 0x00\r
- #define PDI_CMD_LD 0x20\r
- #define PDI_CMD_STS 0x40\r
- #define PDI_CMD_ST 0x60\r
- #define PDI_CMD_LDCS 0x80\r
- #define PDI_CMD_REPEAT 0xA0\r
- #define PDI_CMD_STCS 0xC0\r
- #define PDI_CMD_KEY 0xE0\r
+ #define PDI_CMD_LDS 0x00\r
+ #define PDI_CMD_LD 0x20\r
+ #define PDI_CMD_STS 0x40\r
+ #define PDI_CMD_ST 0x60\r
+ #define PDI_CMD_LDCS 0x80\r
+ #define PDI_CMD_REPEAT 0xA0\r
+ #define PDI_CMD_STCS 0xC0\r
+ #define PDI_CMD_KEY 0xE0\r
\r
- #define PDI_STATUS_REG 0\r
- #define PDI_RESET_REG 1\r
- #define PDI_CTRL_REG 2\r
+ #define PDI_STATUS_REG 0\r
+ #define PDI_RESET_REG 1\r
+ #define PDI_CTRL_REG 2\r
\r
- #define PDI_STATUS_NVM (1 << 1)\r
- #define PDI_RESET_KEY 0x59\r
+ #define PDI_STATUS_NVM (1 << 1)\r
+ #define PDI_RESET_KEY 0x59\r
\r
- #define PDI_NVMENABLE_KEY (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}\r
+ #define PDI_NVMENABLE_KEY (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}\r
\r
- #define PDI_DATSIZE_1BYTE 0\r
- #define PDI_DATSIZE_2BYTES 1\r
- #define PDI_DATSIZE_3BYTES 2\r
- #define PDI_DATSIZE_4BYTES 3\r
+ #define PDI_DATSIZE_1BYTE 0\r
+ #define PDI_DATSIZE_2BYTES 1\r
+ #define PDI_DATSIZE_3BYTES 2\r
+ #define PDI_DATSIZE_4BYTES 3\r
\r
- #define PDI_POINTER_INDIRECT 0\r
- #define PDI_POINTER_INDIRECT_PI 1\r
- #define PDI_POINTER_DIRECT 2\r
-\r
- #define TPI_CMD_SLD 0x20\r
- #define TPI_CMD_SST 0x60\r
- #define TPI_CMD_SSTPR 0x68\r
- #define TPI_CMD_SIN 0x10\r
- #define TPI_CMD_SOUT 0x90\r
- #define TPI_CMD_SLDCS 0x80\r
- #define TPI_CMD_SSTCS 0xC0\r
- #define TPI_CMD_SKEY 0xE0\r
-\r
- #define TPI_STATUS_REG 0x00\r
- #define TPI_CTRL_REG 0x02\r
- #define TPI_ID_REG 0x0F\r
+ #define PDI_POINTER_INDIRECT 0\r
+ #define PDI_POINTER_INDIRECT_PI 1\r
+ #define PDI_POINTER_DIRECT 2\r
+\r
+ #define TPI_CMD_SLD 0x20\r
+ #define TPI_CMD_SST 0x60\r
+ #define TPI_CMD_SSTPR 0x68\r
+ #define TPI_CMD_SIN 0x10\r
+ #define TPI_CMD_SOUT 0x90\r
+ #define TPI_CMD_SLDCS 0x80\r
+ #define TPI_CMD_SSTCS 0xC0\r
+ #define TPI_CMD_SKEY 0xE0\r
+\r
+ #define TPI_STATUS_REG 0x00\r
+ #define TPI_CTRL_REG 0x02\r
+ #define TPI_ID_REG 0x0F\r
\r
- #define TPI_STATUS_NVM (1 << 1)\r
+ #define TPI_STATUS_NVM (1 << 1)\r
\r
- #define TPI_NVMENABLE_KEY (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}\r
+ #define TPI_NVMENABLE_KEY (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}\r
\r
- #define TPI_POINTER_INDIRECT 0\r
- #define TPI_POINTER_INDIRECT_PI (1 << 2)\r
+ #define TPI_POINTER_INDIRECT 0\r
+ #define TPI_POINTER_INDIRECT_PI (1 << 2)\r
\r
/* Function Prototypes: */\r
void XPROGTarget_EnableTargetPDI(void);\r