-/*\r
- LUFA Library\r
- Copyright (C) Dean Camera, 2009.\r
- \r
- dean [at] fourwalledcubicle [dot] com\r
- www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
- Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
- Permission to use, copy, modify, and distribute this software\r
- and its documentation for any purpose and without fee is hereby\r
- granted, provided that the above copyright notice appear in all\r
- copies and that both that the copyright notice and this\r
- permission notice and warranty disclaimer appear in supporting\r
- documentation, and that the name of the author not be used in\r
- advertising or publicity pertaining to distribution of the\r
- software without specific, written prior permission.\r
-\r
- The author disclaim all warranties with regard to this\r
- software, including all implied warranties of merchantability\r
- and fitness. In no event shall the author be liable for any\r
- special, indirect or consequential damages or any damages\r
- whatsoever resulting from loss of use, data or profits, whether\r
- in an action of contract, negligence or other tortious action,\r
- arising out of or in connection with the use or performance of\r
- this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- * Target-related functions for the TPI Protocol decoder.\r
- */\r
-\r
-#define INCLUDE_FROM_TPITARGET_C\r
-#include "TPITarget.h"\r
-\r
-#if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)\r
-\r
-/** Flag to indicate if the USART is currently in Tx or Rx mode. */\r
-volatile bool IsSending;\r
-\r
-#if !defined(XPROG_VIA_HARDWARE_USART)\r
-/** Software USART raw frame bits for transmission/reception. */\r
-volatile uint16_t SoftUSART_Data;\r
-\r
-/** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */\r
-#define SoftUSART_BitCount GPIOR2\r
-\r
-\r
-/** ISR to manage the software USART when bit-banged USART mode is selected. */\r
-ISR(TIMER1_CAPT_vect, ISR_BLOCK)\r
-{\r
- /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
- BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;\r
-\r
- /* If not sending or receiving, just exit */\r
- if (!(SoftUSART_BitCount))\r
- return;\r
-\r
- /* Check to see if we are at a rising or falling edge of the clock */\r
- if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)\r
- {\r
- /* If at rising clock edge and we are in send mode, abort */\r
- if (IsSending)\r
- return;\r
- \r
- /* Wait for the start bit when receiving */\r
- if ((SoftUSART_BitCount == BITS_IN_TPI_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))\r
- return;\r
- \r
- /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
- * be discarded leaving the data to be byte-aligned for quick access */\r
- if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)\r
- SoftUSART_Data |= (1 << (BITS_IN_TPI_FRAME - 1));\r
-\r
- SoftUSART_Data >>= 1;\r
- SoftUSART_BitCount--;\r
- }\r
- else\r
- {\r
- /* If at falling clock edge and we are in receive mode, abort */\r
- if (!IsSending)\r
- return;\r
-\r
- /* Set the data line to the next bit value */\r
- if (SoftUSART_Data & 0x01)\r
- BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
- else\r
- BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK; \r
-\r
- SoftUSART_Data >>= 1;\r
- SoftUSART_BitCount--;\r
- }\r
-}\r
-#endif\r
-\r
-/** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */\r
-void TPITarget_EnableTargetTPI(void)\r
-{\r
- /* Set /RESET line low for at least 90ns to enable TPI functionality */\r
- RESET_LINE_DDR |= RESET_LINE_MASK;\r
- RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
- asm volatile ("NOP"::);\r
- asm volatile ("NOP"::);\r
-\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
- /* Set Tx and XCK as outputs, Rx as input */\r
- DDRD |= (1 << 5) | (1 << 3);\r
- DDRD &= ~(1 << 2);\r
- \r
- /* Set up the synchronous USART for XMEGA communications - \r
- 8 data bits, even parity, 2 stop bits */\r
- UBRR1 = (F_CPU / 1000000UL);\r
- UCSR1B = (1 << TXEN1);\r
- UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
-\r
- /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
- TPITarget_SendBreak();\r
- TPITarget_SendBreak();\r
-#else\r
- /* Set DATA and CLOCK lines to outputs */\r
- BITBANG_TPIDATA_DDR |= BITBANG_TPIDATA_MASK;\r
- BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;\r
- \r
- /* Set DATA line high for idle state */\r
- BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
-\r
- /* Fire timer capture ISR every 100 cycles to manage the software USART */\r
- OCR1A = 80;\r
- TCCR1B = (1 << WGM13) | (1 << WGM12) | (1 << CS10);\r
- TIMSK1 = (1 << ICIE1);\r
- \r
- /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
- TPITarget_SendBreak();\r
- TPITarget_SendBreak();\r
-#endif\r
-}\r
-\r
-/** Disables the target's TPI interface, exits programming mode and starts the target's application. */\r
-void TPITarget_DisableTargetTPI(void)\r
-{\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
- /* Turn off receiver and transmitter of the USART, clear settings */\r
- UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
- UCSR1B = 0;\r
- UCSR1C = 0;\r
-\r
- /* Set all USART lines as input, tristate */\r
- DDRD &= ~((1 << 5) | (1 << 3));\r
- PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
-#else\r
- /* Set DATA and CLOCK lines to inputs */\r
- BITBANG_TPIDATA_DDR &= ~BITBANG_TPIDATA_MASK;\r
- BITBANG_TPICLOCK_DDR &= ~BITBANG_TPICLOCK_MASK;\r
- \r
- /* Tristate DATA and CLOCK lines */\r
- BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;\r
- BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;\r
-#endif\r
-\r
- /* Tristate target /RESET line */\r
- RESET_LINE_DDR &= ~RESET_LINE_MASK;\r
- RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
-}\r
-\r
-/** Sends a byte via the USART.\r
- *\r
- * \param[in] Byte Byte to send through the USART\r
- */\r
-void TPITarget_SendByte(const uint8_t Byte)\r
-{\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
- /* Switch to Tx mode if currently in Rx mode */\r
- if (!(IsSending))\r
- {\r
- PORTD |= (1 << 3);\r
- DDRD |= (1 << 3);\r
-\r
- UCSR1B |= (1 << TXEN1);\r
- UCSR1B &= ~(1 << RXEN1);\r
- \r
- IsSending = true;\r
- }\r
- \r
- /* Wait until there is space in the hardware Tx buffer before writing */\r
- while (!(UCSR1A & (1 << UDRE1)));\r
- UCSR1A |= (1 << TXC1);\r
- UDR1 = Byte;\r
-#else\r
- /* Switch to Tx mode if currently in Rx mode */\r
- if (!(IsSending))\r
- {\r
- BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
- BITBANG_TPIDATA_DDR |= BITBANG_TPIDATA_MASK;\r
-\r
- IsSending = true;\r
- }\r
-\r
- /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */\r
- uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));\r
-\r
- /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */\r
- uint8_t ParityData = Byte;\r
- while (ParityData)\r
- {\r
- NewUSARTData ^= (1 << 9);\r
- ParityData &= (ParityData - 1);\r
- }\r
-\r
- /* Wait until transmitter is idle before writing new data */\r
- while (SoftUSART_BitCount);\r
-\r
- /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
- SoftUSART_Data = NewUSARTData;\r
- SoftUSART_BitCount = BITS_IN_TPI_FRAME;\r
-#endif\r
-}\r
-\r
-/** Receives a byte via the software USART, blocking until data is received.\r
- *\r
- * \return Received byte from the USART\r
- */\r
-uint8_t TPITarget_ReceiveByte(void)\r
-{\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
- /* Switch to Rx mode if currently in Tx mode */\r
- if (IsSending)\r
- {\r
- while (!(UCSR1A & (1 << TXC1)));\r
- UCSR1A |= (1 << TXC1);\r
-\r
- UCSR1B &= ~(1 << TXEN1);\r
- UCSR1B |= (1 << RXEN1);\r
-\r
- DDRD &= ~(1 << 3);\r
- PORTD &= ~(1 << 3);\r
- \r
- IsSending = false;\r
- }\r
-\r
- /* Wait until a byte has been received before reading */\r
- while (!(UCSR1A & (1 << RXC1)));\r
- return UDR1;\r
-#else\r
- /* Switch to Rx mode if currently in Tx mode */\r
- if (IsSending)\r
- {\r
- while (SoftUSART_BitCount);\r
-\r
- BITBANG_TPIDATA_DDR &= ~BITBANG_TPIDATA_MASK;\r
- BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;\r
-\r
- IsSending = false;\r
- }\r
-\r
- /* Wait until a byte has been received before reading */\r
- SoftUSART_BitCount = BITS_IN_TPI_FRAME;\r
- while (SoftUSART_BitCount);\r
- \r
- /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */\r
- return (uint8_t)SoftUSART_Data;\r
-#endif\r
-}\r
-\r
-/** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */\r
-void TPITarget_SendBreak(void)\r
-{\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
- /* Switch to Tx mode if currently in Rx mode */\r
- if (!(IsSending))\r
- {\r
- PORTD |= (1 << 3);\r
- DDRD |= (1 << 3);\r
-\r
- UCSR1B &= ~(1 << RXEN1);\r
- UCSR1B |= (1 << TXEN1);\r
- \r
- IsSending = true;\r
- }\r
-\r
- /* Need to do nothing for a full frame to send a BREAK */\r
- for (uint8_t i = 0; i < BITS_IN_TPI_FRAME; i++)\r
- {\r
- /* Wait for a full cycle of the clock */\r
- while (PIND & (1 << 5));\r
- while (!(PIND & (1 << 5)));\r
- }\r
-#else\r
- /* Switch to Tx mode if currently in Rx mode */\r
- if (!(IsSending))\r
- {\r
- BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
- BITBANG_TPIDATA_DDR |= BITBANG_TPIDATA_MASK;\r
-\r
- IsSending = true;\r
- }\r
- \r
- while (SoftUSART_BitCount);\r
-\r
- /* Need to do nothing for a full frame to send a BREAK */\r
- SoftUSART_Data = 0x0FFF;\r
- SoftUSART_BitCount = BITS_IN_TPI_FRAME;\r
-#endif\r
-}\r
-\r
-/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC\r
- * calculation.\r
- *\r
- * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
- */\r
-bool TPITarget_WaitWhileNVMBusBusy(void)\r
-{\r
- TCNT0 = 0;\r
- TIFR0 = (1 << OCF1A);\r
- \r
- uint8_t TimeoutMS = TPI_NVM_TIMEOUT_MS;\r
- \r
- /* Poll the STATUS register to check to see if NVM access has been enabled */\r
- while (TimeoutMS)\r
- {\r
- /* Send the SLDCS command to read the TPI STATUS register to see the NVM bus is active */\r
- TPITarget_SendByte(TPI_CMD_SLDCS | TPI_STATUS_REG);\r
- if (TPITarget_ReceiveByte() & TPI_STATUS_NVM)\r
- return true;\r
-\r
- if (TIFR0 & (1 << OCF1A))\r
- {\r
- TIFR0 = (1 << OCF1A);\r
- TimeoutMS--;\r
- }\r
- }\r
- \r
- return false;\r
-}\r
-\r
-#endif\r
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