Start of implementation of the low level TPI programming protocol in the AVRISP project.

diff --git a/LUFA.pnproj b/LUFA.pnproj
index 40e790b..46a7ff1 100644 (file)
--- a/LUFA.pnproj
+++ b/LUFA.pnproj
@@ -1 +1 @@
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path="LUFA\Drivers\USB\Class\Host\CDC.h"></File><File path="LUFA\Drivers\USB\Class\Host\HID.c"></File><File path="LUFA\Drivers\USB\Class\Host\HID.h"></File><File path="LUFA\Drivers\USB\Class\Host\MassStorage.c"></File><File path="LUFA\Drivers\USB\Class\Host\MassStorage.h"></File><File path="LUFA\Drivers\USB\Class\Host\StillImage.c"></File><File path="LUFA\Drivers\USB\Class\Host\StillImage.h"></File><File path="LUFA\Drivers\USB\Class\Host\MIDI.c"></File><File path="LUFA\Drivers\USB\Class\Host\MIDI.h"></File><File path="LUFA\Drivers\USB\Class\Host\Printer.c"></File><File path="LUFA\Drivers\USB\Class\Host\Printer.h"></File><File path="LUFA\Drivers\USB\Class\Host\RNDIS.h"></File><File path="LUFA\Drivers\USB\Class\Host\RNDIS.c"></File></Folder><Folder name="Common"><File path="LUFA\Drivers\USB\Class\Common\Audio.h"></File><File path="LUFA\Drivers\USB\Class\Common\CDC.h"></File><File path="LUFA\Drivers\USB\Class\Common\HID.h"></File><File path="LUFA\Drivers\USB\Class\Common\MassStorage.h"></File><File path="LUFA\Drivers\USB\Class\Common\MIDI.h"></File><File path="LUFA\Drivers\USB\Class\Common\RNDIS.h"></File><File path="LUFA\Drivers\USB\Class\Common\StillImage.h"></File><File path="LUFA\Drivers\USB\Class\Common\Printer.h"></File><File path="LUFA\Drivers\USB\Class\Common\RNDISConstants.h"></File></Folder><File path="LUFA\Drivers\USB\Class\Audio.h"></File><File path="LUFA\Drivers\USB\Class\CDC.h"></File><File path="LUFA\Drivers\USB\Class\HID.h"></File><File path="LUFA\Drivers\USB\Class\MassStorage.h"></File><File path="LUFA\Drivers\USB\Class\MIDI.h"></File><File path="LUFA\Drivers\USB\Class\RNDIS.h"></File><File path="LUFA\Drivers\USB\Class\StillImage.h"></File><File path="LUFA\Drivers\USB\Class\Printer.h"></File></Folder><File path="LUFA\Drivers\USB\USB.h"></File></Folder><Folder name="Misc"><File path="LUFA\Drivers\Misc\TerminalCodes.h"></File></Folder><Folder name="Board"><Folder name="USBKEY"><File path="LUFA\Drivers\Board\USBKEY\Dataflash.h"></File><File path="LUFA\Drivers\Board\USBKEY\Joystick.h"></File><File path="LUFA\Drivers\Board\USBKEY\AT45DB642D.h"></File><File path="LUFA\Drivers\Board\USBKEY\LEDs.h"></File><File path="LUFA\Drivers\Board\USBKEY\Buttons.h"></File></Folder><Folder name="STK526"><File path="LUFA\Drivers\Board\STK526\Dataflash.h"></File><File path="LUFA\Drivers\Board\STK526\Joystick.h"></File><File path="LUFA\Drivers\Board\STK526\AT45DB642D.h"></File><File path="LUFA\Drivers\Board\STK526\LEDs.h"></File><File path="LUFA\Drivers\Board\STK526\Buttons.h"></File></Folder><Folder name="STK525"><File path="LUFA\Drivers\Board\STK525\Dataflash.h"></File><File path="LUFA\Drivers\Board\STK525\Joystick.h"></File><File path="LUFA\Drivers\Board\STK525\AT45DB321C.h"></File><File path="LUFA\Drivers\Board\STK525\LEDs.h"></File><File path="LUFA\Drivers\Board\STK525\Buttons.h"></File></Folder><Folder name="RZUSBSTICK"><File path="LUFA\Drivers\Board\RZUSBSTICK\LEDs.h"></File></Folder><Folder name="ATAVRUSBRF01"><File path="LUFA\Drivers\Board\ATAVRUSBRF01\LEDs.h"></File><File path="LUFA\Drivers\Board\ATAVRUSBRF01\Buttons.h"></File></Folder><Folder name="BUMBLEB"><File path="LUFA\Drivers\Board\BUMBLEB\Buttons.h"></File><File path="LUFA\Drivers\Board\BUMBLEB\Joystick.h"></File><File path="LUFA\Drivers\Board\BUMBLEB\LEDs.h"></File></Folder><Folder name="XPLAIN"><File path="LUFA\Drivers\Board\XPLAIN\LEDs.h"></File><File path="LUFA\Drivers\Board\XPLAIN\AT45DB642D.h"></File><File path="LUFA\Drivers\Board\XPLAIN\Dataflash.h"></File></Folder><Folder name="EVK527"><File path="LUFA\Drivers\Board\EVK527\Buttons.h"></File><File path="LUFA\Drivers\Board\EVK527\LEDs.h"></File><File path="LUFA\Drivers\Board\EVK527\Joystick.h"></File><File path="LUFA\Drivers\Board\EVK527\AT45DB321C.h"></File><File path="LUFA\Drivers\Board\EVK527\Dataflash.h"></File></Folder><File path="LUFA\Drivers\Board\Temperature.h"></File><File path="LUFA\Drivers\Board\Dataflash.h"></File><File path="LUFA\Drivers\Board\Joystick.h"></File><File path="LUFA\Drivers\Board\Temperature.c"></File><File path="LUFA\Drivers\Board\LEDs.h"></File><File path="LUFA\Drivers\Board\Buttons.h"></File></Folder><Folder name="Peripheral"><Folder name="AVRU4U6U7"><File path="LUFA\Drivers\Peripheral\AVRU4U6U7\ADC.h"></File></Folder><File path="LUFA\Drivers\Peripheral\ADC.h"></File><File path="LUFA\Drivers\Peripheral\Serial.c"></File><File path="LUFA\Drivers\Peripheral\Serial.h"></File><File path="LUFA\Drivers\Peripheral\SPI.h"></File><File path="LUFA\Drivers\Peripheral\SerialStream.c"></File><File path="LUFA\Drivers\Peripheral\SerialStream.h"></File></Folder></Folder><Folder name="DriverStubs"><File path="LUFA\DriverStubs\Dataflash.h"></File><File path="LUFA\DriverStubs\Joystick.h"></File><File path="LUFA\DriverStubs\LEDs.h"></File><File path="LUFA\DriverStubs\Buttons.h"></File></Folder><Folder name="ManPages"><File path="LUFA\ManPages\AboutLUFA.txt"></File><File path="LUFA\ManPages\BuildingLinkableLibraries.txt"></File><File path="LUFA\ManPages\ChangeLog.txt"></File><File path="LUFA\ManPages\CompileTimeTokens.txt"></File><File path="LUFA\ManPages\DevelopingWithLUFA.txt"></File><File path="LUFA\ManPages\DeviceSupport.txt"></File><File path="LUFA\ManPages\DirectorySummaries.txt"></File><File path="LUFA\ManPages\Donating.txt"></File><File path="LUFA\ManPages\FutureChanges.txt"></File><File path="LUFA\ManPages\GettingStarted.txt"></File><File path="LUFA\ManPages\Groups.txt"></File><File path="LUFA\ManPages\LibraryResources.txt"></File><File path="LUFA\ManPages\LUFAPoweredProjects.txt"></File><File path="LUFA\ManPages\MainPage.txt"></File><File path="LUFA\ManPages\MigrationInformation.txt"></File><File path="LUFA\ManPages\VIDAndPIDValues.txt"></File><File path="LUFA\ManPages\WritingBoardDrivers.txt"></File><File path="LUFA\ManPages\ConfiguringApps.txt"></File><File path="LUFA\ManPages\CompilingApps.txt"></File><File path="LUFA\ManPages\ProgrammingApps.txt"></File><File path="LUFA\ManPages\LibraryApps.txt"></File><File path="LUFA\ManPages\Licence.txt"></File><File path="LUFA\ManPages\WhyUseLUFA.txt"></File><File path="LUFA\ManPages\LUFAvsAtmelStack.txt"></File><File path="LUFA\ManPages\AlternativeStacks.txt"></File></Folder><Folder name="Scheduler"><File path="LUFA\Scheduler\Scheduler.c"></File><File path="LUFA\Scheduler\Scheduler.h"></File></Folder><File path="LUFA\makefile"></File><File path="LUFA\Version.h"></File><File path="LUFA\Doxygen.conf"></File></Folder><Folder name="Bootloaders"><Folder name="DFU"><File path="Bootloaders\DFU\BootloaderDFU.c"></File><File path="Bootloaders\DFU\BootloaderDFU.h"></File><File path="Bootloaders\DFU\Descriptors.c"></File><File path="Bootloaders\DFU\Descriptors.h"></File><File path="Bootloaders\DFU\makefile"></File><File path="Bootloaders\DFU\BootloaderDFU.txt"></File><File path="Bootloaders\DFU\Doxygen.conf"></File></Folder><Folder name="CDC"><File path="Bootloaders\CDC\BootloaderCDC.c"></File><File path="Bootloaders\CDC\BootloaderCDC.h"></File><File path="Bootloaders\CDC\Descriptors.c"></File><File path="Bootloaders\CDC\Descriptors.h"></File><File path="Bootloaders\CDC\makefile"></File><File path="Bootloaders\CDC\LUFA CDC Bootloader.inf"></File><File path="Bootloaders\CDC\Doxygen.conf"></File><File path="Bootloaders\CDC\BootloaderCDC.txt"></File></Folder><Folder name="TeensyHID"><File path="Bootloaders\TeensyHID\Descriptors.c"></File><File path="Bootloaders\TeensyHID\Descriptors.h"></File><File path="Bootloaders\TeensyHID\makefile"></File><File path="Bootloaders\TeensyHID\TeensyHID.c"></File><File path="Bootloaders\TeensyHID\TeensyHID.h"></File><File path="Bootloaders\TeensyHID\TeensyHID.txt"></File></Folder><Folder name="Incomplete"><Folder name="MIDI"><Folder name="JavaHost"><File path="Bootloaders\Incomplete\MIDI\JavaHost\BIN2BOOT.java"></File><File path="Bootloaders\Incomplete\MIDI\JavaHost\MIDIMessageReceiver.java"></File></Folder><File path="Bootloaders\Incomplete\MIDI\BootloaderMIDI.c"></File><File path="Bootloaders\Incomplete\MIDI\BootloaderMIDI.h"></File><File path="Bootloaders\Incomplete\MIDI\Descriptors.c"></File><File path="Bootloaders\Incomplete\MIDI\Descriptors.h"></File><File path="Bootloaders\Incomplete\MIDI\Doxygen.conf"></File><File path="Bootloaders\Incomplete\MIDI\makefile"></File><File path="Bootloaders\Incomplete\MIDI\MIDI.c"></File></Folder></Folder><File path="Bootloaders\makefile"></File></Folder><Folder name="Projects"><Folder name="AVRISP"><Folder name="Lib"><File path="Projects\AVRISP\Lib\V2Protocol.c"></File><File path="Projects\AVRISP\Lib\V2Protocol.h"></File><File path="Projects\AVRISP\Lib\V2ProtocolConstants.h"></File><File path="Projects\AVRISP\Lib\V2ProtocolParams.c"></File><File path="Projects\AVRISP\Lib\V2ProtocolParams.h"></File><File path="Projects\AVRISP\Lib\ISPProtocol.c"></File><File path="Projects\AVRISP\Lib\ISPProtocol.h"></File><File path="Projects\AVRISP\Lib\ISPTarget.c"></File><File path="Projects\AVRISP\Lib\ISPTarget.h"></File><File path="Projects\AVRISP\Lib\PDIProtocol.c"></File><File path="Projects\AVRISP\Lib\PDIProtocol.h"></File><File path="Projects\AVRISP\Lib\PDITarget.c"></File><File path="Projects\AVRISP\Lib\PDITarget.h"></File><File path="Projects\AVRISP\Lib\TPITarget.c"></File><File path="Projects\AVRISP\Lib\TPITarget.h"></File><File path="Projects\AVRISP\Lib\XMEGANVM.c"></File><File path="Projects\AVRISP\Lib\XMEGANVM.h"></File></Folder><File path="Projects\AVRISP\AVRISP.c"></File><File path="Projects\AVRISP\AVRISP.h"></File><File path="Projects\AVRISP\AVRISP.txt"></File><File path="Projects\AVRISP\Descriptors.c"></File><File path="Projects\AVRISP\Descriptors.h"></File><File path="Projects\AVRISP\Doxygen.conf"></File><File path="Projects\AVRISP\makefile"></File></Folder><Folder name="Benito"><Folder name="Board"><File path="Projects\Benito\Board\LEDs.h"></File></Folder><Folder name="Lib"><File path="Projects\Benito\Lib\RingBuff.c"></File><File path="Projects\Benito\Lib\RingBuff.h"></File></Folder><File path="Projects\Benito\Benito.c"></File><File path="Projects\Benito\Benito.h"></File><File path="Projects\Benito\Descriptors.c"></File><File path="Projects\Benito\Descriptors.h"></File><File path="Projects\Benito\Doxygen.conf"></File><File path="Projects\Benito\makefile"></File><File path="Projects\Benito\Benito.txt"></File><File path="Projects\Benito\Benito Programmer.inf"></File></Folder><Folder name="LEDNotifier"><Folder name="Board"><File path="Projects\LEDNotifier\Board\LEDs.h"></File></Folder><Folder name="CPUUsageApp"><File path="Projects\LEDNotifier\CPUUsageApp\CPUMonitor.cs"></File><File path="Projects\LEDNotifier\CPUUsageApp\CPUMonitor.csproj"></File><File path="Projects\LEDNotifier\CPUUsageApp\CPUMonitor.Designer.cs"></File><File path="Projects\LEDNotifier\CPUUsageApp\CPUMonitor.resx"></File><File path="Projects\LEDNotifier\CPUUsageApp\Program.cs"></File></Folder><Folder name="HotmailNotifierApp"><File path="Projects\LEDNotifier\HotmailNotifierApp\MailNotifier.cs"></File><File path="Projects\LEDNotifier\HotmailNotifierApp\MailNotifier.csproj"></File><File path="Projects\LEDNotifier\HotmailNotifierApp\MailNotifier.Designer.cs"></File><File path="Projects\LEDNotifier\HotmailNotifierApp\MailNotifier.resx"></File><File path="Projects\LEDNotifier\HotmailNotifierApp\Program.cs"></File></Folder><Folder name="LEDMixerApp"><File path="Projects\LEDNotifier\LEDMixerApp\LEDMixer.cs"></File><File path="Projects\LEDNotifier\LEDMixerApp\LEDMixer.csproj"></File><File path="Projects\LEDNotifier\LEDMixerApp\LEDMixer.Designer.cs"></File><File path="Projects\LEDNotifier\LEDMixerApp\LEDMixer.resx"></File><File path="Projects\LEDNotifier\LEDMixerApp\Program.cs"></File></Folder><File path="Projects\LEDNotifier\Descriptors.c"></File><File path="Projects\LEDNotifier\Descriptors.h"></File><File path="Projects\LEDNotifier\Doxygen.conf"></File><File path="Projects\LEDNotifier\LEDNotifier.c"></File><File path="Projects\LEDNotifier\LEDNotifier.h"></File><File path="Projects\LEDNotifier\LEDNotifier.txt"></File><File path="Projects\LEDNotifier\LUFA LED Notifier.inf"></File><File path="Projects\LEDNotifier\makefile"></File></Folder><Folder name="MagStripe"><Folder name="Lib"><File path="Projects\Magstripe\Lib\CircularBitBuffer.c"></File><File path="Projects\Magstripe\Lib\CircularBitBuffer.h"></File><File path="Projects\Magstripe\Lib\MagstripeHW.h"></File></Folder><File path="Projects\Magstripe\Descriptors.c"></File><File path="Projects\Magstripe\Descriptors.h"></File><File path="Projects\Magstripe\Magstripe.c"></File><File path="Projects\Magstripe\Magstripe.h"></File><File path="Projects\Magstripe\makefile"></File><File path="Projects\Magstripe\Magstripe.txt"></File><File path="Projects\Magstripe\Doxygen.conf"></File></Folder><Folder name="MissileLauncher"><File path="Projects\MissileLauncher\ConfigDescriptor.c"></File><File path="Projects\MissileLauncher\ConfigDescriptor.h"></File><File path="Projects\MissileLauncher\Doxygen.conf"></File><File path="Projects\MissileLauncher\makefile"></File><File path="Projects\MissileLauncher\MissileLauncher.c"></File><File path="Projects\MissileLauncher\MissileLauncher.h"></File><File path="Projects\MissileLauncher\MissileLauncher.txt"></File></Folder><Folder name="USBtoSerial"><Folder name="Lib"><File path="Projects\USBtoSerial\Lib\RingBuff.c"></File><File path="Projects\USBtoSerial\Lib\RingBuff.h"></File></Folder><File path="Projects\USBtoSerial\Descriptors.c"></File><File path="Projects\USBtoSerial\Descriptors.h"></File><File path="Projects\USBtoSerial\Doxygen.conf"></File><File path="Projects\USBtoSerial\LUFA USBtoSerial.inf"></File><File path="Projects\USBtoSerial\makefile"></File><File path="Projects\USBtoSerial\USBtoSerial.c"></File><File path="Projects\USBtoSerial\USBtoSerial.h"></File><File path="Projects\USBtoSerial\USBtoSerial.txt"></File></Folder><Folder name="XPLAINBridge"><Folder name="Lib"><File path="Projects\XPLAINBridge\Lib\RingBuff.c"></File><File path="Projects\XPLAINBridge\Lib\RingBuff.h"></File><File path="Projects\XPLAINBridge\Lib\SoftUART.c"></File><File path="Projects\XPLAINBridge\Lib\SoftUART.h"></File></Folder><File path="Projects\XPLAINBridge\Descriptors.c"></File><File path="Projects\XPLAINBridge\Descriptors.h"></File><File path="Projects\XPLAINBridge\LUFA XPLAIN Bridge.inf"></File><File path="Projects\XPLAINBridge\makefile"></File><File path="Projects\XPLAINBridge\XPLAINBridge.c"></File><File path="Projects\XPLAINBridge\XPLAINBridge.h"></File><File path="Projects\XPLAINBridge\XPLAINBridge.txt"></File></Folder><Folder name="Incomplete"><Folder name="StandaloneProgrammer"><Folder name="Lib"><Folder name="PetiteFATFs"><File path="Projects\Incomplete\StandaloneProgrammer\Lib\PetiteFATFs\diskio.c"></File><File path="Projects\Incomplete\StandaloneProgrammer\Lib\PetiteFATFs\diskio.h"></File><File path="Projects\Incomplete\StandaloneProgrammer\Lib\PetiteFATFs\integer.h"></File><File path="Projects\Incomplete\StandaloneProgrammer\Lib\PetiteFATFs\pff.c"></File><File path="Projects\Incomplete\StandaloneProgrammer\Lib\PetiteFATFs\pff.h"></File></Folder><File path="Projects\Incomplete\StandaloneProgrammer\Lib\DataflashManager.c"></File><File path="Projects\Incomplete\StandaloneProgrammer\Lib\DataflashManager.h"></File><File path="Projects\Incomplete\StandaloneProgrammer\Lib\SCSI.c"></File><File path="Projects\Incomplete\StandaloneProgrammer\Lib\SCSI.h"></File><File path="Projects\Incomplete\StandaloneProgrammer\Lib\ProgrammerConfig.c"></File><File path="Projects\Incomplete\StandaloneProgrammer\Lib\ProgrammerConfig.h"></File></Folder><File path="Projects\Incomplete\StandaloneProgrammer\Descriptors.c"></File><File path="Projects\Incomplete\StandaloneProgrammer\Descriptors.h"></File><File path="Projects\Incomplete\StandaloneProgrammer\makefile"></File><File path="Projects\Incomplete\StandaloneProgrammer\StandaloneProgrammer.c"></File><File path="Projects\Incomplete\StandaloneProgrammer\StandaloneProgrammer.h"></File><File path="Projects\Incomplete\StandaloneProgrammer\DiskDevice.c"></File><File path="Projects\Incomplete\StandaloneProgrammer\DiskDevice.h"></File><File path="Projects\Incomplete\StandaloneProgrammer\DiskHost.c"></File><File path="Projects\Incomplete\StandaloneProgrammer\DiskHost.h"></File></Folder></Folder><File path="Projects\makefile"></File></Folder><File path="makefile"></File><File path="README.txt"></File></Project>
\ No newline at end of file

diff --git a/LUFA/ManPages/ChangeLog.txt b/LUFA/ManPages/ChangeLog.txt
index f046a1f..17702b6 100644 (file)
--- a/LUFA/ManPages/ChangeLog.txt
+++ b/LUFA/ManPages/ChangeLog.txt
@@ -9,6 +9,15 @@
   *  \section Sec_ChangeLogXXXXXX Version XXXXXX\r
   *\r
   *  <b>New:</b>\r
+  *  - Added TPI programming support for 6-pin ATTINY to the AVRISP programmer project\r
+  *\r
+  *  <b>Changed:</b>\r
+  *\r
+  *  <b>Fixed:</b>\r
+  *\r
+  *  \section Sec_ChangeLog091223 Version 091223\r
+  *\r
+  *  <b>New:</b>\r
   *  - Added activity LED indicators to the AVRISP project to indicate when the device is busy processing a command\r
   *  - The USB target family and allowable USB mode tokens are now public and documented (USB_CAN_BE_*, USB_SERIES_*_AVR)\r
   *  - Added new XPLAIN USB to Serial Bridge project (thanks to John Steggall for initial proof-of-concept, David Prentice\r

diff --git a/LUFA/ManPages/LUFAPoweredProjects.txt b/LUFA/ManPages/LUFAPoweredProjects.txt
index d8e9ffd..9d95a6e 100644 (file)
--- a/LUFA/ManPages/LUFAPoweredProjects.txt
+++ b/LUFA/ManPages/LUFAPoweredProjects.txt
@@ -34,7 +34,7 @@
  *  - Arcade Controller: http://fletchtronics.net/arcade-controller-made-petunia\r
  *  - Bicycle POV: http://www.code.google.com/p/bicycleledpov/\r
  *  - CAMTRIG, a remote Camera Trigger device: http://code.astraw.com/projects/motmot/camtrig\r
- *  - "Fingerlicking Wingdinger" (WARNING: Bad Language if no Javascript), a MIDI controller - http://noisybox.net/electronics/wingdinger/\r
+ *  - "Fingerlicking Wingdinger" (WARNING: Bad Language if no Javascript), a MIDI controller: http://noisybox.net/electronics/wingdinger/\r
  *  - Garmin GPS USB to NMEA standard serial sentence translator: http://github.com/nall/garmin-transmogrifier/tree/master\r
  *  - Generic HID Device Creator : http://generichid.sourceforge.net/\r
  *  - Mobo 4.3, some sort of Audio related device: http://sites.google.com/site/lofturj/mobo4_3\r

diff --git a/LUFA/ManPages/MigrationInformation.txt b/LUFA/ManPages/MigrationInformation.txt
index 378744e..d93b4e8 100644 (file)
--- a/LUFA/ManPages/MigrationInformation.txt
+++ b/LUFA/ManPages/MigrationInformation.txt
@@ -10,7 +10,11 @@
  *  to the next version released. It does not indicate all new additions to the library in each version change, only\r
  *  areas relevant to making older projects compatible with the API changes of each new release.\r
  *\r
- * \section Sec_MigrationXXXXXX Migrating from 091122 to XXXXXX\r
+ * \section Sec_MigrationXXXXXX Migrating from 091223 to XXXXXX\r
+ *\r
+ *  <i>There is no migration information for this release.</i>\r
+ *\r
+ * \section Sec_Migration091223 Migrating from 091122 to 091223\r
  *\r
  *  <b>Host Mode</b>\r
  *    - The Still Image Host Class driver SI_Host_USBTask() and SI_Host_ConfigurePipes() functions were misnamed, and are\r

diff --git a/Projects/AVRISP/AVRISP.txt b/Projects/AVRISP/AVRISP.txt
index 35cf937..20e0cce 100644 (file)
--- a/Projects/AVRISP/AVRISP.txt
+++ b/Projects/AVRISP/AVRISP.txt
@@ -62,10 +62,10 @@
  *  without an ADC converter, VTARGET will report at a fixed 5V level.\r
  *\r
  *  When compiled for the XPLAIN board target, this will automatically configure itself for the correct connections to the\r
- *  XPLAIN's XMEGA AVR, and will enable PDI only programming support (since ISP mode is not needed).\r
+ *  XPLAIN's XMEGA AVR, and will enable PDI only programming support (since ISP and TPI modes are not needed).\r
  *\r
  *  While this application can be compiled for USB AVRs with as little as 8KB of FLASH, for full functionality 16KB or more\r
- *  of FLASH is required. On 8KB devices, either ISP or PDI programming support can be disabled to reduce program size.\r
+ *  of FLASH is required. On 8KB devices, ISP, PDI or TPI programming support can be disabled to reduce program size.\r
  *\r
  *  \section Sec_ISP ISP Connections\r
  *  Connections to the device for SPI programming (when enabled):\r
@@ -155,6 +155,50 @@
  *  <b><sup>1</sup></b> <i>When PDI_VIA_HARDWARE_USART is set, the AVR's Tx and Rx become the DATA line when connected together\r
  *                         via a pair of 300 ohm resistors, and the AVR's XCK pin becomes CLOCK.</i>\r
  *\r
+ *  \section Sec_TPI TPI Connections\r
+ *  Connections to the device for TPI programming<b><sup>1</sup></b> (when enabled):\r
+ *\r
+ *  <table>\r
+ *   <tr>\r
+ *    <td><b>Programmer Pin:</b></td>\r
+ *    <td><b>Target Device Pin:</b></td>\r
+ *    <td><b>PDI 6 Pin Layout:</b></td>\r
+ *   </tr>\r
+ *   <tr>\r
+ *    <td>MISO</td>\r
+ *    <td>DATA</td>\r
+ *    <td>1</td>\r
+ *   </tr>\r
+ *   <tr>\r
+ *    <td>ADCx <b><sup>1</sup></b></td>\r
+ *    <td>VTARGET</td>\r
+ *    <td>2</td>\r
+ *   </tr>\r
+ *   <tr>\r
+ *    <td>SCLK</td>\r
+ *    <td>CLOCK</td>\r
+ *    <td>3</td>\r
+ *   </tr>\r
+ *   <tr>\r
+ *    <td>N/A</td>\r
+ *    <td>N/A</td>\r
+ *    <td>4</td>\r
+ *   </tr>\r
+ *   <tr>\r
+ *    <td>PORTx.y <b><sup>2</sup></b></td>\r
+ *    <td>/RESET</td>\r
+ *    <td>5</td>\r
+ *   </tr>\r
+ *   <tr>\r
+ *    <td>GND</td>\r
+ *    <td>GND</td>\r
+ *    <td>6</td>\r
+ *   </tr>\r
+ *  </table>\r
+ *\r
+ *  <b><sup>1</sup></b> <i>When TPI_VIA_HARDWARE_USART is set, the AVR's Tx and Rx become the DATA line when connected together\r
+ *                         via a pair of 300 ohm resistors, and the AVR's XCK pin becomes CLOCK.</i>\r
+ *\r
  *  \section SSec_Options Project Options\r
  *\r
  *  The following defines can be found in this project, which can control the project behaviour when defined, or changed in value.\r
@@ -204,6 +248,11 @@
  *    <td>Define to enable XMEGA PDI programming protocol support. <i>Ignored when compiled for the XPLAIN board.</i></td>  \r
  *   </tr>\r
  *   <tr>\r
+ *    <td>ENABLE_TPI_PROTOCOL</td>\r
+ *    <td>Makefile CDEFS</td>\r
+ *    <td>Define to enable 6-PIN ATTINY TPI programming protocol support. <i>Ignored when compiled for the XPLAIN board.</i></td>  \r
+ *   </tr>\r
+ *   <tr>\r
  *    <td>PDI_VIA_HARDWARE_USART</td>\r
  *    <td>Makefile CDEFS</td>\r
  *    <td>Define to force the PDI protocol (when enabled) to use the much faster hardware USART instead of bit-banging to\r
@@ -211,5 +260,13 @@
  *        seperate ISP and PDI programming headers) but increases programming speed dramatically.\r
  *        <i>Ignored when compiled for the XPLAIN board.</i></td>  \r
  *   </tr>\r
+ *   <tr>\r
+ *    <td>TPI_VIA_HARDWARE_USART</td>\r
+ *    <td>Makefile CDEFS</td>\r
+ *    <td>Define to force the TPI protocol (when enabled) to use the much faster hardware USART instead of bit-banging to\r
+ *        match the official AVRISP pinout. This breaks pinout compatibility with the official AVRISP MKII (and requires \r
+ *        seperate ISP and TPI programming headers) but increases programming speed dramatically.\r
+ *        <i>Ignored when compiled for the XPLAIN board.</i></td>  \r
+ *   </tr>\r
  *  </table>\r
  */\r

diff --git a/Projects/AVRISP/Lib/ISPProtocol.h b/Projects/AVRISP/Lib/ISPProtocol.h
index 305e68c..4bbffbb 100644 (file)
--- a/Projects/AVRISP/Lib/ISPProtocol.h
+++ b/Projects/AVRISP/Lib/ISPProtocol.h
@@ -44,6 +44,7 @@
        /* Preprocessor Checks: */\r
                #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
                        #undef ENABLE_ISP_PROTOCOL\r
+                       #undef ENABLE_TPI_PROTOCOL\r
                        \r
                        #if !defined(ENABLE_PDI_PROTOCOL)\r
                                #define ENABLE_PDI_PROTOCOL\r

diff --git a/Projects/AVRISP/Lib/ISPTarget.h b/Projects/AVRISP/Lib/ISPTarget.h
index 445f3f3..2af4541 100644 (file)
--- a/Projects/AVRISP/Lib/ISPTarget.h
+++ b/Projects/AVRISP/Lib/ISPTarget.h
@@ -50,6 +50,7 @@
        /* Preprocessor Checks: */\r
                #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
                        #undef ENABLE_ISP_PROTOCOL\r
+                       #undef ENABLE_TPI_PROTOCOL\r
                        \r
                        #if !defined(ENABLE_PDI_PROTOCOL)\r
                                #define ENABLE_PDI_PROTOCOL\r

diff --git a/Projects/AVRISP/Lib/NVMTarget.c b/Projects/AVRISP/Lib/NVMTarget.c
deleted file mode 100644 (file)
index adf213b..0000000
--- a/Projects/AVRISP/Lib/NVMTarget.c
+++ /dev/null
@@ -1,332 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  Target-related functions for the target's NVM module.\r
- */\r
-\r
-#define  INCLUDE_FROM_NVMTARGET_C\r
-#include "NVMTarget.h"\r
-\r
-#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)\r
-\r
-/** Sends the given NVM register address to the target.\r
- *\r
- *  \param[in] Register  NVM register whose absolute address is to be sent\r
- */\r
-void NVMTarget_SendNVMRegAddress(const uint8_t Register)\r
-{\r
-       /* Determine the absolute register address from the NVM base memory address and the NVM register address */\r
-       uint32_t Address = XPROG_Param_NVMBase | Register;\r
-\r
-       /* Send the calculated 32-bit address to the target, LSB first */\r
-       NVMTarget_SendAddress(Address);\r
-}\r
-\r
-/** Sends the given 32-bit absolute address to the target.\r
- *\r
- *  \param[in] AbsoluteAddress  Absolute address to send to the target\r
- */\r
-void NVMTarget_SendAddress(const uint32_t AbsoluteAddress)\r
-{\r
-       /* Send the given 32-bit address to the target, LSB first */\r
-       PDITarget_SendByte(AbsoluteAddress &  0xFF);\r
-       PDITarget_SendByte(AbsoluteAddress >> 8);\r
-       PDITarget_SendByte(AbsoluteAddress >> 16);\r
-       PDITarget_SendByte(AbsoluteAddress >> 24);\r
-}\r
-\r
-/** Waits while the target's NVM controller is busy performing an operation, exiting if the\r
- *  timeout period expires.\r
- *\r
- *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
- */\r
-bool NVMTarget_WaitWhileNVMControllerBusy(void)\r
-{\r
-       TCNT0 = 0;\r
-       TIFR0 = (1 << OCF1A);\r
-                       \r
-       uint8_t TimeoutMS = PDI_NVM_TIMEOUT_MS;\r
-       \r
-       /* Poll the NVM STATUS register while the NVM controller is busy */\r
-       while (TimeoutMS)\r
-       {\r
-               /* Send a LDS command to read the NVM STATUS register to check the BUSY flag */\r
-               PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
-               NVMTarget_SendNVMRegAddress(NVM_REG_STATUS);\r
-               \r
-               /* Check to see if the BUSY flag is still set */\r
-               if (!(PDITarget_ReceiveByte() & (1 << 7)))\r
-                 return true;\r
-\r
-               if (TIFR0 & (1 << OCF1A))\r
-               {\r
-                       TIFR0 = (1 << OCF1A);\r
-                       TimeoutMS--;\r
-               }\r
-       }\r
-       \r
-       return false;\r
-}\r
-\r
-/** Retrieves the CRC value of the given memory space.\r
- *\r
- *  \param[in]  CRCCommand  NVM CRC command to issue to the target\r
- *  \param[out] CRCDest     CRC Destination when read from the target\r
- *\r
- *  \return Boolean true if the command sequence complete successfully\r
- */\r
-bool NVMTarget_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)\r
-{\r
-       /* Wait until the NVM controller is no longer busy */\r
-       if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
-         return false;\r
-         \r
-       /* Set the NVM command to the correct CRC read command */\r
-       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-       NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
-       PDITarget_SendByte(CRCCommand);\r
-\r
-       /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */\r
-       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-       NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);\r
-       PDITarget_SendByte(1 << 0);\r
-\r
-       /* Wait until the NVM bus is ready again */\r
-       if (!(PDITarget_WaitWhileNVMBusBusy()))\r
-         return false;\r
-\r
-       /* Wait until the NVM controller is no longer busy */\r
-       if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
-         return false;\r
-       \r
-       *CRCDest = 0;\r
-       \r
-       /* Read the first generated CRC byte value */\r
-       PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
-       NVMTarget_SendNVMRegAddress(NVM_REG_DAT0);\r
-       *CRCDest  = PDITarget_ReceiveByte();\r
-\r
-       /* Read the second generated CRC byte value */\r
-       PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
-       NVMTarget_SendNVMRegAddress(NVM_REG_DAT1);\r
-       *CRCDest |= ((uint16_t)PDITarget_ReceiveByte() << 8);\r
-\r
-       /* Read the third generated CRC byte value */\r
-       PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
-       NVMTarget_SendNVMRegAddress(NVM_REG_DAT2);\r
-       *CRCDest |= ((uint32_t)PDITarget_ReceiveByte() << 16);\r
-       \r
-       return true;\r
-}\r
-\r
-/** Reads memory from the target's memory spaces.\r
- *\r
- *  \param[in]  ReadAddress  Start address to read from within the target's address space\r
- *  \param[out] ReadBuffer   Buffer to store read data into\r
- *  \param[in]  ReadSize     Number of bytes to read\r
- *\r
- *  \return Boolean true if the command sequence complete successfully\r
- */\r
-bool NVMTarget_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize)\r
-{\r
-       /* Wait until the NVM controller is no longer busy */\r
-       if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
-         return false;\r
-       \r
-       /* Send the READNVM command to the NVM controller for reading of an arbitrary location */\r
-       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-       NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
-       PDITarget_SendByte(NVM_CMD_READNVM);\r
-\r
-       /* Load the PDI pointer register with the start address we want to read from */\r
-       PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);\r
-       NVMTarget_SendAddress(ReadAddress);\r
-\r
-       /* Send the REPEAT command with the specified number of bytes to read */\r
-       PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);\r
-       PDITarget_SendByte(ReadSize - 1);\r
-               \r
-       /* Send a LD command with indirect access and postincrement to read out the bytes */\r
-       PDITarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
-       for (uint16_t i = 0; i < ReadSize; i++)\r
-         *(ReadBuffer++) = PDITarget_ReceiveByte();\r
-       \r
-       return true;\r
-}\r
-\r
-/** Writes byte addressed memory to the target's memory spaces.\r
- *\r
- *  \param[in]  WriteCommand  Command to send to the device to write each memory byte\r
- *  \param[in]  WriteAddress  Start address to write to within the target's address space\r
- *  \param[in]  WriteBuffer   Buffer to source data from\r
- *\r
- *  \return Boolean true if the command sequence complete successfully\r
- */\r
-bool NVMTarget_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer)\r
-{\r
-       /* Wait until the NVM controller is no longer busy */\r
-       if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
-         return false;\r
-\r
-       /* Send the memory write command to the target */\r
-       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-       NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
-       PDITarget_SendByte(WriteCommand);\r
-       \r
-       /* Send new memory byte to the memory to the target */\r
-       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-       NVMTarget_SendAddress(WriteAddress);\r
-       PDITarget_SendByte(*(WriteBuffer++));\r
-       \r
-       return true;\r
-}\r
-\r
-/** Writes page addressed memory to the target's memory spaces.\r
- *\r
- *  \param[in]  WriteBuffCommand  Command to send to the device to write a byte to the memory page buffer\r
- *  \param[in]  EraseBuffCommand  Command to send to the device to erase the memory page buffer\r
- *  \param[in]  WritePageCommand  Command to send to the device to write the page buffer to the destination memory\r
- *  \param[in]  PageMode          Bitfield indicating what operations need to be executed on the specified page\r
- *  \param[in]  WriteAddress      Start address to write the page data to within the target's address space\r
- *  \param[in]  WriteBuffer       Buffer to source data from\r
- *  \param[in]  WriteSize         Number of bytes to write\r
- *\r
- *  \return Boolean true if the command sequence complete successfully\r
- */\r
-bool NVMTarget_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,\r
-                               const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,\r
-                               const uint8_t* WriteBuffer, const uint16_t WriteSize)\r
-{\r
-       if (PageMode & XPRG_PAGEMODE_ERASE)\r
-       {\r
-               /* Wait until the NVM controller is no longer busy */\r
-               if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
-                 return false;\r
-\r
-               /* Send the memory buffer erase command to the target */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
-               PDITarget_SendByte(EraseBuffCommand);\r
-\r
-               /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);\r
-               PDITarget_SendByte(1 << 0);\r
-       }\r
-\r
-       if (WriteSize)\r
-       {\r
-               /* Wait until the NVM controller is no longer busy */\r
-               if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
-                 return false;\r
-\r
-               /* Send the memory buffer write command to the target */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
-               PDITarget_SendByte(WriteBuffCommand);\r
-\r
-               /* Load the PDI pointer register with the start address we want to write to */\r
-               PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);\r
-               NVMTarget_SendAddress(WriteAddress);\r
-\r
-               /* Send the REPEAT command with the specified number of bytes to write */\r
-               PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);\r
-               PDITarget_SendByte(WriteSize - 1);\r
-                       \r
-               /* Send a ST command with indirect access and postincrement to write the bytes */\r
-               PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
-               for (uint16_t i = 0; i < WriteSize; i++)\r
-                 PDITarget_SendByte(*(WriteBuffer++));\r
-       }\r
-       \r
-       if (PageMode & XPRG_PAGEMODE_WRITE)\r
-       {\r
-               /* Wait until the NVM controller is no longer busy */\r
-               if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
-                 return false;\r
-\r
-               /* Send the memory write command to the target */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
-               PDITarget_SendByte(WritePageCommand);\r
-               \r
-               /* Send the address of the first page location to write the memory page */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               NVMTarget_SendAddress(WriteAddress);\r
-               PDITarget_SendByte(0x00);\r
-       }\r
-\r
-       return true;\r
-}\r
-\r
-/** Erases a specific memory space of the target.\r
- *\r
- *  \param[in] EraseCommand  NVM erase command to send to the device\r
- *  \param[in] Address  Address inside the memory space to erase\r
- *\r
- *  \return Boolean true if the command sequence complete successfully\r
- */\r
-bool NVMTarget_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)\r
-{\r
-       /* Wait until the NVM controller is no longer busy */\r
-       if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
-         return false;\r
-         \r
-       /* Send the memory erase command to the target */\r
-       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-       NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
-       PDITarget_SendByte(EraseCommand);\r
-       \r
-       /* Chip erase is handled separately, since it's procedure is different to other erase types */\r
-       if (EraseCommand == NVM_CMD_CHIPERASE)\r
-       {\r
-               /* Set CMDEX bit in NVM CTRLA register to start the chip erase */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);\r
-               PDITarget_SendByte(1 << 0);             \r
-       }\r
-       else\r
-       {\r
-               /* Other erase modes just need us to address a byte within the target memory space */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               NVMTarget_SendAddress(Address); \r
-               PDITarget_SendByte(0x00);\r
-       }\r
-       \r
-       /* Wait until the NVM bus is ready again */\r
-       if (!(PDITarget_WaitWhileNVMBusBusy()))\r
-         return false;\r
-         \r
-       return true;\r
-}\r
-\r
-#endif\r

diff --git a/Projects/AVRISP/Lib/NVMTarget.h b/Projects/AVRISP/Lib/NVMTarget.h
deleted file mode 100644 (file)
index 2431933..0000000
--- a/Projects/AVRISP/Lib/NVMTarget.h
+++ /dev/null
@@ -1,120 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  Header file for NVMTarget.c.\r
- */\r
-\r
-#ifndef _NVM_TARGET_\r
-#define _NVM_TARGET_\r
-\r
-       /* Includes: */\r
-               #include <avr/io.h>\r
-               #include <avr/interrupt.h>\r
-               #include <stdbool.h>\r
-               \r
-               #include <LUFA/Common/Common.h>\r
-               \r
-               #include "PDIProtocol.h"\r
-               #include "PDITarget.h"\r
-       \r
-       /* Preprocessor Checks: */\r
-               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
-                       #undef ENABLE_ISP_PROTOCOL\r
-                       \r
-                       #if !defined(ENABLE_PDI_PROTOCOL)\r
-                               #define ENABLE_PDI_PROTOCOL\r
-                       #endif\r
-               #endif\r
-\r
-       /* Defines: */\r
-               #define NVM_BUSY_TIMEOUT_MS            200\r
-               \r
-               #define NVM_REG_ADDR0                  0x00\r
-               #define NVM_REG_ADDR1                  0x01\r
-               #define NVM_REG_ADDR2                  0x02\r
-               #define NVM_REG_DAT0                   0x04\r
-               #define NVM_REG_DAT1                   0x05\r
-               #define NVM_REG_DAT2                   0x06\r
-               #define NVM_REG_CMD                    0x0A\r
-               #define NVM_REG_CTRLA                  0x0B\r
-               #define NVM_REG_CTRLB                  0x0C\r
-               #define NVM_REG_INTCTRL                0x0D\r
-               #define NVM_REG_STATUS                 0x0F\r
-               #define NVM_REG_LOCKBITS               0x10\r
-               \r
-               #define NVM_CMD_NOOP                   0x00\r
-               #define NVM_CMD_CHIPERASE              0x40\r
-               #define NVM_CMD_READNVM                0x43\r
-               #define NVM_CMD_LOADFLASHPAGEBUFF      0x23\r
-               #define NVM_CMD_ERASEFLASHPAGEBUFF     0x26\r
-               #define NVM_CMD_ERASEFLASHPAGE         0x2B\r
-               #define NVM_CMD_WRITEFLASHPAGE         0x2E\r
-               #define NVM_CMD_ERASEWRITEFLASH        0x2F\r
-               #define NVM_CMD_FLASHCRC               0x78\r
-               #define NVM_CMD_ERASEAPPSEC            0x20\r
-               #define NVM_CMD_ERASEAPPSECPAGE        0x22\r
-               #define NVM_CMD_WRITEAPPSECPAGE        0x24\r
-               #define NVM_CMD_ERASEWRITEAPPSECPAGE   0x25\r
-               #define NVM_CMD_APPCRC                 0x38\r
-               #define NVM_CMD_ERASEBOOTSEC           0x68\r
-               #define NVM_CMD_ERASEBOOTSECPAGE       0x2A\r
-               #define NVM_CMD_WRITEBOOTSECPAGE       0x2C\r
-               #define NVM_CMD_ERASEWRITEBOOTSECPAGE  0x2D\r
-               #define NVM_CMD_BOOTCRC                0x39\r
-               #define NVM_CMD_READUSERSIG            0x03\r
-               #define NVM_CMD_ERASEUSERSIG           0x18\r
-               #define NVM_CMD_WRITEUSERSIG           0x1A\r
-               #define NVM_CMD_READCALIBRATION        0x02\r
-               #define NVM_CMD_READFUSE               0x07\r
-               #define NVM_CMD_WRITEFUSE              0x4C\r
-               #define NVM_CMD_WRITELOCK              0x08\r
-               #define NVM_CMD_LOADEEPROMPAGEBUFF     0x33\r
-               #define NVM_CMD_ERASEEEPROMPAGEBUFF    0x36\r
-               #define NVM_CMD_ERASEEEPROM            0x30\r
-               #define NVM_CMD_ERASEEEPROMPAGE        0x32\r
-               #define NVM_CMD_WRITEEEPROMPAGE        0x34\r
-               #define NVM_CMD_ERASEWRITEEEPROMPAGE   0x35\r
-               #define NVM_CMD_READEEPROM             0x06\r
-\r
-       /* Function Prototypes: */\r
-               void NVMTarget_SendNVMRegAddress(const uint8_t Register);\r
-               void NVMTarget_SendAddress(const uint32_t AbsoluteAddress);\r
-               bool NVMTarget_WaitWhileNVMControllerBusy(void);\r
-               bool NVMTarget_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest);\r
-               bool NVMTarget_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize);\r
-               bool NVMTarget_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer);\r
-               bool NVMTarget_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,\r
-                                              const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,\r
-                                              const uint8_t* WriteBuffer, const uint16_t WriteSize);\r
-               bool NVMTarget_EraseMemory(const uint8_t EraseCommand, const uint32_t Address);\r
-\r
-#endif\r

diff --git a/Projects/AVRISP/Lib/PDIProtocol.h b/Projects/AVRISP/Lib/PDIProtocol.h
index 137bcc2..f2c38d5 100644 (file)
--- a/Projects/AVRISP/Lib/PDIProtocol.h
+++ b/Projects/AVRISP/Lib/PDIProtocol.h
@@ -43,11 +43,12 @@
        \r
                #include "V2Protocol.h"\r
                #include "PDITarget.h"\r
-               #include "NVMTarget.h"\r
+               #include "XMEGANVM.h"\r
 \r
        /* Preprocessor Checks: */\r
                #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
                        #undef ENABLE_ISP_PROTOCOL\r
+                       #undef ENABLE_TPI_PROTOCOL\r
                        \r
                        #if !defined(ENABLE_PDI_PROTOCOL)\r
                                #define ENABLE_PDI_PROTOCOL\r

diff --git a/Projects/AVRISP/Lib/PDITarget.c b/Projects/AVRISP/Lib/PDITarget.c
index 29bb339..2c6ffd9 100644 (file)
--- a/Projects/AVRISP/Lib/PDITarget.c
+++ b/Projects/AVRISP/Lib/PDITarget.c
@@ -67,13 +67,13 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
                  return;\r
                  \r
                /* Wait for the start bit when receiving */\r
-               if ((SoftUSART_BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r
+               if ((SoftUSART_BitCount == BITS_IN_PDI_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r
                  return;\r
        \r
                /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
                 * be discarded leaving the data to be byte-aligned for quick access */\r
                if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
-                 SoftUSART_Data |= (1 << (BITS_IN_FRAME - 1));\r
+                 SoftUSART_Data |= (1 << (BITS_IN_PDI_FRAME - 1));\r
 \r
                SoftUSART_Data >>= 1;\r
                SoftUSART_BitCount--;\r
@@ -133,6 +133,7 @@ void PDITarget_EnableTargetPDI(void)
        TCCR1B  = (1 << WGM12) | (1 << CS10);\r
        TIMSK1  = (1 << OCIE1A);\r
        \r
+       /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
        PDITarget_SendBreak();\r
        PDITarget_SendBreak();\r
 #endif\r
@@ -158,8 +159,6 @@ void PDITarget_DisableTargetPDI(void)
        /* Tristate DATA and CLOCK lines */\r
        BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;\r
        BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;\r
-\r
-       TCCR0B  = 0;\r
 #endif\r
 }\r
 \r
@@ -212,7 +211,7 @@ void PDITarget_SendByte(const uint8_t Byte)
 \r
        /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
        SoftUSART_Data     = NewUSARTData;\r
-       SoftUSART_BitCount = BITS_IN_FRAME;\r
+       SoftUSART_BitCount = BITS_IN_PDI_FRAME;\r
 #endif\r
 }\r
 \r
@@ -254,7 +253,7 @@ uint8_t PDITarget_ReceiveByte(void)
        }\r
 \r
        /* Wait until a byte has been received before reading */\r
-       SoftUSART_BitCount = BITS_IN_FRAME;\r
+       SoftUSART_BitCount = BITS_IN_PDI_FRAME;\r
        while (SoftUSART_BitCount);\r
        \r
        /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */\r
@@ -279,7 +278,7 @@ void PDITarget_SendBreak(void)
        }\r
 \r
        /* Need to do nothing for a full frame to send a BREAK */\r
-       for (uint8_t i = 0; i < BITS_IN_FRAME; i++)\r
+       for (uint8_t i = 0; i < BITS_IN_PDI_FRAME; i++)\r
        {\r
                /* Wait for a full cycle of the clock */\r
                while (PIND & (1 << 5));\r
@@ -299,7 +298,7 @@ void PDITarget_SendBreak(void)
 \r
        /* Need to do nothing for a full frame to send a BREAK */\r
        SoftUSART_Data     = 0x0FFF;\r
-       SoftUSART_BitCount = BITS_IN_FRAME;\r
+       SoftUSART_BitCount = BITS_IN_PDI_FRAME;\r
 #endif\r
 }\r
 \r

diff --git a/Projects/AVRISP/Lib/PDITarget.h b/Projects/AVRISP/Lib/PDITarget.h
index 3758489..da89d55 100644 (file)
--- a/Projects/AVRISP/Lib/PDITarget.h
+++ b/Projects/AVRISP/Lib/PDITarget.h
@@ -46,6 +46,7 @@
        /* Preprocessor Checks: */\r
                #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
                        #undef ENABLE_ISP_PROTOCOL\r
+                       #undef ENABLE_TPI_PROTOCOL\r
                        \r
                        #if !defined(ENABLE_PDI_PROTOCOL)\r
                                #define ENABLE_PDI_PROTOCOL\r
@@ -67,7 +68,7 @@
                        #define BITBANG_PDICLOCK_MASK    RESET_LINE_MASK\r
                #endif\r
                \r
-               #define BITS_IN_FRAME            12\r
+               #define BITS_IN_PDI_FRAME        12\r
                \r
                #define PDI_NVM_TIMEOUT_MS       200\r
                \r

diff --git a/Projects/AVRISP/Lib/TPITarget.c b/Projects/AVRISP/Lib/TPITarget.c
new file mode 100644 (file)
index 0000000..8b47006
--- /dev/null
+++ b/Projects/AVRISP/Lib/TPITarget.c
@@ -0,0 +1,320 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Target-related functions for the TPI Protocol decoder.\r
+ */\r
+\r
+#define  INCLUDE_FROM_TPITARGET_C\r
+#include "TPITarget.h"\r
+\r
+#if defined(ENABLE_TPI_PROTOCOL) || defined(__DOXYGEN__)\r
+\r
+/** Flag to indicate if the USART is currently in Tx or Rx mode. */\r
+volatile bool               IsSending;\r
+\r
+#if !defined(TPI_VIA_HARDWARE_USART)\r
+/** Software USART raw frame bits for transmission/reception. */\r
+volatile uint16_t           SoftUSART_Data;\r
+\r
+/** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */\r
+#define SoftUSART_BitCount  GPIOR2\r
+\r
+\r
+/** ISR to manage the software USART when bit-banged USART mode is selected. */\r
+ISR(TIMER1_CAPT_vect, ISR_BLOCK)\r
+{\r
+       /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
+       BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;\r
+\r
+       /* If not sending or receiving, just exit */\r
+       if (!(SoftUSART_BitCount))\r
+         return;\r
+\r
+       /* Check to see if we are at a rising or falling edge of the clock */\r
+       if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)\r
+       {\r
+               /* If at rising clock edge and we are in send mode, abort */\r
+               if (IsSending)\r
+                 return;\r
+                 \r
+               /* Wait for the start bit when receiving */\r
+               if ((SoftUSART_BitCount == BITS_IN_TPI_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))\r
+                 return;\r
+       \r
+               /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
+                * be discarded leaving the data to be byte-aligned for quick access */\r
+               if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)\r
+                 SoftUSART_Data |= (1 << (BITS_IN_TPI_FRAME - 1));\r
+\r
+               SoftUSART_Data >>= 1;\r
+               SoftUSART_BitCount--;\r
+       }\r
+       else\r
+       {\r
+               /* If at falling clock edge and we are in receive mode, abort */\r
+               if (!IsSending)\r
+                 return;\r
+\r
+               /* Set the data line to the next bit value */\r
+               if (SoftUSART_Data & 0x01)\r
+                 BITBANG_TPIDATA_PORT |=  BITBANG_TPIDATA_MASK;\r
+               else\r
+                 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;                  \r
+\r
+               SoftUSART_Data >>= 1;\r
+               SoftUSART_BitCount--;\r
+       }\r
+}\r
+#endif\r
+\r
+/** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */\r
+void TPITarget_EnableTargetTPI(void)\r
+{\r
+       /* Set /RESET line low for at least 90ns to enable TPI functionality */\r
+       RESET_LINE_DDR  |= RESET_LINE_MASK;\r
+       RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
+       asm volatile ("NOP"::);\r
+       asm volatile ("NOP"::);\r
+\r
+#if defined(TPI_VIA_HARDWARE_USART)\r
+       /* Set Tx and XCK as outputs, Rx as input */\r
+       DDRD |=  (1 << 5) | (1 << 3);\r
+       DDRD &= ~(1 << 2);\r
+               \r
+       /* Set up the synchronous USART for XMEGA communications - \r
+          8 data bits, even parity, 2 stop bits */\r
+       UBRR1  = (F_CPU / 1000000UL);\r
+       UCSR1B = (1 << TXEN1);\r
+       UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
+\r
+       /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
+       TPITarget_SendBreak();\r
+       TPITarget_SendBreak();\r
+#else\r
+       /* Set DATA and CLOCK lines to outputs */\r
+       BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;\r
+       BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;\r
+       \r
+       /* Set DATA line high for idle state */\r
+       BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
+\r
+       /* Fire timer capture ISR every 100 cycles to manage the software USART */\r
+       OCR1A   = 80;\r
+       TCCR1B  = (1 << WGM13) | (1 << WGM12) | (1 << CS10);\r
+       TIMSK1  = (1 << ICIE1);\r
+       \r
+       /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
+       TPITarget_SendBreak();\r
+       TPITarget_SendBreak();\r
+#endif\r
+}\r
+\r
+/** Disables the target's TPI interface, exits programming mode and starts the target's application. */\r
+void TPITarget_DisableTargetTPI(void)\r
+{\r
+#if defined(TPI_VIA_HARDWARE_USART)\r
+       /* Turn off receiver and transmitter of the USART, clear settings */\r
+       UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
+       UCSR1B  = 0;\r
+       UCSR1C  = 0;\r
+\r
+       /* Set all USART lines as input, tristate */\r
+       DDRD  &= ~((1 << 5) | (1 << 3));\r
+       PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
+#else\r
+       /* Set DATA and CLOCK lines to inputs */\r
+       BITBANG_TPIDATA_DDR   &= ~BITBANG_TPIDATA_MASK;\r
+       BITBANG_TPICLOCK_DDR  &= ~BITBANG_TPICLOCK_MASK;\r
+       \r
+       /* Tristate DATA and CLOCK lines */\r
+       BITBANG_TPIDATA_PORT  &= ~BITBANG_TPIDATA_MASK;\r
+       BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;\r
+#endif\r
+\r
+       /* Tristate target /RESET line */\r
+       RESET_LINE_DDR  &= ~RESET_LINE_MASK;\r
+       RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
+}\r
+\r
+/** Sends a byte via the USART.\r
+ *\r
+ *  \param[in] Byte  Byte to send through the USART\r
+ */\r
+void TPITarget_SendByte(const uint8_t Byte)\r
+{\r
+#if defined(TPI_VIA_HARDWARE_USART)\r
+       /* Switch to Tx mode if currently in Rx mode */\r
+       if (!(IsSending))\r
+       {\r
+               PORTD  |=  (1 << 3);\r
+               DDRD   |=  (1 << 3);\r
+\r
+               UCSR1B |=  (1 << TXEN1);\r
+               UCSR1B &= ~(1 << RXEN1);\r
+               \r
+               IsSending = true;\r
+       }\r
+       \r
+       /* Wait until there is space in the hardware Tx buffer before writing */\r
+       while (!(UCSR1A & (1 << UDRE1)));\r
+       UCSR1A |= (1 << TXC1);\r
+       UDR1    = Byte;\r
+#else\r
+       /* Switch to Tx mode if currently in Rx mode */\r
+       if (!(IsSending))\r
+       {\r
+               BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
+               BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;\r
+\r
+               IsSending = true;\r
+       }\r
+\r
+       /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */\r
+       uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));\r
+\r
+       /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */\r
+       uint8_t ParityData    = Byte;\r
+       while (ParityData)\r
+       {\r
+               NewUSARTData ^= (1 << 9);\r
+               ParityData   &= (ParityData - 1);\r
+       }\r
+\r
+       /* Wait until transmitter is idle before writing new data */\r
+       while (SoftUSART_BitCount);\r
+\r
+       /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
+       SoftUSART_Data     = NewUSARTData;\r
+       SoftUSART_BitCount = BITS_IN_TPI_FRAME;\r
+#endif\r
+}\r
+\r
+/** Receives a byte via the software USART, blocking until data is received.\r
+ *\r
+ *  \return Received byte from the USART\r
+ */\r
+uint8_t TPITarget_ReceiveByte(void)\r
+{\r
+#if defined(TPI_VIA_HARDWARE_USART)\r
+       /* Switch to Rx mode if currently in Tx mode */\r
+       if (IsSending)\r
+       {\r
+               while (!(UCSR1A & (1 << TXC1)));\r
+               UCSR1A |=  (1 << TXC1);\r
+\r
+               UCSR1B &= ~(1 << TXEN1);\r
+               UCSR1B |=  (1 << RXEN1);\r
+\r
+               DDRD   &= ~(1 << 3);\r
+               PORTD  &= ~(1 << 3);\r
+               \r
+               IsSending = false;\r
+       }\r
+\r
+       /* Wait until a byte has been received before reading */\r
+       while (!(UCSR1A & (1 << RXC1)));\r
+       return UDR1;\r
+#else\r
+       /* Switch to Rx mode if currently in Tx mode */\r
+       if (IsSending)\r
+       {\r
+               while (SoftUSART_BitCount);\r
+\r
+               BITBANG_TPIDATA_DDR  &= ~BITBANG_TPIDATA_MASK;\r
+               BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;\r
+\r
+               IsSending = false;\r
+       }\r
+\r
+       /* Wait until a byte has been received before reading */\r
+       SoftUSART_BitCount = BITS_IN_TPI_FRAME;\r
+       while (SoftUSART_BitCount);\r
+       \r
+       /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */\r
+       return (uint8_t)SoftUSART_Data;\r
+#endif\r
+}\r
+\r
+/** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */\r
+void TPITarget_SendBreak(void)\r
+{\r
+#if defined(TPI_VIA_HARDWARE_USART)\r
+       /* Switch to Tx mode if currently in Rx mode */\r
+       if (!(IsSending))\r
+       {\r
+               PORTD  |=  (1 << 3);\r
+               DDRD   |=  (1 << 3);\r
+\r
+               UCSR1B &= ~(1 << RXEN1);\r
+               UCSR1B |=  (1 << TXEN1);\r
+               \r
+               IsSending = true;\r
+       }\r
+\r
+       /* Need to do nothing for a full frame to send a BREAK */\r
+       for (uint8_t i = 0; i < BITS_IN_TPI_FRAME; i++)\r
+       {\r
+               /* Wait for a full cycle of the clock */\r
+               while (PIND & (1 << 5));\r
+               while (!(PIND & (1 << 5)));\r
+       }\r
+#else\r
+       /* Switch to Tx mode if currently in Rx mode */\r
+       if (!(IsSending))\r
+       {\r
+               BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
+               BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;\r
+\r
+               IsSending = true;\r
+       }\r
+       \r
+       while (SoftUSART_BitCount);\r
+\r
+       /* Need to do nothing for a full frame to send a BREAK */\r
+       SoftUSART_Data     = 0x0FFF;\r
+       SoftUSART_BitCount = BITS_IN_TPI_FRAME;\r
+#endif\r
+}\r
+\r
+/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC\r
+ *  calculation.\r
+ *\r
+ *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
+ */\r
+bool TPITarget_WaitWhileNVMBusBusy(void)\r
+{\r
+       // TODO\r
+\r
+       return false;\r
+}\r
+\r
+#endif\r

diff --git a/Projects/AVRISP/Lib/TPITarget.h b/Projects/AVRISP/Lib/TPITarget.h
new file mode 100644 (file)
index 0000000..715af16
--- /dev/null
+++ b/Projects/AVRISP/Lib/TPITarget.h
@@ -0,0 +1,81 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Header file for TPITarget.c.\r
+ */\r
+\r
+#ifndef _TPI_TARGET_\r
+#define _TPI_TARGET_\r
+\r
+       /* Includes: */\r
+               #include <avr/io.h>\r
+               #include <avr/interrupt.h>\r
+               #include <stdbool.h>\r
+               \r
+               #include <LUFA/Common/Common.h>\r
+       \r
+       /* Preprocessor Checks: */\r
+               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
+                       #undef ENABLE_ISP_PROTOCOL\r
+                       #undef ENABLE_TPI_PROTOCOL\r
+                       \r
+                       #if !defined(ENABLE_PDI_PROTOCOL)\r
+                               #define ENABLE_PDI_PROTOCOL\r
+                       #endif\r
+               #endif\r
+\r
+       /* Defines: */\r
+               #define BITBANG_TPIDATA_PORT     PORTB\r
+               #define BITBANG_TPIDATA_DDR      DDRB\r
+               #define BITBANG_TPIDATA_PIN      PINB\r
+               #define BITBANG_TPIDATA_MASK     (1 << 3)\r
+                       \r
+               #define BITBANG_TPICLOCK_PORT    PORTB\r
+               #define BITBANG_TPICLOCK_DDR     DDRB\r
+               #define BITBANG_TPICLOCK_PIN     PINB\r
+               #define BITBANG_TPICLOCK_MASK    (1 << 1)\r
+               \r
+               #define BITS_IN_TPI_FRAME        12\r
+               \r
+               #define TPI_NVM_TIMEOUT_MS       200\r
+\r
+               #define TPI_NVMENABLE_KEY        (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}\r
+                               \r
+       /* Function Prototypes: */\r
+               void    TPITarget_EnableTargetTPI(void);\r
+               void    TPITarget_DisableTargetTPI(void);\r
+               void    TPITarget_SendByte(const uint8_t Byte);\r
+               uint8_t TPITarget_ReceiveByte(void);\r
+               void    TPITarget_SendBreak(void);\r
+               bool    TPITarget_WaitWhileNVMBusBusy(void);\r
+\r
+#endif\r

diff --git a/Projects/AVRISP/Lib/V2Protocol.h b/Projects/AVRISP/Lib/V2Protocol.h
index 1777e0f..4ea1cba 100644 (file)
--- a/Projects/AVRISP/Lib/V2Protocol.h
+++ b/Projects/AVRISP/Lib/V2Protocol.h
@@ -49,6 +49,7 @@
        /* Preprocessor Checks: */\r
                #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
                        #undef ENABLE_ISP_PROTOCOL\r
+                       #undef ENABLE_TPI_PROTOCOL\r
                        \r
                        #if !defined(ENABLE_PDI_PROTOCOL)\r
                                #define ENABLE_PDI_PROTOCOL\r

diff --git a/Projects/AVRISP/Lib/XMEGANVM.c b/Projects/AVRISP/Lib/XMEGANVM.c
new file mode 100644 (file)
index 0000000..adf213b
--- /dev/null
+++ b/Projects/AVRISP/Lib/XMEGANVM.c
@@ -0,0 +1,332 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Target-related functions for the target's NVM module.\r
+ */\r
+\r
+#define  INCLUDE_FROM_NVMTARGET_C\r
+#include "NVMTarget.h"\r
+\r
+#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)\r
+\r
+/** Sends the given NVM register address to the target.\r
+ *\r
+ *  \param[in] Register  NVM register whose absolute address is to be sent\r
+ */\r
+void NVMTarget_SendNVMRegAddress(const uint8_t Register)\r
+{\r
+       /* Determine the absolute register address from the NVM base memory address and the NVM register address */\r
+       uint32_t Address = XPROG_Param_NVMBase | Register;\r
+\r
+       /* Send the calculated 32-bit address to the target, LSB first */\r
+       NVMTarget_SendAddress(Address);\r
+}\r
+\r
+/** Sends the given 32-bit absolute address to the target.\r
+ *\r
+ *  \param[in] AbsoluteAddress  Absolute address to send to the target\r
+ */\r
+void NVMTarget_SendAddress(const uint32_t AbsoluteAddress)\r
+{\r
+       /* Send the given 32-bit address to the target, LSB first */\r
+       PDITarget_SendByte(AbsoluteAddress &  0xFF);\r
+       PDITarget_SendByte(AbsoluteAddress >> 8);\r
+       PDITarget_SendByte(AbsoluteAddress >> 16);\r
+       PDITarget_SendByte(AbsoluteAddress >> 24);\r
+}\r
+\r
+/** Waits while the target's NVM controller is busy performing an operation, exiting if the\r
+ *  timeout period expires.\r
+ *\r
+ *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
+ */\r
+bool NVMTarget_WaitWhileNVMControllerBusy(void)\r
+{\r
+       TCNT0 = 0;\r
+       TIFR0 = (1 << OCF1A);\r
+                       \r
+       uint8_t TimeoutMS = PDI_NVM_TIMEOUT_MS;\r
+       \r
+       /* Poll the NVM STATUS register while the NVM controller is busy */\r
+       while (TimeoutMS)\r
+       {\r
+               /* Send a LDS command to read the NVM STATUS register to check the BUSY flag */\r
+               PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
+               NVMTarget_SendNVMRegAddress(NVM_REG_STATUS);\r
+               \r
+               /* Check to see if the BUSY flag is still set */\r
+               if (!(PDITarget_ReceiveByte() & (1 << 7)))\r
+                 return true;\r
+\r
+               if (TIFR0 & (1 << OCF1A))\r
+               {\r
+                       TIFR0 = (1 << OCF1A);\r
+                       TimeoutMS--;\r
+               }\r
+       }\r
+       \r
+       return false;\r
+}\r
+\r
+/** Retrieves the CRC value of the given memory space.\r
+ *\r
+ *  \param[in]  CRCCommand  NVM CRC command to issue to the target\r
+ *  \param[out] CRCDest     CRC Destination when read from the target\r
+ *\r
+ *  \return Boolean true if the command sequence complete successfully\r
+ */\r
+bool NVMTarget_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)\r
+{\r
+       /* Wait until the NVM controller is no longer busy */\r
+       if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
+         return false;\r
+         \r
+       /* Set the NVM command to the correct CRC read command */\r
+       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+       NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
+       PDITarget_SendByte(CRCCommand);\r
+\r
+       /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */\r
+       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+       NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);\r
+       PDITarget_SendByte(1 << 0);\r
+\r
+       /* Wait until the NVM bus is ready again */\r
+       if (!(PDITarget_WaitWhileNVMBusBusy()))\r
+         return false;\r
+\r
+       /* Wait until the NVM controller is no longer busy */\r
+       if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
+         return false;\r
+       \r
+       *CRCDest = 0;\r
+       \r
+       /* Read the first generated CRC byte value */\r
+       PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
+       NVMTarget_SendNVMRegAddress(NVM_REG_DAT0);\r
+       *CRCDest  = PDITarget_ReceiveByte();\r
+\r
+       /* Read the second generated CRC byte value */\r
+       PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
+       NVMTarget_SendNVMRegAddress(NVM_REG_DAT1);\r
+       *CRCDest |= ((uint16_t)PDITarget_ReceiveByte() << 8);\r
+\r
+       /* Read the third generated CRC byte value */\r
+       PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
+       NVMTarget_SendNVMRegAddress(NVM_REG_DAT2);\r
+       *CRCDest |= ((uint32_t)PDITarget_ReceiveByte() << 16);\r
+       \r
+       return true;\r
+}\r
+\r
+/** Reads memory from the target's memory spaces.\r
+ *\r
+ *  \param[in]  ReadAddress  Start address to read from within the target's address space\r
+ *  \param[out] ReadBuffer   Buffer to store read data into\r
+ *  \param[in]  ReadSize     Number of bytes to read\r
+ *\r
+ *  \return Boolean true if the command sequence complete successfully\r
+ */\r
+bool NVMTarget_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize)\r
+{\r
+       /* Wait until the NVM controller is no longer busy */\r
+       if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
+         return false;\r
+       \r
+       /* Send the READNVM command to the NVM controller for reading of an arbitrary location */\r
+       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+       NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
+       PDITarget_SendByte(NVM_CMD_READNVM);\r
+\r
+       /* Load the PDI pointer register with the start address we want to read from */\r
+       PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);\r
+       NVMTarget_SendAddress(ReadAddress);\r
+\r
+       /* Send the REPEAT command with the specified number of bytes to read */\r
+       PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);\r
+       PDITarget_SendByte(ReadSize - 1);\r
+               \r
+       /* Send a LD command with indirect access and postincrement to read out the bytes */\r
+       PDITarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
+       for (uint16_t i = 0; i < ReadSize; i++)\r
+         *(ReadBuffer++) = PDITarget_ReceiveByte();\r
+       \r
+       return true;\r
+}\r
+\r
+/** Writes byte addressed memory to the target's memory spaces.\r
+ *\r
+ *  \param[in]  WriteCommand  Command to send to the device to write each memory byte\r
+ *  \param[in]  WriteAddress  Start address to write to within the target's address space\r
+ *  \param[in]  WriteBuffer   Buffer to source data from\r
+ *\r
+ *  \return Boolean true if the command sequence complete successfully\r
+ */\r
+bool NVMTarget_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer)\r
+{\r
+       /* Wait until the NVM controller is no longer busy */\r
+       if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
+         return false;\r
+\r
+       /* Send the memory write command to the target */\r
+       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+       NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
+       PDITarget_SendByte(WriteCommand);\r
+       \r
+       /* Send new memory byte to the memory to the target */\r
+       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+       NVMTarget_SendAddress(WriteAddress);\r
+       PDITarget_SendByte(*(WriteBuffer++));\r
+       \r
+       return true;\r
+}\r
+\r
+/** Writes page addressed memory to the target's memory spaces.\r
+ *\r
+ *  \param[in]  WriteBuffCommand  Command to send to the device to write a byte to the memory page buffer\r
+ *  \param[in]  EraseBuffCommand  Command to send to the device to erase the memory page buffer\r
+ *  \param[in]  WritePageCommand  Command to send to the device to write the page buffer to the destination memory\r
+ *  \param[in]  PageMode          Bitfield indicating what operations need to be executed on the specified page\r
+ *  \param[in]  WriteAddress      Start address to write the page data to within the target's address space\r
+ *  \param[in]  WriteBuffer       Buffer to source data from\r
+ *  \param[in]  WriteSize         Number of bytes to write\r
+ *\r
+ *  \return Boolean true if the command sequence complete successfully\r
+ */\r
+bool NVMTarget_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,\r
+                               const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,\r
+                               const uint8_t* WriteBuffer, const uint16_t WriteSize)\r
+{\r
+       if (PageMode & XPRG_PAGEMODE_ERASE)\r
+       {\r
+               /* Wait until the NVM controller is no longer busy */\r
+               if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
+                 return false;\r
+\r
+               /* Send the memory buffer erase command to the target */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
+               PDITarget_SendByte(EraseBuffCommand);\r
+\r
+               /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);\r
+               PDITarget_SendByte(1 << 0);\r
+       }\r
+\r
+       if (WriteSize)\r
+       {\r
+               /* Wait until the NVM controller is no longer busy */\r
+               if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
+                 return false;\r
+\r
+               /* Send the memory buffer write command to the target */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
+               PDITarget_SendByte(WriteBuffCommand);\r
+\r
+               /* Load the PDI pointer register with the start address we want to write to */\r
+               PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);\r
+               NVMTarget_SendAddress(WriteAddress);\r
+\r
+               /* Send the REPEAT command with the specified number of bytes to write */\r
+               PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);\r
+               PDITarget_SendByte(WriteSize - 1);\r
+                       \r
+               /* Send a ST command with indirect access and postincrement to write the bytes */\r
+               PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
+               for (uint16_t i = 0; i < WriteSize; i++)\r
+                 PDITarget_SendByte(*(WriteBuffer++));\r
+       }\r
+       \r
+       if (PageMode & XPRG_PAGEMODE_WRITE)\r
+       {\r
+               /* Wait until the NVM controller is no longer busy */\r
+               if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
+                 return false;\r
+\r
+               /* Send the memory write command to the target */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
+               PDITarget_SendByte(WritePageCommand);\r
+               \r
+               /* Send the address of the first page location to write the memory page */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               NVMTarget_SendAddress(WriteAddress);\r
+               PDITarget_SendByte(0x00);\r
+       }\r
+\r
+       return true;\r
+}\r
+\r
+/** Erases a specific memory space of the target.\r
+ *\r
+ *  \param[in] EraseCommand  NVM erase command to send to the device\r
+ *  \param[in] Address  Address inside the memory space to erase\r
+ *\r
+ *  \return Boolean true if the command sequence complete successfully\r
+ */\r
+bool NVMTarget_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)\r
+{\r
+       /* Wait until the NVM controller is no longer busy */\r
+       if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
+         return false;\r
+         \r
+       /* Send the memory erase command to the target */\r
+       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+       NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
+       PDITarget_SendByte(EraseCommand);\r
+       \r
+       /* Chip erase is handled separately, since it's procedure is different to other erase types */\r
+       if (EraseCommand == NVM_CMD_CHIPERASE)\r
+       {\r
+               /* Set CMDEX bit in NVM CTRLA register to start the chip erase */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);\r
+               PDITarget_SendByte(1 << 0);             \r
+       }\r
+       else\r
+       {\r
+               /* Other erase modes just need us to address a byte within the target memory space */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               NVMTarget_SendAddress(Address); \r
+               PDITarget_SendByte(0x00);\r
+       }\r
+       \r
+       /* Wait until the NVM bus is ready again */\r
+       if (!(PDITarget_WaitWhileNVMBusBusy()))\r
+         return false;\r
+         \r
+       return true;\r
+}\r
+\r
+#endif\r

diff --git a/Projects/AVRISP/Lib/XMEGANVM.h b/Projects/AVRISP/Lib/XMEGANVM.h
new file mode 100644 (file)
index 0000000..a8f3c49
--- /dev/null
+++ b/Projects/AVRISP/Lib/XMEGANVM.h
@@ -0,0 +1,121 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Header file for NVMTarget.c.\r
+ */\r
+\r
+#ifndef _NVM_TARGET_\r
+#define _NVM_TARGET_\r
+\r
+       /* Includes: */\r
+               #include <avr/io.h>\r
+               #include <avr/interrupt.h>\r
+               #include <stdbool.h>\r
+               \r
+               #include <LUFA/Common/Common.h>\r
+               \r
+               #include "PDIProtocol.h"\r
+               #include "PDITarget.h"\r
+       \r
+       /* Preprocessor Checks: */\r
+               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
+                       #undef ENABLE_ISP_PROTOCOL\r
+                       #undef ENABLE_TPI_PROTOCOL\r
+                       \r
+                       #if !defined(ENABLE_PDI_PROTOCOL)\r
+                               #define ENABLE_PDI_PROTOCOL\r
+                       #endif\r
+               #endif\r
+\r
+       /* Defines: */\r
+               #define NVM_BUSY_TIMEOUT_MS            200\r
+               \r
+               #define NVM_REG_ADDR0                  0x00\r
+               #define NVM_REG_ADDR1                  0x01\r
+               #define NVM_REG_ADDR2                  0x02\r
+               #define NVM_REG_DAT0                   0x04\r
+               #define NVM_REG_DAT1                   0x05\r
+               #define NVM_REG_DAT2                   0x06\r
+               #define NVM_REG_CMD                    0x0A\r
+               #define NVM_REG_CTRLA                  0x0B\r
+               #define NVM_REG_CTRLB                  0x0C\r
+               #define NVM_REG_INTCTRL                0x0D\r
+               #define NVM_REG_STATUS                 0x0F\r
+               #define NVM_REG_LOCKBITS               0x10\r
+               \r
+               #define NVM_CMD_NOOP                   0x00\r
+               #define NVM_CMD_CHIPERASE              0x40\r
+               #define NVM_CMD_READNVM                0x43\r
+               #define NVM_CMD_LOADFLASHPAGEBUFF      0x23\r
+               #define NVM_CMD_ERASEFLASHPAGEBUFF     0x26\r
+               #define NVM_CMD_ERASEFLASHPAGE         0x2B\r
+               #define NVM_CMD_WRITEFLASHPAGE         0x2E\r
+               #define NVM_CMD_ERASEWRITEFLASH        0x2F\r
+               #define NVM_CMD_FLASHCRC               0x78\r
+               #define NVM_CMD_ERASEAPPSEC            0x20\r
+               #define NVM_CMD_ERASEAPPSECPAGE        0x22\r
+               #define NVM_CMD_WRITEAPPSECPAGE        0x24\r
+               #define NVM_CMD_ERASEWRITEAPPSECPAGE   0x25\r
+               #define NVM_CMD_APPCRC                 0x38\r
+               #define NVM_CMD_ERASEBOOTSEC           0x68\r
+               #define NVM_CMD_ERASEBOOTSECPAGE       0x2A\r
+               #define NVM_CMD_WRITEBOOTSECPAGE       0x2C\r
+               #define NVM_CMD_ERASEWRITEBOOTSECPAGE  0x2D\r
+               #define NVM_CMD_BOOTCRC                0x39\r
+               #define NVM_CMD_READUSERSIG            0x03\r
+               #define NVM_CMD_ERASEUSERSIG           0x18\r
+               #define NVM_CMD_WRITEUSERSIG           0x1A\r
+               #define NVM_CMD_READCALIBRATION        0x02\r
+               #define NVM_CMD_READFUSE               0x07\r
+               #define NVM_CMD_WRITEFUSE              0x4C\r
+               #define NVM_CMD_WRITELOCK              0x08\r
+               #define NVM_CMD_LOADEEPROMPAGEBUFF     0x33\r
+               #define NVM_CMD_ERASEEEPROMPAGEBUFF    0x36\r
+               #define NVM_CMD_ERASEEEPROM            0x30\r
+               #define NVM_CMD_ERASEEEPROMPAGE        0x32\r
+               #define NVM_CMD_WRITEEEPROMPAGE        0x34\r
+               #define NVM_CMD_ERASEWRITEEEPROMPAGE   0x35\r
+               #define NVM_CMD_READEEPROM             0x06\r
+\r
+       /* Function Prototypes: */\r
+               void NVMTarget_SendNVMRegAddress(const uint8_t Register);\r
+               void NVMTarget_SendAddress(const uint32_t AbsoluteAddress);\r
+               bool NVMTarget_WaitWhileNVMControllerBusy(void);\r
+               bool NVMTarget_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest);\r
+               bool NVMTarget_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize);\r
+               bool NVMTarget_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer);\r
+               bool NVMTarget_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,\r
+                                              const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,\r
+                                              const uint8_t* WriteBuffer, const uint16_t WriteSize);\r
+               bool NVMTarget_EraseMemory(const uint8_t EraseCommand, const uint32_t Address);\r
+\r
+#endif\r

diff --git a/Projects/AVRISP/makefile b/Projects/AVRISP/makefile
index 2b6a1e8..ce47b13 100644 (file)
--- a/Projects/AVRISP/makefile
+++ b/Projects/AVRISP/makefile
@@ -133,7 +133,8 @@ SRC = $(TARGET).c                                                 \
       Lib/ISPTarget.c                                             \\r
          Lib/PDIProtocol.c                                           \\r
          Lib/PDITarget.c                                             \\r
-         Lib/NVMTarget.c                                             \\r
+         Lib/XMEGANVM.c                                              \\r
+         Lib/TPITarget.c                                             \\r
          $(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/DevChapter9.c        \\r
          $(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/Endpoint.c           \\r
          $(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/Host.c               \\r
@@ -197,6 +198,7 @@ CDEFS += -DRESET_LINE_MASK="(1 << 4)"
 CDEFS += -DVTARGET_ADC_CHANNEL=2\r
 CDEFS += -DENABLE_ISP_PROTOCOL\r
 CDEFS += -DENABLE_PDI_PROTOCOL\r
+CDEFS += -DENABLE_TPI_PROTOCOL\r
 \r
 \r
 # Place -D or -U options here for ASM sources\r