- OCR1A = TCNT1 + ((BIT_TIME * 3) / 2) - 1; // scan 1.5 bits after start
-
- RX_Data = 0; // clear bit storage
- RX_BitMask = (1 << 0); // bit mask
-
- TIFR1 = (1 << OCF1A); // clear pending interrupt
-
- if (!(SRXPIN & (1 << SRX))) // still low
- {
- TIMSK1 = (1 << OCIE1A) | (1 << OCIE1B); // wait for first bit
+ /* Set reception channel to fire 1.5 bits past the beginning of the start bit */
+ OCR1A = TCNT1 + ((BIT_TIME * 3) / 2) - 1;
+
+ /* Clear the received data temporary variable, reset the current received bit position mask */
+ RX_Data = 0;
+ RX_BitMask = (1 << 0);
+
+ /* Clear reception channel ISR flag in case it is pending */
+ TIFR1 = (1 << OCF1A);
+
+ /* Check that the start bit is still low to prevent noise from triggering a reception */
+ if (!(SRXPIN & (1 << SRX)))
+ {
+ /* Still low, enable both send and receive channels */
+ TIMSK1 = (1 << OCIE1A) | (1 << OCIE1B);
+
+ /* Clear the start bit detection ISR flag if it is pending */