NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);\r
PDITarget_SendByte(1 << 0);\r
\r
+ /* Wait until the NVM bus is ready again */\r
+ if (!(PDITarget_WaitWhileNVMBusBusy()))\r
+ return false;\r
+\r
/* Wait until the NVM controller is no longer busy */\r
if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
return false;\r
return true;\r
}\r
\r
+/** Writes byte addressed memory to the target's memory spaces.\r
+ *\r
+ * \param[in] WriteCommand Command to send to the device to write each memory page\r
+ * \param[in] WriteAddress Start address to write to within the target's address space\r
+ * \param[in] WriteBuffer Buffer to source data from\r
+ * \param[in] WriteSize Number of bytes to write\r
+ *\r
+ * \return Boolean true if the command sequence complete sucessfully\r
+ */\r
+bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize)\r
+{\r
+ for (uint8_t i = 0; i < WriteSize; i++)\r
+ {\r
+ /* Wait until the NVM controller is no longer busy */\r
+ if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
+ return false;\r
+\r
+ /* Send the memory write command to the target */\r
+ PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+ NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
+ PDITarget_SendByte(WriteCommand);\r
+ \r
+ /* Send each new memory byte to the memory to the target */\r
+ PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+ NVMTarget_SendAddress(WriteAddress++);\r
+ PDITarget_SendByte(*(WriteBuffer++));\r
+ }\r
+ \r
+ return true;\r
+}\r
+\r
/** Erases a specific memory space of the target.\r
*\r
* \param[in] EraseCommand NVM erase command to send to the device\r
bool NVMTarget_WaitWhileNVMControllerBusy(void);\r
bool NVMTarget_GetMemoryCRC(uint8_t CRCCommand, uint32_t* CRCDest);\r
bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize);\r
+ bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer,\r
+ uint16_t WriteSize);\r
bool NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address);\r
\r
#endif\r
Endpoint_ClearOUT();\r
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
\r
- uint8_t EraseCommand;\r
+ uint8_t EraseCommand = NVM_CMD_NOOP;\r
\r
if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_CHIP)\r
EraseCommand = NVM_CMD_CHIPERASE;\r
struct\r
{\r
uint8_t MemoryType;\r
+ uint8_t PageMode;\r
uint32_t Address;\r
uint16_t Length;\r
- uint8_t ProgData[256];\r
+ uint8_t ProgData[512];\r
} WriteMemory_XPROG_Params;\r
\r
Endpoint_Read_Stream_LE(&WriteMemory_XPROG_Params, (sizeof(WriteMemory_XPROG_Params) -\r
\r
Endpoint_ClearOUT();\r
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+\r
+\r
+ uint8_t WriteCommand = NVM_CMD_NOOP;\r
+ uint8_t WritePageCommand = NVM_CMD_NOOP;\r
+ bool PagedMemory = false;\r
+ \r
+ if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_APPL)\r
+ {\r
+ PagedMemory = true;\r
+ }\r
+ else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_BOOT)\r
+ {\r
+ PagedMemory = true;\r
+ }\r
+ else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_EEPROM)\r
+ {\r
+ PagedMemory = true;\r
+ }\r
+ else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_USERSIG)\r
+ {\r
+ PagedMemory = true;\r
+ }\r
+ else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_FUSE)\r
+ {\r
+ WriteCommand = NVM_CMD_WRITEFUSE;\r
+ }\r
+ else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_LOCKBITS)\r
+ {\r
+ WriteCommand = NVM_CMD_WRITELOCK;\r
+ }\r
\r
- // TODO: Send program command here via PDI protocol\r
+ if (PagedMemory)\r
+ {\r
+\r
+ }\r
+ else\r
+ {\r
+ if (!(NVMTarget_WriteByteMemory(WriteCommand, WriteMemory_XPROG_Params.Address, WriteMemory_XPROG_Params.ProgData,\r
+ WriteMemory_XPROG_Params.Length)))\r
+ {\r
+ ReturnStatus = XPRG_ERR_TIMEOUT;\r
+ }\r
+ }\r
\r
Endpoint_Write_Byte(CMD_XPROG);\r
- Endpoint_Write_Byte(XPRG_CMD_READ_MEM);\r
+ Endpoint_Write_Byte(XPRG_CMD_WRITE_MEM);\r
Endpoint_Write_Byte(ReturnStatus); \r
Endpoint_ClearIN();\r
}\r
Endpoint_ClearOUT();\r
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
\r
+ uint8_t CRCCommand = NVM_CMD_NOOP;\r
uint32_t MemoryCRC;\r
- uint8_t CRCCommand;\r
\r
if (ReadCRC_XPROG_Params.CRCType == XPRG_CRC_APP)\r
CRCCommand = NVM_CMD_APPCRC;\r