Fix a bug in the Still Image Host Class driver where the returned block status code...

Add programming support to the AVRISP project's PDI programming mode; paged memory writes are not currently functional.

diff --git a/LUFA/Drivers/USB/Class/Host/StillImage.c b/LUFA/Drivers/USB/Class/Host/StillImage.c
index 67d5cde..615094d 100644 (file)
--- a/LUFA/Drivers/USB/Class/Host/StillImage.c
+++ b/LUFA/Drivers/USB/Class/Host/StillImage.c
@@ -233,8 +233,6 @@ static uint8_t SImage_Host_ReceiveBlockHeader(USB_ClassInfo_SI_Host_t* const SII
                  Pipe_Read_Stream_LE(&PIMAHeader->Params, ParamBytes, NO_STREAM_CALLBACK);\r
                \r
                Pipe_ClearIN();\r
                  Pipe_Read_Stream_LE(&PIMAHeader->Params, ParamBytes, NO_STREAM_CALLBACK);\r
                \r
                Pipe_ClearIN();\r

-               \r
-               PIMAHeader->Code &= 0x0000000F;\r

        }\r
        \r
        Pipe_Freeze();\r
        }\r
        \r
        Pipe_Freeze();\r

diff --git a/LUFA/ManPages/ChangeLog.txt b/LUFA/ManPages/ChangeLog.txt
index 791a170..a8502f3 100644 (file)
--- a/LUFA/ManPages/ChangeLog.txt
+++ b/LUFA/ManPages/ChangeLog.txt
@@ -61,6 +61,7 @@
   *  - Fixed the definition of the Endpoint_BytesInEndpoint() macro for the U4 series AVR parts\r
   *  - Fixed MIDI host Class driver MIDI_Host_SendEventPacket() routine not properly checking for Pipe ready before writing\r
   *  - Fixed use of deprecated struct initializers, removed library unused parameter warnings when compiled with -Wextra enabled\r
   *  - Fixed the definition of the Endpoint_BytesInEndpoint() macro for the U4 series AVR parts\r
   *  - Fixed MIDI host Class driver MIDI_Host_SendEventPacket() routine not properly checking for Pipe ready before writing\r
   *  - Fixed use of deprecated struct initializers, removed library unused parameter warnings when compiled with -Wextra enabled\r

+  *  - Fixed Still Image Host Class driver truncating the PIMA response code (thanks to Daniel)\r

   *\r
   *  \section Sec_ChangeLog091122 Version 091122\r
   *\r
   *\r
   *  \section Sec_ChangeLog091122 Version 091122\r
   *\r

diff --git a/Projects/AVRISP/Lib/NVMTarget.c b/Projects/AVRISP/Lib/NVMTarget.c
index d84ae6b..b6922d5 100644 (file)
--- a/Projects/AVRISP/Lib/NVMTarget.c
+++ b/Projects/AVRISP/Lib/NVMTarget.c
@@ -161,41 +161,35 @@ bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t Re
        NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
        PDITarget_SendByte(NVM_CMD_READNVM);\r
 \r
        NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
        PDITarget_SendByte(NVM_CMD_READNVM);\r
 \r

-       /* Send the address of the first location to read from - this also primes the internal address\r
-        * counters so that we can use the REPEAT command later to save on overhead for multiple bytes */\r
-       PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
+       /* Load the PDI pointer register with the start address we want to read from */\r
+       PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);\r

        NVMTarget_SendAddress(ReadAddress);\r
        NVMTarget_SendAddress(ReadAddress);\r

-       *ReadBuffer = PDITarget_ReceiveByte();\r

 \r
 \r

-       /* Check to see if we are reading more than a single byte */\r
-       if (ReadSize > 1)\r
-       {\r
-               /* Send the REPEAT command with the specified number of bytes remaining to read */\r
-               PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_2BYTES);\r
-               PDITarget_SendByte(ReadSize &  0xFF);\r
-               PDITarget_SendByte(ReadSize >> 8);\r
+       /* Send the REPEAT command with the specified number of bytes to read */\r
+       PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_2BYTES);\r
+       PDITarget_SendByte(ReadSize &  0xFF);\r
+       PDITarget_SendByte(ReadSize >> 8);\r

                \r
                \r

-               /* Send a LD command with indirect access and postincrement to read out the remaining bytes */\r
-               PDITarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
-               for (uint16_t i = 0; i < ReadSize; i++)\r
-                 *(ReadBuffer++) = PDITarget_ReceiveByte();\r
-       }\r
+       /* Send a LD command with indirect access and postincrement to read out the bytes */\r
+       PDITarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
+       for (uint16_t i = 0; i < ReadSize; i++)\r
+         *(ReadBuffer++) = PDITarget_ReceiveByte();\r

        \r
        return true;\r
 }\r
 \r
 /** Writes byte addressed memory to the target's memory spaces.\r
  *\r
        \r
        return true;\r
 }\r
 \r
 /** Writes byte addressed memory to the target's memory spaces.\r
  *\r

- *  \param[in]  WriteCommand      Command to send to the device to write each memory page\r
- *  \param[in]  WriteAddress      Start address to write to within the target's address space\r
- *  \param[in]  WriteBuffer       Buffer to source data from\r
- *  \param[in]  WriteSize         Number of bytes to write\r
+ *  \param[in]  WriteCommand  Command to send to the device to write each memory byte\r
+ *  \param[in]  WriteAddress  Start address to write to within the target's address space\r
+ *  \param[in]  WriteBuffer   Buffer to source data from\r
+ *  \param[in]  WriteSize     Number of bytes to write\r

  *\r
  *  \return Boolean true if the command sequence complete sucessfully\r
  */\r
 bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize)\r
 {\r
  *\r
  *  \return Boolean true if the command sequence complete sucessfully\r
  */\r
 bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize)\r
 {\r

-       for (uint8_t i = 0; i < WriteSize; i++)\r
+       for (uint16_t i = 0; i < WriteSize; i++)\r

        {\r
                /* Wait until the NVM controller is no longer busy */\r
                if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
        {\r
                /* Wait until the NVM controller is no longer busy */\r
                if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r


@@ -215,6 +209,92 @@ bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint
        return true;\r
 }\r
 \r
        return true;\r
 }\r
 \r

+/** Writes page addressed memory to the target's memory spaces.\r
+ *\r
+ *  \param[in]  WriteBuffCommand  Command to send to the device to write a byte to the memory page buffer\r
+ *  \param[in]  EraseBuffCommand  Command to send to the device to erase the memory page buffer\r
+ *  \param[in]  WritePageCommand  Command to send to the device to write the page buffer to the destination memory\r
+ *  \param[in]  PageMode          Bitfield indicating what operations need to be executed on the specified page\r
+ *  \param[in]  WriteAddress      Start address to write the page data to within the target's address space\r
+ *  \param[in]  WriteBuffer       Buffer to source data from\r
+ *  \param[in]  WriteSize         Number of bytes to write\r
+ *\r
+ *  \return Boolean true if the command sequence complete sucessfully\r
+ */\r
+bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffCommand, uint8_t WritePageCommand,\r
+                               uint8_t PageMode, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize)\r
+{\r
+       if (PageMode & XPRG_PAGEMODE_ERASE)\r
+       {\r
+               /* Wait until the NVM controller is no longer busy */\r
+               if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
+                 return false;\r
+\r
+               /* Send the memory buffer erase command to the target */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
+               PDITarget_SendByte(EraseBuffCommand);\r
+\r
+               /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);\r
+               PDITarget_SendByte(1 << 0);\r
+       }\r
+\r
+       if (WriteSize)\r
+       {\r
+               /* Wait until the NVM controller is no longer busy */\r
+               if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
+                 return false;\r
+\r
+               /* Send the memory buffer write command to the target */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
+               PDITarget_SendByte(WriteBuffCommand);\r
+\r
+               /* Load the PDI pointer register with the start address we want to write to */\r
+               PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);\r
+               NVMTarget_SendAddress(WriteAddress);\r
+\r
+               /* Send the REPEAT command with the specified number of bytes to write */\r
+               PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_2BYTES);\r
+               PDITarget_SendByte(WriteSize &  0xFF);\r
+               PDITarget_SendByte(WriteSize >> 8);\r
+                       \r
+               /* Send a ST command with indirect access and postincrement to write the bytes */\r
+               PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
+               for (uint16_t i = 0; i < WriteSize; i++)\r
+                 PDITarget_SendByte(*(WriteBuffer++));\r
+\r
+               // TEMP\r
+               PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
+               NVMTarget_SendNVMRegAddress(NVM_REG_STATUS);\r
+               GPIOR0 = PDITarget_ReceiveByte();\r
+               if (!(GPIOR0 & (1 << 0)))\r
+                 JTAG_DEBUG_POINT();\r
+               // END TEMP\r
+       }\r
+       \r
+       if (PageMode & XPRG_PAGEMODE_WRITE)\r
+       {\r
+               /* Wait until the NVM controller is no longer busy */\r
+               if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
+                 return false;\r
+\r
+               /* Send the memory write command to the target */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
+               PDITarget_SendByte(WritePageCommand);\r
+               \r
+               /* Send the address of the first page location to write the memory page */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               NVMTarget_SendAddress(WriteAddress);\r
+               PDITarget_SendByte(0x00);\r
+       }\r
+\r
+       return true;\r
+}\r
+\r

 /** Erases a specific memory space of the target.\r
  *\r
  *  \param[in] EraseCommand  NVM erase command to send to the device\r
 /** Erases a specific memory space of the target.\r
  *\r
  *  \param[in] EraseCommand  NVM erase command to send to the device\r

diff --git a/Projects/AVRISP/Lib/NVMTarget.h b/Projects/AVRISP/Lib/NVMTarget.h
index dea9ff3..3608fcb 100644 (file)
--- a/Projects/AVRISP/Lib/NVMTarget.h
+++ b/Projects/AVRISP/Lib/NVMTarget.h
@@ -74,8 +74,8 @@
                #define NVM_CMD_NOOP                   0x00\r
                #define NVM_CMD_CHIPERASE              0x40\r
                #define NVM_CMD_READNVM                0x43\r
                #define NVM_CMD_NOOP                   0x00\r
                #define NVM_CMD_CHIPERASE              0x40\r
                #define NVM_CMD_READNVM                0x43\r

-               #define NVM_CMD_LOADFLASHBUFF          0x23\r
-               #define NVM_CMD_ERASEFLASHBUFF         0x26\r
+               #define NVM_CMD_LOADFLASHPAGEBUFF      0x23\r
+               #define NVM_CMD_ERASEFLASHPAGEBUFF     0x26\r

                #define NVM_CMD_ERASEFLASHPAGE         0x2B\r
                #define NVM_CMD_FLASHPAGEWRITE         0x2E\r
                #define NVM_CMD_ERASEWRITEFLASH        0x2F\r
                #define NVM_CMD_ERASEFLASHPAGE         0x2B\r
                #define NVM_CMD_FLASHPAGEWRITE         0x2E\r
                #define NVM_CMD_ERASEWRITEFLASH        0x2F\r


@@ -113,6 +113,8 @@
                bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize);\r
                bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer,\r
                                               uint16_t WriteSize);\r
                bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize);\r
                bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer,\r
                                               uint16_t WriteSize);\r

+               bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffCommand, uint8_t WritePageCommand,\r
+                                              uint8_t PageMode, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize);\r

                bool NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address);\r
 \r
 #endif\r
                bool NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address);\r
 \r
 #endif\r

diff --git a/Projects/AVRISP/Lib/PDIProtocol.c b/Projects/AVRISP/Lib/PDIProtocol.c
index 36aa3b4..aa03fc4 100644 (file)
--- a/Projects/AVRISP/Lib/PDIProtocol.c
+++ b/Projects/AVRISP/Lib/PDIProtocol.c
@@ -201,7 +201,7 @@ static void PDIProtocol_WriteMemory(void)
                uint8_t  PageMode;\r
                uint32_t Address;\r
                uint16_t Length;\r
                uint8_t  PageMode;\r
                uint32_t Address;\r
                uint16_t Length;\r

-               uint8_t  ProgData[512];\r
+               uint8_t  ProgData[256];\r

        } WriteMemory_XPROG_Params;\r
        \r
        Endpoint_Read_Stream_LE(&WriteMemory_XPROG_Params, (sizeof(WriteMemory_XPROG_Params) -\r
        } WriteMemory_XPROG_Params;\r
        \r
        Endpoint_Read_Stream_LE(&WriteMemory_XPROG_Params, (sizeof(WriteMemory_XPROG_Params) -\r


@@ -215,24 +215,37 @@ static void PDIProtocol_WriteMemory(void)
 \r
 \r
        uint8_t WriteCommand     = NVM_CMD_NOOP;\r
 \r
 \r
        uint8_t WriteCommand     = NVM_CMD_NOOP;\r

-       uint8_t WritePageCommand = NVM_CMD_NOOP;\r
+       uint8_t WriteBuffCommand = NVM_CMD_NOOP;\r
+       uint8_t EraseBuffCommand = NVM_CMD_NOOP;\r

        bool    PagedMemory      = false;\r
        \r
        if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_APPL)\r
        {\r
        bool    PagedMemory      = false;\r
        \r
        if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_APPL)\r
        {\r

-               PagedMemory = true;\r
+               WriteCommand     = NVM_CMD_ERASEWRITEFLASH;\r
+               WriteBuffCommand = NVM_CMD_LOADFLASHPAGEBUFF;\r
+               EraseBuffCommand = NVM_CMD_ERASEFLASHPAGEBUFF;\r
+               PagedMemory      = true;\r

        }\r
        else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_BOOT)\r
        {\r
        }\r
        else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_BOOT)\r
        {\r

-               PagedMemory = true;\r
+               WriteCommand     = NVM_CMD_ERASEWRITEFLASH;\r
+               WriteBuffCommand = NVM_CMD_LOADFLASHPAGEBUFF;\r
+               EraseBuffCommand = NVM_CMD_ERASEFLASHPAGEBUFF;\r
+               PagedMemory      = true;\r

        }\r
        else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_EEPROM)\r
        {\r
        }\r
        else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_EEPROM)\r
        {\r

-               PagedMemory = true;\r
+               WriteCommand     = NVM_CMD_ERASEWRITEEEPROMPAGE;\r
+               WriteBuffCommand = NVM_CMD_LOADEEPROMPAGEBUFF;\r
+               EraseBuffCommand = NVM_CMD_ERASEEEPROMPAGEBUFF;\r
+               PagedMemory      = true;\r

        }\r
        else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_USERSIG)\r
        {\r
        }\r
        else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_USERSIG)\r
        {\r

-               PagedMemory = true;\r
+               WriteCommand     = NVM_CMD_WRITEUSERSIG;\r
+               WriteBuffCommand = NVM_CMD_LOADFLASHPAGEBUFF;\r
+               EraseBuffCommand = NVM_CMD_ERASEFLASHPAGEBUFF;\r
+               PagedMemory      = true;\r

        }\r
        else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_FUSE)\r
        {\r
        }\r
        else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_FUSE)\r
        {\r


@@ -245,7 +258,12 @@ static void PDIProtocol_WriteMemory(void)
        \r
        if (PagedMemory)\r
        {\r
        \r
        if (PagedMemory)\r
        {\r

-\r
+               if (!(NVMTarget_WritePageMemory(WriteBuffCommand, EraseBuffCommand, WriteCommand, \r
+                                               WriteMemory_XPROG_Params.PageMode, WriteMemory_XPROG_Params.Address,\r
+                                               WriteMemory_XPROG_Params.ProgData, WriteMemory_XPROG_Params.Length)))\r
+               {\r
+                       ReturnStatus = XPRG_ERR_TIMEOUT;\r
+               }\r

        }\r
        else\r
        {\r
        }\r
        else\r
        {\r

diff --git a/Projects/AVRISP/Lib/PDIProtocol.h b/Projects/AVRISP/Lib/PDIProtocol.h
index 490e14b..127f086 100644 (file)
--- a/Projects/AVRISP/Lib/PDIProtocol.h
+++ b/Projects/AVRISP/Lib/PDIProtocol.h
@@ -97,6 +97,9 @@
                \r
                #define XPRG_PROTOCOL_PDI                   0x00\r
                #define XPRG_PROTOCOL_JTAG                  0x01\r
                \r
                #define XPRG_PROTOCOL_PDI                   0x00\r
                #define XPRG_PROTOCOL_JTAG                  0x01\r

+               \r
+               #define XPRG_PAGEMODE_WRITE                 (1 << 0)\r
+               #define XPRG_PAGEMODE_ERASE                 (1 << 1)\r

        \r
        /* External Variables: */\r
                extern uint32_t XPROG_Param_NVMBase;\r
        \r
        /* External Variables: */\r
                extern uint32_t XPROG_Param_NVMBase;\r