Make seperate ISP, PDI and TPI folders in the AVRISP project Lib subdirectory to...
authorDean Camera <dean@fourwalledcubicle.com>
Wed, 23 Dec 2009 14:45:47 +0000 (14:45 +0000)
committerDean Camera <dean@fourwalledcubicle.com>
Wed, 23 Dec 2009 14:45:47 +0000 (14:45 +0000)
32 files changed:
Projects/AVRISP/Lib/ISP/ISPProtocol.c [new file with mode: 0644]
Projects/AVRISP/Lib/ISP/ISPProtocol.h [new file with mode: 0644]
Projects/AVRISP/Lib/ISP/ISPTarget.c [new file with mode: 0644]
Projects/AVRISP/Lib/ISP/ISPTarget.h [new file with mode: 0644]
Projects/AVRISP/Lib/ISPProtocol.c [deleted file]
Projects/AVRISP/Lib/ISPProtocol.h [deleted file]
Projects/AVRISP/Lib/ISPTarget.c [deleted file]
Projects/AVRISP/Lib/ISPTarget.h [deleted file]
Projects/AVRISP/Lib/PDI/PDIProtocol.c [new file with mode: 0644]
Projects/AVRISP/Lib/PDI/PDIProtocol.h [new file with mode: 0644]
Projects/AVRISP/Lib/PDI/PDITarget.c [new file with mode: 0644]
Projects/AVRISP/Lib/PDI/PDITarget.h [new file with mode: 0644]
Projects/AVRISP/Lib/PDI/XMEGANVM.c [new file with mode: 0644]
Projects/AVRISP/Lib/PDI/XMEGANVM.h [new file with mode: 0644]
Projects/AVRISP/Lib/PDIProtocol.c [deleted file]
Projects/AVRISP/Lib/PDIProtocol.h [deleted file]
Projects/AVRISP/Lib/PDITarget.c [deleted file]
Projects/AVRISP/Lib/PDITarget.h [deleted file]
Projects/AVRISP/Lib/TINYNVM.c [deleted file]
Projects/AVRISP/Lib/TINYNVM.h [deleted file]
Projects/AVRISP/Lib/TPI/TINYNVM.c [new file with mode: 0644]
Projects/AVRISP/Lib/TPI/TINYNVM.h [new file with mode: 0644]
Projects/AVRISP/Lib/TPI/TPIProtocol.c [new file with mode: 0644]
Projects/AVRISP/Lib/TPI/TPIProtocol.h [new file with mode: 0644]
Projects/AVRISP/Lib/TPI/TPITarget.c [new file with mode: 0644]
Projects/AVRISP/Lib/TPI/TPITarget.h [new file with mode: 0644]
Projects/AVRISP/Lib/TPIProtocol.c [deleted file]
Projects/AVRISP/Lib/TPIProtocol.h [deleted file]
Projects/AVRISP/Lib/TPITarget.c [deleted file]
Projects/AVRISP/Lib/TPITarget.h [deleted file]
Projects/AVRISP/Lib/XMEGANVM.c [deleted file]
Projects/AVRISP/Lib/XMEGANVM.h [deleted file]

diff --git a/Projects/AVRISP/Lib/ISP/ISPProtocol.c b/Projects/AVRISP/Lib/ISP/ISPProtocol.c
new file mode 100644 (file)
index 0000000..e769cee
--- /dev/null
@@ -0,0 +1,474 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  ISP Protocol handler, to process V2 Protocol wrapped ISP commands used in Atmel programmer devices.\r
+ */\r
+\r
+#include "ISPProtocol.h"\r
+\r
+#if defined(ENABLE_ISP_PROTOCOL) || defined(__DOXYGEN__)\r
+\r
+/** Handler for the CMD_ENTER_PROGMODE_ISP command, which attempts to enter programming mode on\r
+ *  the attached device, returning success or failure back to the host.\r
+ */\r
+void ISPProtocol_EnterISPMode(void)\r
+{\r
+       struct\r
+       {\r
+               uint8_t TimeoutMS;\r
+               uint8_t PinStabDelayMS;\r
+               uint8_t ExecutionDelayMS;\r
+               uint8_t SynchLoops;\r
+               uint8_t ByteDelay;\r
+               uint8_t PollValue;\r
+               uint8_t PollIndex;\r
+               uint8_t EnterProgBytes[4];\r
+       } Enter_ISP_Params;\r
+       \r
+       Endpoint_Read_Stream_LE(&Enter_ISP_Params, sizeof(Enter_ISP_Params));\r
+\r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+\r
+       uint8_t ResponseStatus = STATUS_CMD_FAILED;\r
+       \r
+       CurrentAddress = 0;\r
+\r
+       ISPProtocol_DelayMS(Enter_ISP_Params.ExecutionDelayMS); \r
+       SPI_Init(ISPTarget_GetSPIPrescalerMask() | SPI_SCK_LEAD_RISING | SPI_SAMPLE_LEADING | SPI_MODE_MASTER);\r
+               \r
+       while (Enter_ISP_Params.SynchLoops-- && (ResponseStatus == STATUS_CMD_FAILED))\r
+       {\r
+               uint8_t ResponseBytes[4];\r
+\r
+               ISPTarget_ChangeTargetResetLine(true);\r
+               ISPProtocol_DelayMS(Enter_ISP_Params.PinStabDelayMS);\r
+\r
+               for (uint8_t RByte = 0; RByte < sizeof(ResponseBytes); RByte++)\r
+               {\r
+                       ISPProtocol_DelayMS(Enter_ISP_Params.ByteDelay);\r
+                       ResponseBytes[RByte] = SPI_TransferByte(Enter_ISP_Params.EnterProgBytes[RByte]);\r
+               }\r
+               \r
+               /* Check if polling disabled, or if the polled value matches the expected value */\r
+               if (!(Enter_ISP_Params.PollIndex) || (ResponseBytes[Enter_ISP_Params.PollIndex - 1] == Enter_ISP_Params.PollValue))\r
+               {\r
+                       ResponseStatus = STATUS_CMD_OK;\r
+               }\r
+               else\r
+               {\r
+                       ISPTarget_ChangeTargetResetLine(false);\r
+                       ISPProtocol_DelayMS(Enter_ISP_Params.PinStabDelayMS);\r
+               }\r
+       }\r
+\r
+       Endpoint_Write_Byte(CMD_ENTER_PROGMODE_ISP);\r
+       Endpoint_Write_Byte(ResponseStatus);\r
+       Endpoint_ClearIN();\r
+}\r
+\r
+/** Handler for the CMD_LEAVE_ISP command, which releases the target from programming mode. */\r
+void ISPProtocol_LeaveISPMode(void)\r
+{\r
+       struct\r
+       {\r
+               uint8_t PreDelayMS;\r
+               uint8_t PostDelayMS;\r
+       } Leave_ISP_Params;\r
+\r
+       Endpoint_Read_Stream_LE(&Leave_ISP_Params, sizeof(Leave_ISP_Params));\r
+       \r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+\r
+       ISPProtocol_DelayMS(Leave_ISP_Params.PreDelayMS);\r
+       ISPTarget_ChangeTargetResetLine(false);\r
+       SPI_ShutDown();\r
+       ISPProtocol_DelayMS(Leave_ISP_Params.PostDelayMS);\r
+\r
+       Endpoint_Write_Byte(CMD_LEAVE_PROGMODE_ISP);\r
+       Endpoint_Write_Byte(STATUS_CMD_OK);\r
+       Endpoint_ClearIN();\r
+}\r
+\r
+/** Handler for the CMD_PROGRAM_FLASH_ISP and CMD_PROGRAM_EEPROM_ISP commands, writing out bytes,\r
+ *  words or pages of data to the attached device.\r
+ *\r
+ *  \param[in] V2Command  Issued V2 Protocol command byte from the host\r
+ */\r
+void ISPProtocol_ProgramMemory(uint8_t V2Command)\r
+{\r
+       struct\r
+       {\r
+               uint16_t BytesToWrite;\r
+               uint8_t  ProgrammingMode;\r
+               uint8_t  DelayMS;\r
+               uint8_t  ProgrammingCommands[3];\r
+               uint8_t  PollValue1;\r
+               uint8_t  PollValue2;\r
+               uint8_t  ProgData[256]; // Note, the Jungo driver has a very short ACK timeout period, need to buffer the\r
+       } Write_Memory_Params;      // whole page and ACK the packet as fast as possible to prevent it from aborting\r
+       \r
+       Endpoint_Read_Stream_LE(&Write_Memory_Params, (sizeof(Write_Memory_Params) -\r
+                                                      sizeof(Write_Memory_Params.ProgData)));\r
+\r
+\r
+       Write_Memory_Params.BytesToWrite = SwapEndian_16(Write_Memory_Params.BytesToWrite);\r
+       \r
+       if (Write_Memory_Params.BytesToWrite > sizeof(Write_Memory_Params.ProgData))\r
+       {\r
+               Endpoint_ClearOUT();\r
+               Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+\r
+               Endpoint_Write_Byte(V2Command);\r
+               Endpoint_Write_Byte(STATUS_CMD_FAILED);\r
+               Endpoint_ClearIN();\r
+               return;\r
+       }\r
+       \r
+       Endpoint_Read_Stream_LE(&Write_Memory_Params.ProgData, Write_Memory_Params.BytesToWrite);\r
+\r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+\r
+       uint8_t  ProgrammingStatus = STATUS_CMD_OK;     \r
+       uint16_t PollAddress       = 0;\r
+       uint8_t  PollValue         = (V2Command == CMD_PROGRAM_FLASH_ISP) ? Write_Memory_Params.PollValue1 :\r
+                                                                           Write_Memory_Params.PollValue2;\r
+       uint8_t* NextWriteByte = Write_Memory_Params.ProgData;\r
+\r
+       if (MustSetAddress)\r
+       {\r
+               if (CurrentAddress & (1UL << 31))\r
+                 ISPTarget_LoadExtendedAddress();\r
+\r
+               MustSetAddress = false;\r
+       }\r
+\r
+       if (Write_Memory_Params.ProgrammingMode & PROG_MODE_PAGED_WRITES_MASK)\r
+       {\r
+               uint16_t StartAddress = (CurrentAddress & 0xFFFF);\r
+       \r
+               /* Paged mode memory programming */\r
+               for (uint16_t CurrentByte = 0; CurrentByte < Write_Memory_Params.BytesToWrite; CurrentByte++)\r
+               {\r
+                       bool    IsOddByte   = (CurrentByte & 0x01);\r
+                       uint8_t ByteToWrite = *(NextWriteByte++);\r
+               \r
+                       if (IsOddByte && (V2Command == CMD_PROGRAM_FLASH_ISP))\r
+                         Write_Memory_Params.ProgrammingCommands[0] |=  READ_WRITE_HIGH_BYTE_MASK;\r
+                       else\r
+                         Write_Memory_Params.ProgrammingCommands[0] &= ~READ_WRITE_HIGH_BYTE_MASK;\r
+                         \r
+                       SPI_SendByte(Write_Memory_Params.ProgrammingCommands[0]);\r
+                       SPI_SendByte(CurrentAddress >> 8);\r
+                       SPI_SendByte(CurrentAddress & 0xFF);\r
+                       SPI_SendByte(ByteToWrite);\r
+                       \r
+                       if (!(PollAddress) && (ByteToWrite != PollValue))\r
+                       {\r
+                               if (IsOddByte && (V2Command == CMD_PROGRAM_FLASH_ISP))\r
+                                 Write_Memory_Params.ProgrammingCommands[2] |= READ_WRITE_HIGH_BYTE_MASK;\r
+                                 \r
+                               PollAddress = (CurrentAddress & 0xFFFF);                                \r
+                       }               \r
+\r
+                       if (IsOddByte || (V2Command == CMD_PROGRAM_EEPROM_ISP))\r
+                         CurrentAddress++;\r
+               }\r
+               \r
+               /* If the current page must be committed, send the PROGRAM PAGE command to the target */\r
+               if (Write_Memory_Params.ProgrammingMode & PROG_MODE_COMMIT_PAGE_MASK)\r
+               {\r
+                       SPI_SendByte(Write_Memory_Params.ProgrammingCommands[1]);\r
+                       SPI_SendByte(StartAddress >> 8);\r
+                       SPI_SendByte(StartAddress & 0xFF);\r
+                       SPI_SendByte(0x00);\r
+                       \r
+                       /* Check if polling is possible, if not switch to timed delay mode */\r
+                       if (!(PollAddress))\r
+                       {\r
+                               Write_Memory_Params.ProgrammingMode &= ~PROG_MODE_PAGED_VALUE_MASK;\r
+                               Write_Memory_Params.ProgrammingMode |=  PROG_MODE_PAGED_TIMEDELAY_MASK;                         \r
+                       }\r
+\r
+                       ProgrammingStatus = ISPTarget_WaitForProgComplete(Write_Memory_Params.ProgrammingMode, PollAddress, PollValue,\r
+                                                                         Write_Memory_Params.DelayMS, Write_Memory_Params.ProgrammingCommands[2]);\r
+               }\r
+       }\r
+       else\r
+       {\r
+               /* Word/byte mode memory programming */\r
+               for (uint16_t CurrentByte = 0; CurrentByte < Write_Memory_Params.BytesToWrite; CurrentByte++)\r
+               {\r
+                       bool    IsOddByte   = (CurrentByte & 0x01);\r
+                       uint8_t ByteToWrite = *(NextWriteByte++);\r
+               \r
+                       if (IsOddByte && (V2Command == CMD_READ_FLASH_ISP))\r
+                         Write_Memory_Params.ProgrammingCommands[0] |=  READ_WRITE_HIGH_BYTE_MASK;\r
+                       else\r
+                         Write_Memory_Params.ProgrammingCommands[0] &= ~READ_WRITE_HIGH_BYTE_MASK;                     \r
+                         \r
+                       SPI_SendByte(Write_Memory_Params.ProgrammingCommands[0]);\r
+                       SPI_SendByte(CurrentAddress >> 8);\r
+                       SPI_SendByte(CurrentAddress & 0xFF);\r
+                       SPI_SendByte(ByteToWrite);\r
+                       \r
+                       if (ByteToWrite != PollValue)\r
+                       {\r
+                               if (IsOddByte && (V2Command == CMD_PROGRAM_FLASH_ISP))\r
+                                 Write_Memory_Params.ProgrammingCommands[2] |= READ_WRITE_HIGH_BYTE_MASK;\r
+                                 \r
+                               PollAddress = (CurrentAddress & 0xFFFF);\r
+                       }\r
+\r
+                       if (IsOddByte || (V2Command == CMD_PROGRAM_EEPROM_ISP))\r
+                         CurrentAddress++;\r
+                       \r
+                       ProgrammingStatus = ISPTarget_WaitForProgComplete(Write_Memory_Params.ProgrammingMode, PollAddress, PollValue,\r
+                                                                         Write_Memory_Params.DelayMS, Write_Memory_Params.ProgrammingCommands[2]);\r
+                         \r
+                       if (ProgrammingStatus != STATUS_CMD_OK)\r
+                         break;\r
+               }\r
+       }\r
+\r
+       Endpoint_Write_Byte(V2Command);\r
+       Endpoint_Write_Byte(ProgrammingStatus);\r
+       Endpoint_ClearIN();\r
+}\r
+\r
+/** Handler for the CMD_READ_FLASH_ISP and CMD_READ_EEPROM_ISP commands, reading in bytes,\r
+ *  words or pages of data from the attached device.\r
+ *\r
+ *  \param[in] V2Command  Issued V2 Protocol command byte from the host\r
+ */\r
+void ISPProtocol_ReadMemory(uint8_t V2Command)\r
+{\r
+       struct\r
+       {\r
+               uint16_t BytesToRead;\r
+               uint8_t  ReadMemoryCommand;\r
+       } Read_Memory_Params;\r
+       \r
+       Endpoint_Read_Stream_LE(&Read_Memory_Params, sizeof(Read_Memory_Params));\r
+       Read_Memory_Params.BytesToRead = SwapEndian_16(Read_Memory_Params.BytesToRead);\r
+       \r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+       \r
+       Endpoint_Write_Byte(V2Command);\r
+       Endpoint_Write_Byte(STATUS_CMD_OK);\r
+       \r
+       if (MustSetAddress)\r
+       {\r
+               if (CurrentAddress & (1UL << 31))\r
+                 ISPTarget_LoadExtendedAddress();\r
+\r
+               MustSetAddress = false;\r
+       }\r
+\r
+       for (uint16_t CurrentByte = 0; CurrentByte < Read_Memory_Params.BytesToRead; CurrentByte++)\r
+       {\r
+               bool IsOddByte = (CurrentByte & 0x01);\r
+\r
+               if (IsOddByte && (V2Command == CMD_READ_FLASH_ISP))\r
+                 Read_Memory_Params.ReadMemoryCommand |=  READ_WRITE_HIGH_BYTE_MASK;\r
+               else\r
+                 Read_Memory_Params.ReadMemoryCommand &= ~READ_WRITE_HIGH_BYTE_MASK;\r
+\r
+               SPI_SendByte(Read_Memory_Params.ReadMemoryCommand);\r
+               SPI_SendByte(CurrentAddress >> 8);\r
+               SPI_SendByte(CurrentAddress & 0xFF);\r
+               Endpoint_Write_Byte(SPI_ReceiveByte());\r
+               \r
+               /* Check if the endpoint bank is currently full */\r
+               if (!(Endpoint_IsReadWriteAllowed()))\r
+               {\r
+                       Endpoint_ClearIN();\r
+                       Endpoint_WaitUntilReady();\r
+               }\r
+               \r
+               if ((IsOddByte && (V2Command == CMD_READ_FLASH_ISP)) || (V2Command == CMD_READ_EEPROM_ISP))\r
+                 CurrentAddress++;\r
+       }\r
+\r
+       Endpoint_Write_Byte(STATUS_CMD_OK);\r
+\r
+       bool IsEndpointFull = !(Endpoint_IsReadWriteAllowed());\r
+       Endpoint_ClearIN();\r
+       \r
+       /* Ensure last packet is a short packet to terminate the transfer */\r
+       if (IsEndpointFull)\r
+       {\r
+               Endpoint_WaitUntilReady();      \r
+               Endpoint_ClearIN();\r
+               Endpoint_WaitUntilReady();      \r
+       }\r
+}\r
+\r
+/** Handler for the CMD_CHI_ERASE_ISP command, clearing the target's FLASH memory. */\r
+void ISPProtocol_ChipErase(void)\r
+{\r
+       struct\r
+       {\r
+               uint8_t EraseDelayMS;\r
+               uint8_t PollMethod;\r
+               uint8_t EraseCommandBytes[4];\r
+       } Erase_Chip_Params;\r
+       \r
+       Endpoint_Read_Stream_LE(&Erase_Chip_Params, sizeof(Erase_Chip_Params));\r
+       \r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+       \r
+       uint8_t ResponseStatus = STATUS_CMD_OK;\r
+       \r
+       for (uint8_t SByte = 0; SByte < sizeof(Erase_Chip_Params.EraseCommandBytes); SByte++)\r
+         SPI_SendByte(Erase_Chip_Params.EraseCommandBytes[SByte]);\r
+\r
+       if (!(Erase_Chip_Params.PollMethod))\r
+         ISPProtocol_DelayMS(Erase_Chip_Params.EraseDelayMS);\r
+       else\r
+         ResponseStatus = ISPTarget_WaitWhileTargetBusy();\r
+         \r
+       Endpoint_Write_Byte(CMD_CHIP_ERASE_ISP);\r
+       Endpoint_Write_Byte(ResponseStatus);\r
+       Endpoint_ClearIN();\r
+}\r
+\r
+/** Handler for the CMD_READ_FUSE_ISP, CMD_READ_LOCK_ISP, CMD_READ_SIGNATURE_ISP and CMD_READ_OSCCAL commands,\r
+ *  reading the requested configuration byte from the device.\r
+ *\r
+ *  \param[in] V2Command  Issued V2 Protocol command byte from the host\r
+ */\r
+void ISPProtocol_ReadFuseLockSigOSCCAL(uint8_t V2Command)\r
+{\r
+       struct\r
+       {\r
+               uint8_t RetByte;\r
+               uint8_t ReadCommandBytes[4];\r
+       } Read_FuseLockSigOSCCAL_Params;\r
+       \r
+       Endpoint_Read_Stream_LE(&Read_FuseLockSigOSCCAL_Params, sizeof(Read_FuseLockSigOSCCAL_Params));\r
+\r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+\r
+       uint8_t ResponseBytes[4];\r
+               \r
+       for (uint8_t RByte = 0; RByte < sizeof(ResponseBytes); RByte++)\r
+         ResponseBytes[RByte] = SPI_TransferByte(Read_FuseLockSigOSCCAL_Params.ReadCommandBytes[RByte]);\r
+               \r
+       Endpoint_Write_Byte(V2Command);\r
+       Endpoint_Write_Byte(STATUS_CMD_OK);\r
+       Endpoint_Write_Byte(ResponseBytes[Read_FuseLockSigOSCCAL_Params.RetByte - 1]);\r
+       Endpoint_Write_Byte(STATUS_CMD_OK);\r
+       Endpoint_ClearIN();\r
+}\r
+\r
+/** Handler for the CMD_WRITE_FUSE_ISP and CMD_WRITE_LOCK_ISP commands, writing the requested configuration\r
+ *  byte to the device.\r
+ *\r
+ *  \param[in] V2Command  Issued V2 Protocol command byte from the host\r
+ */\r
+void ISPProtocol_WriteFuseLock(uint8_t V2Command)\r
+{\r
+       struct\r
+       {\r
+               uint8_t WriteCommandBytes[4];\r
+       } Write_FuseLockSig_Params;\r
+       \r
+       Endpoint_Read_Stream_LE(&Write_FuseLockSig_Params, sizeof(Write_FuseLockSig_Params));\r
+\r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+\r
+       for (uint8_t SByte = 0; SByte < sizeof(Write_FuseLockSig_Params.WriteCommandBytes); SByte++)\r
+         SPI_SendByte(Write_FuseLockSig_Params.WriteCommandBytes[SByte]);\r
+               \r
+       Endpoint_Write_Byte(V2Command);\r
+       Endpoint_Write_Byte(STATUS_CMD_OK);\r
+       Endpoint_Write_Byte(STATUS_CMD_OK);\r
+       Endpoint_ClearIN();\r
+}\r
+\r
+/** Handler for the CMD_SPI_MULTI command, writing and reading arbitrary SPI data to and from the attached device. */\r
+void ISPProtocol_SPIMulti(void)\r
+{\r
+       struct\r
+       {\r
+               uint8_t TxBytes;\r
+               uint8_t RxBytes;\r
+               uint8_t RxStartAddr;\r
+               uint8_t TxData[255];\r
+       } SPI_Multi_Params;\r
+       \r
+       Endpoint_Read_Stream_LE(&SPI_Multi_Params, sizeof(SPI_Multi_Params) - sizeof(SPI_Multi_Params.TxData));\r
+       Endpoint_Read_Stream_LE(&SPI_Multi_Params.TxData, SPI_Multi_Params.TxBytes);\r
+       \r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+       \r
+       Endpoint_Write_Byte(CMD_SPI_MULTI);\r
+       Endpoint_Write_Byte(STATUS_CMD_OK);\r
+\r
+       uint8_t CurrTxPos = 0;\r
+       uint8_t CurrRxPos = 0;\r
+\r
+       /* Write out bytes to transmit until the start of the bytes to receive is met */\r
+       while (CurrTxPos < SPI_Multi_Params.RxStartAddr)\r
+       {\r
+               if (CurrTxPos < SPI_Multi_Params.TxBytes)\r
+                 SPI_SendByte(SPI_Multi_Params.TxData[CurrTxPos]);\r
+               else\r
+                 SPI_SendByte(0);\r
+               \r
+               CurrTxPos++;\r
+       }\r
+\r
+       /* Transmit remaining bytes with padding as needed, read in response bytes */\r
+       while (CurrRxPos < SPI_Multi_Params.RxBytes)\r
+       {\r
+               if (CurrTxPos < SPI_Multi_Params.TxBytes)\r
+                 Endpoint_Write_Byte(SPI_TransferByte(SPI_Multi_Params.TxData[CurrTxPos++]));\r
+               else\r
+                 Endpoint_Write_Byte(SPI_ReceiveByte());\r
+               \r
+               CurrRxPos++;\r
+       }       \r
+       \r
+       Endpoint_Write_Byte(STATUS_CMD_OK);\r
+       Endpoint_ClearIN();\r
+}\r
+\r
+#endif
\ No newline at end of file
diff --git a/Projects/AVRISP/Lib/ISP/ISPProtocol.h b/Projects/AVRISP/Lib/ISP/ISPProtocol.h
new file mode 100644 (file)
index 0000000..85a669a
--- /dev/null
@@ -0,0 +1,97 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Header file for ISPProtocol.c.\r
+ */\r
+\r
+#ifndef _ISP_PROTOCOL_\r
+#define _ISP_PROTOCOL_\r
+\r
+       /* Includes: */\r
+               #include <avr/io.h>\r
+               \r
+               #include "V2Protocol.h"\r
+               \r
+       /* Preprocessor Checks: */\r
+               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
+                       #undef ENABLE_ISP_PROTOCOL\r
+                       #undef ENABLE_TPI_PROTOCOL\r
+                       \r
+                       #if !defined(ENABLE_PDI_PROTOCOL)\r
+                               #define ENABLE_PDI_PROTOCOL\r
+                       #endif\r
+               #endif\r
+\r
+       /* Macros: */\r
+               /** Mask for the reading or writing of the high byte in a FLASH word when issuing a low-level programming command */\r
+               #define READ_WRITE_HIGH_BYTE_MASK       (1 << 3)\r
+\r
+               #define PROG_MODE_PAGED_WRITES_MASK     (1 << 0)\r
+               #define PROG_MODE_WORD_TIMEDELAY_MASK   (1 << 1)\r
+               #define PROG_MODE_WORD_VALUE_MASK       (1 << 2)\r
+               #define PROG_MODE_WORD_READYBUSY_MASK   (1 << 3)\r
+               #define PROG_MODE_PAGED_TIMEDELAY_MASK  (1 << 4)\r
+               #define PROG_MODE_PAGED_VALUE_MASK      (1 << 5)\r
+               #define PROG_MODE_PAGED_READYBUSY_MASK  (1 << 6)\r
+               #define PROG_MODE_COMMIT_PAGE_MASK      (1 << 7)\r
+\r
+       /* Inline Functions: */\r
+               /** Blocking delay for a given number of milliseconds, via a hardware timer.\r
+                *\r
+                *  \param[in] DelayMS  Number of milliseconds to delay for\r
+                */\r
+               static inline void ISPProtocol_DelayMS(uint8_t DelayMS)\r
+               {\r
+                       TCNT0 = 0;\r
+                       TIFR0 = (1 << OCF1A);\r
+\r
+                       while (DelayMS)\r
+                       {\r
+                               if (TIFR0 & (1 << OCF1A))\r
+                               {\r
+                                       TIFR0 = (1 << OCF1A);\r
+                                       DelayMS--;\r
+                               }\r
+                       }\r
+               }\r
+\r
+       /* Function Prototypes: */\r
+               void ISPProtocol_EnterISPMode(void);\r
+               void ISPProtocol_LeaveISPMode(void);\r
+               void ISPProtocol_ProgramMemory(const uint8_t V2Command);\r
+               void ISPProtocol_ReadMemory(const uint8_t V2Command);\r
+               void ISPProtocol_ChipErase(void);\r
+               void ISPProtocol_ReadFuseLockSigOSCCAL(const uint8_t V2Command);\r
+               void ISPProtocol_WriteFuseLock(const uint8_t V2Command);\r
+               void ISPProtocol_SPIMulti(void);\r
+\r
+#endif\r
diff --git a/Projects/AVRISP/Lib/ISP/ISPTarget.c b/Projects/AVRISP/Lib/ISP/ISPTarget.c
new file mode 100644 (file)
index 0000000..e99e3e5
--- /dev/null
@@ -0,0 +1,202 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Target-related functions for the ISP Protocol decoder.\r
+ */\r
+\r
+#include "ISPTarget.h"\r
+\r
+#if defined(ENABLE_ISP_PROTOCOL) || defined(__DOXYGEN__)\r
+\r
+/** Converts the given AVR Studio SCK duration parameter (set by a SET PARAM command from the host) to the nearest\r
+ *  possible SPI clock prescaler mask for passing to the SPI_Init() routine.\r
+ *\r
+ *  \return Nearest SPI prescaler mask for the given SCK frequency\r
+ */\r
+uint8_t ISPTarget_GetSPIPrescalerMask(void)\r
+{\r
+       static const uint8_t SPIMaskFromSCKDuration[] =\r
+       {\r
+       #if (F_CPU == 8000000)\r
+               SPI_SPEED_FCPU_DIV_2,    // AVRStudio =   8MHz SPI, Actual =   4MHz SPI\r
+               SPI_SPEED_FCPU_DIV_2,    // AVRStudio =   4MHz SPI, Actual =   4MHz SPI\r
+               SPI_SPEED_FCPU_DIV_4,    // AVRStudio =   2MHz SPI, Actual =   2MHz SPI\r
+               SPI_SPEED_FCPU_DIV_8,    // AVRStudio =   1MHz SPI, Actual =   1MHz SPI\r
+               SPI_SPEED_FCPU_DIV_16,   // AVRStudio = 500KHz SPI, Actual = 500KHz SPI\r
+               SPI_SPEED_FCPU_DIV_32,   // AVRStudio = 250KHz SPI, Actual = 250KHz SPI\r
+               SPI_SPEED_FCPU_DIV_64    // AVRStudio = 125KHz SPI, Actual = 125KHz SPI \r
+       #elif (F_CPU == 16000000)\r
+               SPI_SPEED_FCPU_DIV_2,    // AVRStudio =   8MHz SPI, Actual =   8MHz SPI\r
+               SPI_SPEED_FCPU_DIV_4,    // AVRStudio =   4MHz SPI, Actual =   4MHz SPI\r
+               SPI_SPEED_FCPU_DIV_8,    // AVRStudio =   2MHz SPI, Actual =   2MHz SPI\r
+               SPI_SPEED_FCPU_DIV_16,   // AVRStudio =   1MHz SPI, Actual =   1MHz SPI\r
+               SPI_SPEED_FCPU_DIV_32,   // AVRStudio = 500KHz SPI, Actual = 500KHz SPI\r
+               SPI_SPEED_FCPU_DIV_64,   // AVRStudio = 250KHz SPI, Actual = 250KHz SPI         \r
+               SPI_SPEED_FCPU_DIV_128   // AVRStudio = 125KHz SPI, Actual = 125KHz SPI\r
+       #else\r
+               #error No SPI prescaler masks for chosen F_CPU speed.\r
+       #endif\r
+       };\r
+\r
+       uint8_t SCKDuration = V2Params_GetParameterValue(PARAM_SCK_DURATION);\r
+\r
+       if (SCKDuration >= sizeof(SPIMaskFromSCKDuration))\r
+         SCKDuration = (sizeof(SPIMaskFromSCKDuration) - 1);\r
+         \r
+       return SPIMaskFromSCKDuration[SCKDuration];\r
+}\r
+\r
+/** Asserts or deasserts the target's reset line, using the correct polarity as set by the host using a SET PARAM command.\r
+ *  When not asserted, the line is tristated so as not to interfere with normal device operation.\r
+ *\r
+ *  \param[in] ResetTarget Boolean true when the target should be held in reset, false otherwise\r
+ */\r
+void ISPTarget_ChangeTargetResetLine(const bool ResetTarget)\r
+{\r
+       if (ResetTarget)\r
+       {\r
+               RESET_LINE_DDR |= RESET_LINE_MASK;\r
+               \r
+               if (!(V2Params_GetParameterValue(PARAM_RESET_POLARITY)))\r
+                 RESET_LINE_PORT |= RESET_LINE_MASK;\r
+       }\r
+       else\r
+       {\r
+               RESET_LINE_DDR  &= ~RESET_LINE_MASK;\r
+               RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
+       }\r
+}\r
+\r
+/** Waits until the last issued target memory programming command has completed, via the check mode given and using\r
+ *  the given parameters.\r
+ *\r
+ *  \param[in] ProgrammingMode  Programming mode used and completion check to use, a mask of PROG_MODE_* constants\r
+ *  \param[in] PollAddress  Memory address to poll for completion if polling check mode used\r
+ *  \param[in] PollValue  Poll value to check against if polling check mode used\r
+ *  \param[in] DelayMS  Milliseconds to delay before returning if delay check mode used\r
+ *  \param[in] ReadMemCommand  Device low-level READ MEMORY command to send if value check mode used\r
+ *\r
+ *  \return V2 Protocol status \ref STATUS_CMD_OK if the no timeout occurred, \ref STATUS_RDY_BSY_TOUT or\r
+ *          \ref STATUS_CMD_TOUT otherwise\r
+ */\r
+uint8_t ISPTarget_WaitForProgComplete(const uint8_t ProgrammingMode, const uint16_t PollAddress, const uint8_t PollValue,\r
+                                      const uint8_t DelayMS, const uint8_t ReadMemCommand)\r
+{\r
+       uint8_t ProgrammingStatus = STATUS_CMD_OK;\r
+\r
+       /* Determine method of Programming Complete check */\r
+       switch (ProgrammingMode & ~(PROG_MODE_PAGED_WRITES_MASK | PROG_MODE_COMMIT_PAGE_MASK))\r
+       {\r
+               case PROG_MODE_WORD_TIMEDELAY_MASK:\r
+               case PROG_MODE_PAGED_TIMEDELAY_MASK:\r
+                       ISPProtocol_DelayMS(DelayMS);\r
+                       break;\r
+               case PROG_MODE_WORD_VALUE_MASK:\r
+               case PROG_MODE_PAGED_VALUE_MASK:\r
+                       TCNT0 = 0;\r
+                       TIFR0 = (1 << OCF1A);\r
+                       \r
+                       uint8_t TimeoutMS = TARGET_BUSY_TIMEOUT_MS;\r
+\r
+                       do\r
+                       {\r
+                               SPI_SendByte(ReadMemCommand);\r
+                               SPI_SendByte(PollAddress >> 8);\r
+                               SPI_SendByte(PollAddress & 0xFF);\r
+\r
+                               if (TIFR0 & (1 << OCF1A))\r
+                               {\r
+                                       TIFR0 = (1 << OCF1A);\r
+                                       TimeoutMS--;\r
+                               }\r
+                       }\r
+                       while ((SPI_TransferByte(0x00) != PollValue) && TimeoutMS);\r
+\r
+                       if (!(TimeoutMS))\r
+                        ProgrammingStatus = STATUS_CMD_TOUT;\r
+                       \r
+                       break;          \r
+               case PROG_MODE_WORD_READYBUSY_MASK:\r
+               case PROG_MODE_PAGED_READYBUSY_MASK:\r
+                       ProgrammingStatus = ISPTarget_WaitWhileTargetBusy();\r
+                       break;\r
+       }\r
+\r
+       return ProgrammingStatus;\r
+}\r
+\r
+/** Waits until the target has completed the last operation, by continuously polling the device's\r
+ *  BUSY flag until it is cleared, or until the \ref TARGET_BUSY_TIMEOUT_MS timeout period has expired.\r
+ *\r
+ *  \return V2 Protocol status \ref STATUS_CMD_OK if the no timeout occurred, \ref STATUS_RDY_BSY_TOUT otherwise\r
+ */\r
+uint8_t ISPTarget_WaitWhileTargetBusy(void)\r
+{\r
+       TCNT0 = 0;\r
+       TIFR0 = (1 << OCF1A);\r
+                       \r
+       uint8_t TimeoutMS = TARGET_BUSY_TIMEOUT_MS;\r
+       \r
+       do\r
+       {\r
+               SPI_SendByte(0xF0);\r
+               SPI_SendByte(0x00);\r
+\r
+               SPI_SendByte(0x00);\r
+\r
+               if (TIFR0 & (1 << OCF1A))\r
+               {\r
+                       TIFR0 = (1 << OCF1A);\r
+                       TimeoutMS--;\r
+               }\r
+       }\r
+       while ((SPI_ReceiveByte() & 0x01) && TimeoutMS);\r
+\r
+       if (!(TimeoutMS))\r
+         return STATUS_RDY_BSY_TOUT;\r
+       else\r
+         return STATUS_CMD_OK;\r
+}\r
+\r
+/** Sends a low-level LOAD EXTENDED ADDRESS command to the target, for addressing of memory beyond the\r
+ *  64KB boundary. This sends the command with the correct address as indicated by the current address\r
+ *  pointer variable set by the host when a SET ADDRESS command is issued.\r
+ */\r
+void ISPTarget_LoadExtendedAddress(void)\r
+{\r
+       SPI_SendByte(0x4D);\r
+       SPI_SendByte(0x00);\r
+       SPI_SendByte((CurrentAddress & 0x00FF0000) >> 16);\r
+       SPI_SendByte(0x00);     \r
+}\r
+\r
+#endif\r
diff --git a/Projects/AVRISP/Lib/ISP/ISPTarget.h b/Projects/AVRISP/Lib/ISP/ISPTarget.h
new file mode 100644 (file)
index 0000000..62d8bbb
--- /dev/null
@@ -0,0 +1,76 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Header file for ISPTarget.c.\r
+ */\r
+\r
+#ifndef _ISP_TARGET_\r
+#define _ISP_TARGET_\r
+\r
+       /* Includes: */\r
+               #include <avr/io.h>\r
+               #include <util/delay.h>\r
+\r
+               #include <LUFA/Drivers/USB/USB.h>\r
+               #include <LUFA/Drivers/Peripheral/SPI.h>\r
+               \r
+               #include "../Descriptors.h"\r
+               #include "V2ProtocolConstants.h"\r
+               #include "V2ProtocolParams.h"\r
+\r
+       /* Preprocessor Checks: */\r
+               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
+                       #undef ENABLE_ISP_PROTOCOL\r
+                       #undef ENABLE_TPI_PROTOCOL\r
+                       \r
+                       #if !defined(ENABLE_PDI_PROTOCOL)\r
+                               #define ENABLE_PDI_PROTOCOL\r
+                       #endif\r
+               #endif\r
+\r
+       /* Macros: */\r
+               /** Total number of allowable ISP programming speeds supported by the device */\r
+               #define TOTAL_ISP_PROGRAMMING_SPEEDS  7\r
+\r
+               /** Timeout in milliseconds of target busy-wait loops waiting for a command to complete */\r
+               #define TARGET_BUSY_TIMEOUT_MS        100\r
+\r
+       /* Function Prototypes: */\r
+               uint8_t ISPTarget_GetSPIPrescalerMask(void);\r
+               void    ISPTarget_ChangeTargetResetLine(const bool ResetTarget);\r
+               uint8_t ISPTarget_WaitForProgComplete(const uint8_t ProgrammingMode, const uint16_t PollAddress,\r
+                                                     const uint8_t PollValue, const uint8_t DelayMS,\r
+                                                     const uint8_t ReadMemCommand);\r
+               uint8_t ISPTarget_WaitWhileTargetBusy(void);\r
+               void    ISPTarget_LoadExtendedAddress(void);\r
+\r
+#endif\r
diff --git a/Projects/AVRISP/Lib/ISPProtocol.c b/Projects/AVRISP/Lib/ISPProtocol.c
deleted file mode 100644 (file)
index e769cee..0000000
+++ /dev/null
@@ -1,474 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  ISP Protocol handler, to process V2 Protocol wrapped ISP commands used in Atmel programmer devices.\r
- */\r
-\r
-#include "ISPProtocol.h"\r
-\r
-#if defined(ENABLE_ISP_PROTOCOL) || defined(__DOXYGEN__)\r
-\r
-/** Handler for the CMD_ENTER_PROGMODE_ISP command, which attempts to enter programming mode on\r
- *  the attached device, returning success or failure back to the host.\r
- */\r
-void ISPProtocol_EnterISPMode(void)\r
-{\r
-       struct\r
-       {\r
-               uint8_t TimeoutMS;\r
-               uint8_t PinStabDelayMS;\r
-               uint8_t ExecutionDelayMS;\r
-               uint8_t SynchLoops;\r
-               uint8_t ByteDelay;\r
-               uint8_t PollValue;\r
-               uint8_t PollIndex;\r
-               uint8_t EnterProgBytes[4];\r
-       } Enter_ISP_Params;\r
-       \r
-       Endpoint_Read_Stream_LE(&Enter_ISP_Params, sizeof(Enter_ISP_Params));\r
-\r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-\r
-       uint8_t ResponseStatus = STATUS_CMD_FAILED;\r
-       \r
-       CurrentAddress = 0;\r
-\r
-       ISPProtocol_DelayMS(Enter_ISP_Params.ExecutionDelayMS); \r
-       SPI_Init(ISPTarget_GetSPIPrescalerMask() | SPI_SCK_LEAD_RISING | SPI_SAMPLE_LEADING | SPI_MODE_MASTER);\r
-               \r
-       while (Enter_ISP_Params.SynchLoops-- && (ResponseStatus == STATUS_CMD_FAILED))\r
-       {\r
-               uint8_t ResponseBytes[4];\r
-\r
-               ISPTarget_ChangeTargetResetLine(true);\r
-               ISPProtocol_DelayMS(Enter_ISP_Params.PinStabDelayMS);\r
-\r
-               for (uint8_t RByte = 0; RByte < sizeof(ResponseBytes); RByte++)\r
-               {\r
-                       ISPProtocol_DelayMS(Enter_ISP_Params.ByteDelay);\r
-                       ResponseBytes[RByte] = SPI_TransferByte(Enter_ISP_Params.EnterProgBytes[RByte]);\r
-               }\r
-               \r
-               /* Check if polling disabled, or if the polled value matches the expected value */\r
-               if (!(Enter_ISP_Params.PollIndex) || (ResponseBytes[Enter_ISP_Params.PollIndex - 1] == Enter_ISP_Params.PollValue))\r
-               {\r
-                       ResponseStatus = STATUS_CMD_OK;\r
-               }\r
-               else\r
-               {\r
-                       ISPTarget_ChangeTargetResetLine(false);\r
-                       ISPProtocol_DelayMS(Enter_ISP_Params.PinStabDelayMS);\r
-               }\r
-       }\r
-\r
-       Endpoint_Write_Byte(CMD_ENTER_PROGMODE_ISP);\r
-       Endpoint_Write_Byte(ResponseStatus);\r
-       Endpoint_ClearIN();\r
-}\r
-\r
-/** Handler for the CMD_LEAVE_ISP command, which releases the target from programming mode. */\r
-void ISPProtocol_LeaveISPMode(void)\r
-{\r
-       struct\r
-       {\r
-               uint8_t PreDelayMS;\r
-               uint8_t PostDelayMS;\r
-       } Leave_ISP_Params;\r
-\r
-       Endpoint_Read_Stream_LE(&Leave_ISP_Params, sizeof(Leave_ISP_Params));\r
-       \r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-\r
-       ISPProtocol_DelayMS(Leave_ISP_Params.PreDelayMS);\r
-       ISPTarget_ChangeTargetResetLine(false);\r
-       SPI_ShutDown();\r
-       ISPProtocol_DelayMS(Leave_ISP_Params.PostDelayMS);\r
-\r
-       Endpoint_Write_Byte(CMD_LEAVE_PROGMODE_ISP);\r
-       Endpoint_Write_Byte(STATUS_CMD_OK);\r
-       Endpoint_ClearIN();\r
-}\r
-\r
-/** Handler for the CMD_PROGRAM_FLASH_ISP and CMD_PROGRAM_EEPROM_ISP commands, writing out bytes,\r
- *  words or pages of data to the attached device.\r
- *\r
- *  \param[in] V2Command  Issued V2 Protocol command byte from the host\r
- */\r
-void ISPProtocol_ProgramMemory(uint8_t V2Command)\r
-{\r
-       struct\r
-       {\r
-               uint16_t BytesToWrite;\r
-               uint8_t  ProgrammingMode;\r
-               uint8_t  DelayMS;\r
-               uint8_t  ProgrammingCommands[3];\r
-               uint8_t  PollValue1;\r
-               uint8_t  PollValue2;\r
-               uint8_t  ProgData[256]; // Note, the Jungo driver has a very short ACK timeout period, need to buffer the\r
-       } Write_Memory_Params;      // whole page and ACK the packet as fast as possible to prevent it from aborting\r
-       \r
-       Endpoint_Read_Stream_LE(&Write_Memory_Params, (sizeof(Write_Memory_Params) -\r
-                                                      sizeof(Write_Memory_Params.ProgData)));\r
-\r
-\r
-       Write_Memory_Params.BytesToWrite = SwapEndian_16(Write_Memory_Params.BytesToWrite);\r
-       \r
-       if (Write_Memory_Params.BytesToWrite > sizeof(Write_Memory_Params.ProgData))\r
-       {\r
-               Endpoint_ClearOUT();\r
-               Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-\r
-               Endpoint_Write_Byte(V2Command);\r
-               Endpoint_Write_Byte(STATUS_CMD_FAILED);\r
-               Endpoint_ClearIN();\r
-               return;\r
-       }\r
-       \r
-       Endpoint_Read_Stream_LE(&Write_Memory_Params.ProgData, Write_Memory_Params.BytesToWrite);\r
-\r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-\r
-       uint8_t  ProgrammingStatus = STATUS_CMD_OK;     \r
-       uint16_t PollAddress       = 0;\r
-       uint8_t  PollValue         = (V2Command == CMD_PROGRAM_FLASH_ISP) ? Write_Memory_Params.PollValue1 :\r
-                                                                           Write_Memory_Params.PollValue2;\r
-       uint8_t* NextWriteByte = Write_Memory_Params.ProgData;\r
-\r
-       if (MustSetAddress)\r
-       {\r
-               if (CurrentAddress & (1UL << 31))\r
-                 ISPTarget_LoadExtendedAddress();\r
-\r
-               MustSetAddress = false;\r
-       }\r
-\r
-       if (Write_Memory_Params.ProgrammingMode & PROG_MODE_PAGED_WRITES_MASK)\r
-       {\r
-               uint16_t StartAddress = (CurrentAddress & 0xFFFF);\r
-       \r
-               /* Paged mode memory programming */\r
-               for (uint16_t CurrentByte = 0; CurrentByte < Write_Memory_Params.BytesToWrite; CurrentByte++)\r
-               {\r
-                       bool    IsOddByte   = (CurrentByte & 0x01);\r
-                       uint8_t ByteToWrite = *(NextWriteByte++);\r
-               \r
-                       if (IsOddByte && (V2Command == CMD_PROGRAM_FLASH_ISP))\r
-                         Write_Memory_Params.ProgrammingCommands[0] |=  READ_WRITE_HIGH_BYTE_MASK;\r
-                       else\r
-                         Write_Memory_Params.ProgrammingCommands[0] &= ~READ_WRITE_HIGH_BYTE_MASK;\r
-                         \r
-                       SPI_SendByte(Write_Memory_Params.ProgrammingCommands[0]);\r
-                       SPI_SendByte(CurrentAddress >> 8);\r
-                       SPI_SendByte(CurrentAddress & 0xFF);\r
-                       SPI_SendByte(ByteToWrite);\r
-                       \r
-                       if (!(PollAddress) && (ByteToWrite != PollValue))\r
-                       {\r
-                               if (IsOddByte && (V2Command == CMD_PROGRAM_FLASH_ISP))\r
-                                 Write_Memory_Params.ProgrammingCommands[2] |= READ_WRITE_HIGH_BYTE_MASK;\r
-                                 \r
-                               PollAddress = (CurrentAddress & 0xFFFF);                                \r
-                       }               \r
-\r
-                       if (IsOddByte || (V2Command == CMD_PROGRAM_EEPROM_ISP))\r
-                         CurrentAddress++;\r
-               }\r
-               \r
-               /* If the current page must be committed, send the PROGRAM PAGE command to the target */\r
-               if (Write_Memory_Params.ProgrammingMode & PROG_MODE_COMMIT_PAGE_MASK)\r
-               {\r
-                       SPI_SendByte(Write_Memory_Params.ProgrammingCommands[1]);\r
-                       SPI_SendByte(StartAddress >> 8);\r
-                       SPI_SendByte(StartAddress & 0xFF);\r
-                       SPI_SendByte(0x00);\r
-                       \r
-                       /* Check if polling is possible, if not switch to timed delay mode */\r
-                       if (!(PollAddress))\r
-                       {\r
-                               Write_Memory_Params.ProgrammingMode &= ~PROG_MODE_PAGED_VALUE_MASK;\r
-                               Write_Memory_Params.ProgrammingMode |=  PROG_MODE_PAGED_TIMEDELAY_MASK;                         \r
-                       }\r
-\r
-                       ProgrammingStatus = ISPTarget_WaitForProgComplete(Write_Memory_Params.ProgrammingMode, PollAddress, PollValue,\r
-                                                                         Write_Memory_Params.DelayMS, Write_Memory_Params.ProgrammingCommands[2]);\r
-               }\r
-       }\r
-       else\r
-       {\r
-               /* Word/byte mode memory programming */\r
-               for (uint16_t CurrentByte = 0; CurrentByte < Write_Memory_Params.BytesToWrite; CurrentByte++)\r
-               {\r
-                       bool    IsOddByte   = (CurrentByte & 0x01);\r
-                       uint8_t ByteToWrite = *(NextWriteByte++);\r
-               \r
-                       if (IsOddByte && (V2Command == CMD_READ_FLASH_ISP))\r
-                         Write_Memory_Params.ProgrammingCommands[0] |=  READ_WRITE_HIGH_BYTE_MASK;\r
-                       else\r
-                         Write_Memory_Params.ProgrammingCommands[0] &= ~READ_WRITE_HIGH_BYTE_MASK;                     \r
-                         \r
-                       SPI_SendByte(Write_Memory_Params.ProgrammingCommands[0]);\r
-                       SPI_SendByte(CurrentAddress >> 8);\r
-                       SPI_SendByte(CurrentAddress & 0xFF);\r
-                       SPI_SendByte(ByteToWrite);\r
-                       \r
-                       if (ByteToWrite != PollValue)\r
-                       {\r
-                               if (IsOddByte && (V2Command == CMD_PROGRAM_FLASH_ISP))\r
-                                 Write_Memory_Params.ProgrammingCommands[2] |= READ_WRITE_HIGH_BYTE_MASK;\r
-                                 \r
-                               PollAddress = (CurrentAddress & 0xFFFF);\r
-                       }\r
-\r
-                       if (IsOddByte || (V2Command == CMD_PROGRAM_EEPROM_ISP))\r
-                         CurrentAddress++;\r
-                       \r
-                       ProgrammingStatus = ISPTarget_WaitForProgComplete(Write_Memory_Params.ProgrammingMode, PollAddress, PollValue,\r
-                                                                         Write_Memory_Params.DelayMS, Write_Memory_Params.ProgrammingCommands[2]);\r
-                         \r
-                       if (ProgrammingStatus != STATUS_CMD_OK)\r
-                         break;\r
-               }\r
-       }\r
-\r
-       Endpoint_Write_Byte(V2Command);\r
-       Endpoint_Write_Byte(ProgrammingStatus);\r
-       Endpoint_ClearIN();\r
-}\r
-\r
-/** Handler for the CMD_READ_FLASH_ISP and CMD_READ_EEPROM_ISP commands, reading in bytes,\r
- *  words or pages of data from the attached device.\r
- *\r
- *  \param[in] V2Command  Issued V2 Protocol command byte from the host\r
- */\r
-void ISPProtocol_ReadMemory(uint8_t V2Command)\r
-{\r
-       struct\r
-       {\r
-               uint16_t BytesToRead;\r
-               uint8_t  ReadMemoryCommand;\r
-       } Read_Memory_Params;\r
-       \r
-       Endpoint_Read_Stream_LE(&Read_Memory_Params, sizeof(Read_Memory_Params));\r
-       Read_Memory_Params.BytesToRead = SwapEndian_16(Read_Memory_Params.BytesToRead);\r
-       \r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-       \r
-       Endpoint_Write_Byte(V2Command);\r
-       Endpoint_Write_Byte(STATUS_CMD_OK);\r
-       \r
-       if (MustSetAddress)\r
-       {\r
-               if (CurrentAddress & (1UL << 31))\r
-                 ISPTarget_LoadExtendedAddress();\r
-\r
-               MustSetAddress = false;\r
-       }\r
-\r
-       for (uint16_t CurrentByte = 0; CurrentByte < Read_Memory_Params.BytesToRead; CurrentByte++)\r
-       {\r
-               bool IsOddByte = (CurrentByte & 0x01);\r
-\r
-               if (IsOddByte && (V2Command == CMD_READ_FLASH_ISP))\r
-                 Read_Memory_Params.ReadMemoryCommand |=  READ_WRITE_HIGH_BYTE_MASK;\r
-               else\r
-                 Read_Memory_Params.ReadMemoryCommand &= ~READ_WRITE_HIGH_BYTE_MASK;\r
-\r
-               SPI_SendByte(Read_Memory_Params.ReadMemoryCommand);\r
-               SPI_SendByte(CurrentAddress >> 8);\r
-               SPI_SendByte(CurrentAddress & 0xFF);\r
-               Endpoint_Write_Byte(SPI_ReceiveByte());\r
-               \r
-               /* Check if the endpoint bank is currently full */\r
-               if (!(Endpoint_IsReadWriteAllowed()))\r
-               {\r
-                       Endpoint_ClearIN();\r
-                       Endpoint_WaitUntilReady();\r
-               }\r
-               \r
-               if ((IsOddByte && (V2Command == CMD_READ_FLASH_ISP)) || (V2Command == CMD_READ_EEPROM_ISP))\r
-                 CurrentAddress++;\r
-       }\r
-\r
-       Endpoint_Write_Byte(STATUS_CMD_OK);\r
-\r
-       bool IsEndpointFull = !(Endpoint_IsReadWriteAllowed());\r
-       Endpoint_ClearIN();\r
-       \r
-       /* Ensure last packet is a short packet to terminate the transfer */\r
-       if (IsEndpointFull)\r
-       {\r
-               Endpoint_WaitUntilReady();      \r
-               Endpoint_ClearIN();\r
-               Endpoint_WaitUntilReady();      \r
-       }\r
-}\r
-\r
-/** Handler for the CMD_CHI_ERASE_ISP command, clearing the target's FLASH memory. */\r
-void ISPProtocol_ChipErase(void)\r
-{\r
-       struct\r
-       {\r
-               uint8_t EraseDelayMS;\r
-               uint8_t PollMethod;\r
-               uint8_t EraseCommandBytes[4];\r
-       } Erase_Chip_Params;\r
-       \r
-       Endpoint_Read_Stream_LE(&Erase_Chip_Params, sizeof(Erase_Chip_Params));\r
-       \r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-       \r
-       uint8_t ResponseStatus = STATUS_CMD_OK;\r
-       \r
-       for (uint8_t SByte = 0; SByte < sizeof(Erase_Chip_Params.EraseCommandBytes); SByte++)\r
-         SPI_SendByte(Erase_Chip_Params.EraseCommandBytes[SByte]);\r
-\r
-       if (!(Erase_Chip_Params.PollMethod))\r
-         ISPProtocol_DelayMS(Erase_Chip_Params.EraseDelayMS);\r
-       else\r
-         ResponseStatus = ISPTarget_WaitWhileTargetBusy();\r
-         \r
-       Endpoint_Write_Byte(CMD_CHIP_ERASE_ISP);\r
-       Endpoint_Write_Byte(ResponseStatus);\r
-       Endpoint_ClearIN();\r
-}\r
-\r
-/** Handler for the CMD_READ_FUSE_ISP, CMD_READ_LOCK_ISP, CMD_READ_SIGNATURE_ISP and CMD_READ_OSCCAL commands,\r
- *  reading the requested configuration byte from the device.\r
- *\r
- *  \param[in] V2Command  Issued V2 Protocol command byte from the host\r
- */\r
-void ISPProtocol_ReadFuseLockSigOSCCAL(uint8_t V2Command)\r
-{\r
-       struct\r
-       {\r
-               uint8_t RetByte;\r
-               uint8_t ReadCommandBytes[4];\r
-       } Read_FuseLockSigOSCCAL_Params;\r
-       \r
-       Endpoint_Read_Stream_LE(&Read_FuseLockSigOSCCAL_Params, sizeof(Read_FuseLockSigOSCCAL_Params));\r
-\r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-\r
-       uint8_t ResponseBytes[4];\r
-               \r
-       for (uint8_t RByte = 0; RByte < sizeof(ResponseBytes); RByte++)\r
-         ResponseBytes[RByte] = SPI_TransferByte(Read_FuseLockSigOSCCAL_Params.ReadCommandBytes[RByte]);\r
-               \r
-       Endpoint_Write_Byte(V2Command);\r
-       Endpoint_Write_Byte(STATUS_CMD_OK);\r
-       Endpoint_Write_Byte(ResponseBytes[Read_FuseLockSigOSCCAL_Params.RetByte - 1]);\r
-       Endpoint_Write_Byte(STATUS_CMD_OK);\r
-       Endpoint_ClearIN();\r
-}\r
-\r
-/** Handler for the CMD_WRITE_FUSE_ISP and CMD_WRITE_LOCK_ISP commands, writing the requested configuration\r
- *  byte to the device.\r
- *\r
- *  \param[in] V2Command  Issued V2 Protocol command byte from the host\r
- */\r
-void ISPProtocol_WriteFuseLock(uint8_t V2Command)\r
-{\r
-       struct\r
-       {\r
-               uint8_t WriteCommandBytes[4];\r
-       } Write_FuseLockSig_Params;\r
-       \r
-       Endpoint_Read_Stream_LE(&Write_FuseLockSig_Params, sizeof(Write_FuseLockSig_Params));\r
-\r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-\r
-       for (uint8_t SByte = 0; SByte < sizeof(Write_FuseLockSig_Params.WriteCommandBytes); SByte++)\r
-         SPI_SendByte(Write_FuseLockSig_Params.WriteCommandBytes[SByte]);\r
-               \r
-       Endpoint_Write_Byte(V2Command);\r
-       Endpoint_Write_Byte(STATUS_CMD_OK);\r
-       Endpoint_Write_Byte(STATUS_CMD_OK);\r
-       Endpoint_ClearIN();\r
-}\r
-\r
-/** Handler for the CMD_SPI_MULTI command, writing and reading arbitrary SPI data to and from the attached device. */\r
-void ISPProtocol_SPIMulti(void)\r
-{\r
-       struct\r
-       {\r
-               uint8_t TxBytes;\r
-               uint8_t RxBytes;\r
-               uint8_t RxStartAddr;\r
-               uint8_t TxData[255];\r
-       } SPI_Multi_Params;\r
-       \r
-       Endpoint_Read_Stream_LE(&SPI_Multi_Params, sizeof(SPI_Multi_Params) - sizeof(SPI_Multi_Params.TxData));\r
-       Endpoint_Read_Stream_LE(&SPI_Multi_Params.TxData, SPI_Multi_Params.TxBytes);\r
-       \r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-       \r
-       Endpoint_Write_Byte(CMD_SPI_MULTI);\r
-       Endpoint_Write_Byte(STATUS_CMD_OK);\r
-\r
-       uint8_t CurrTxPos = 0;\r
-       uint8_t CurrRxPos = 0;\r
-\r
-       /* Write out bytes to transmit until the start of the bytes to receive is met */\r
-       while (CurrTxPos < SPI_Multi_Params.RxStartAddr)\r
-       {\r
-               if (CurrTxPos < SPI_Multi_Params.TxBytes)\r
-                 SPI_SendByte(SPI_Multi_Params.TxData[CurrTxPos]);\r
-               else\r
-                 SPI_SendByte(0);\r
-               \r
-               CurrTxPos++;\r
-       }\r
-\r
-       /* Transmit remaining bytes with padding as needed, read in response bytes */\r
-       while (CurrRxPos < SPI_Multi_Params.RxBytes)\r
-       {\r
-               if (CurrTxPos < SPI_Multi_Params.TxBytes)\r
-                 Endpoint_Write_Byte(SPI_TransferByte(SPI_Multi_Params.TxData[CurrTxPos++]));\r
-               else\r
-                 Endpoint_Write_Byte(SPI_ReceiveByte());\r
-               \r
-               CurrRxPos++;\r
-       }       \r
-       \r
-       Endpoint_Write_Byte(STATUS_CMD_OK);\r
-       Endpoint_ClearIN();\r
-}\r
-\r
-#endif
\ No newline at end of file
diff --git a/Projects/AVRISP/Lib/ISPProtocol.h b/Projects/AVRISP/Lib/ISPProtocol.h
deleted file mode 100644 (file)
index 85a669a..0000000
+++ /dev/null
@@ -1,97 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  Header file for ISPProtocol.c.\r
- */\r
-\r
-#ifndef _ISP_PROTOCOL_\r
-#define _ISP_PROTOCOL_\r
-\r
-       /* Includes: */\r
-               #include <avr/io.h>\r
-               \r
-               #include "V2Protocol.h"\r
-               \r
-       /* Preprocessor Checks: */\r
-               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
-                       #undef ENABLE_ISP_PROTOCOL\r
-                       #undef ENABLE_TPI_PROTOCOL\r
-                       \r
-                       #if !defined(ENABLE_PDI_PROTOCOL)\r
-                               #define ENABLE_PDI_PROTOCOL\r
-                       #endif\r
-               #endif\r
-\r
-       /* Macros: */\r
-               /** Mask for the reading or writing of the high byte in a FLASH word when issuing a low-level programming command */\r
-               #define READ_WRITE_HIGH_BYTE_MASK       (1 << 3)\r
-\r
-               #define PROG_MODE_PAGED_WRITES_MASK     (1 << 0)\r
-               #define PROG_MODE_WORD_TIMEDELAY_MASK   (1 << 1)\r
-               #define PROG_MODE_WORD_VALUE_MASK       (1 << 2)\r
-               #define PROG_MODE_WORD_READYBUSY_MASK   (1 << 3)\r
-               #define PROG_MODE_PAGED_TIMEDELAY_MASK  (1 << 4)\r
-               #define PROG_MODE_PAGED_VALUE_MASK      (1 << 5)\r
-               #define PROG_MODE_PAGED_READYBUSY_MASK  (1 << 6)\r
-               #define PROG_MODE_COMMIT_PAGE_MASK      (1 << 7)\r
-\r
-       /* Inline Functions: */\r
-               /** Blocking delay for a given number of milliseconds, via a hardware timer.\r
-                *\r
-                *  \param[in] DelayMS  Number of milliseconds to delay for\r
-                */\r
-               static inline void ISPProtocol_DelayMS(uint8_t DelayMS)\r
-               {\r
-                       TCNT0 = 0;\r
-                       TIFR0 = (1 << OCF1A);\r
-\r
-                       while (DelayMS)\r
-                       {\r
-                               if (TIFR0 & (1 << OCF1A))\r
-                               {\r
-                                       TIFR0 = (1 << OCF1A);\r
-                                       DelayMS--;\r
-                               }\r
-                       }\r
-               }\r
-\r
-       /* Function Prototypes: */\r
-               void ISPProtocol_EnterISPMode(void);\r
-               void ISPProtocol_LeaveISPMode(void);\r
-               void ISPProtocol_ProgramMemory(const uint8_t V2Command);\r
-               void ISPProtocol_ReadMemory(const uint8_t V2Command);\r
-               void ISPProtocol_ChipErase(void);\r
-               void ISPProtocol_ReadFuseLockSigOSCCAL(const uint8_t V2Command);\r
-               void ISPProtocol_WriteFuseLock(const uint8_t V2Command);\r
-               void ISPProtocol_SPIMulti(void);\r
-\r
-#endif\r
diff --git a/Projects/AVRISP/Lib/ISPTarget.c b/Projects/AVRISP/Lib/ISPTarget.c
deleted file mode 100644 (file)
index e99e3e5..0000000
+++ /dev/null
@@ -1,202 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  Target-related functions for the ISP Protocol decoder.\r
- */\r
-\r
-#include "ISPTarget.h"\r
-\r
-#if defined(ENABLE_ISP_PROTOCOL) || defined(__DOXYGEN__)\r
-\r
-/** Converts the given AVR Studio SCK duration parameter (set by a SET PARAM command from the host) to the nearest\r
- *  possible SPI clock prescaler mask for passing to the SPI_Init() routine.\r
- *\r
- *  \return Nearest SPI prescaler mask for the given SCK frequency\r
- */\r
-uint8_t ISPTarget_GetSPIPrescalerMask(void)\r
-{\r
-       static const uint8_t SPIMaskFromSCKDuration[] =\r
-       {\r
-       #if (F_CPU == 8000000)\r
-               SPI_SPEED_FCPU_DIV_2,    // AVRStudio =   8MHz SPI, Actual =   4MHz SPI\r
-               SPI_SPEED_FCPU_DIV_2,    // AVRStudio =   4MHz SPI, Actual =   4MHz SPI\r
-               SPI_SPEED_FCPU_DIV_4,    // AVRStudio =   2MHz SPI, Actual =   2MHz SPI\r
-               SPI_SPEED_FCPU_DIV_8,    // AVRStudio =   1MHz SPI, Actual =   1MHz SPI\r
-               SPI_SPEED_FCPU_DIV_16,   // AVRStudio = 500KHz SPI, Actual = 500KHz SPI\r
-               SPI_SPEED_FCPU_DIV_32,   // AVRStudio = 250KHz SPI, Actual = 250KHz SPI\r
-               SPI_SPEED_FCPU_DIV_64    // AVRStudio = 125KHz SPI, Actual = 125KHz SPI \r
-       #elif (F_CPU == 16000000)\r
-               SPI_SPEED_FCPU_DIV_2,    // AVRStudio =   8MHz SPI, Actual =   8MHz SPI\r
-               SPI_SPEED_FCPU_DIV_4,    // AVRStudio =   4MHz SPI, Actual =   4MHz SPI\r
-               SPI_SPEED_FCPU_DIV_8,    // AVRStudio =   2MHz SPI, Actual =   2MHz SPI\r
-               SPI_SPEED_FCPU_DIV_16,   // AVRStudio =   1MHz SPI, Actual =   1MHz SPI\r
-               SPI_SPEED_FCPU_DIV_32,   // AVRStudio = 500KHz SPI, Actual = 500KHz SPI\r
-               SPI_SPEED_FCPU_DIV_64,   // AVRStudio = 250KHz SPI, Actual = 250KHz SPI         \r
-               SPI_SPEED_FCPU_DIV_128   // AVRStudio = 125KHz SPI, Actual = 125KHz SPI\r
-       #else\r
-               #error No SPI prescaler masks for chosen F_CPU speed.\r
-       #endif\r
-       };\r
-\r
-       uint8_t SCKDuration = V2Params_GetParameterValue(PARAM_SCK_DURATION);\r
-\r
-       if (SCKDuration >= sizeof(SPIMaskFromSCKDuration))\r
-         SCKDuration = (sizeof(SPIMaskFromSCKDuration) - 1);\r
-         \r
-       return SPIMaskFromSCKDuration[SCKDuration];\r
-}\r
-\r
-/** Asserts or deasserts the target's reset line, using the correct polarity as set by the host using a SET PARAM command.\r
- *  When not asserted, the line is tristated so as not to interfere with normal device operation.\r
- *\r
- *  \param[in] ResetTarget Boolean true when the target should be held in reset, false otherwise\r
- */\r
-void ISPTarget_ChangeTargetResetLine(const bool ResetTarget)\r
-{\r
-       if (ResetTarget)\r
-       {\r
-               RESET_LINE_DDR |= RESET_LINE_MASK;\r
-               \r
-               if (!(V2Params_GetParameterValue(PARAM_RESET_POLARITY)))\r
-                 RESET_LINE_PORT |= RESET_LINE_MASK;\r
-       }\r
-       else\r
-       {\r
-               RESET_LINE_DDR  &= ~RESET_LINE_MASK;\r
-               RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
-       }\r
-}\r
-\r
-/** Waits until the last issued target memory programming command has completed, via the check mode given and using\r
- *  the given parameters.\r
- *\r
- *  \param[in] ProgrammingMode  Programming mode used and completion check to use, a mask of PROG_MODE_* constants\r
- *  \param[in] PollAddress  Memory address to poll for completion if polling check mode used\r
- *  \param[in] PollValue  Poll value to check against if polling check mode used\r
- *  \param[in] DelayMS  Milliseconds to delay before returning if delay check mode used\r
- *  \param[in] ReadMemCommand  Device low-level READ MEMORY command to send if value check mode used\r
- *\r
- *  \return V2 Protocol status \ref STATUS_CMD_OK if the no timeout occurred, \ref STATUS_RDY_BSY_TOUT or\r
- *          \ref STATUS_CMD_TOUT otherwise\r
- */\r
-uint8_t ISPTarget_WaitForProgComplete(const uint8_t ProgrammingMode, const uint16_t PollAddress, const uint8_t PollValue,\r
-                                      const uint8_t DelayMS, const uint8_t ReadMemCommand)\r
-{\r
-       uint8_t ProgrammingStatus = STATUS_CMD_OK;\r
-\r
-       /* Determine method of Programming Complete check */\r
-       switch (ProgrammingMode & ~(PROG_MODE_PAGED_WRITES_MASK | PROG_MODE_COMMIT_PAGE_MASK))\r
-       {\r
-               case PROG_MODE_WORD_TIMEDELAY_MASK:\r
-               case PROG_MODE_PAGED_TIMEDELAY_MASK:\r
-                       ISPProtocol_DelayMS(DelayMS);\r
-                       break;\r
-               case PROG_MODE_WORD_VALUE_MASK:\r
-               case PROG_MODE_PAGED_VALUE_MASK:\r
-                       TCNT0 = 0;\r
-                       TIFR0 = (1 << OCF1A);\r
-                       \r
-                       uint8_t TimeoutMS = TARGET_BUSY_TIMEOUT_MS;\r
-\r
-                       do\r
-                       {\r
-                               SPI_SendByte(ReadMemCommand);\r
-                               SPI_SendByte(PollAddress >> 8);\r
-                               SPI_SendByte(PollAddress & 0xFF);\r
-\r
-                               if (TIFR0 & (1 << OCF1A))\r
-                               {\r
-                                       TIFR0 = (1 << OCF1A);\r
-                                       TimeoutMS--;\r
-                               }\r
-                       }\r
-                       while ((SPI_TransferByte(0x00) != PollValue) && TimeoutMS);\r
-\r
-                       if (!(TimeoutMS))\r
-                        ProgrammingStatus = STATUS_CMD_TOUT;\r
-                       \r
-                       break;          \r
-               case PROG_MODE_WORD_READYBUSY_MASK:\r
-               case PROG_MODE_PAGED_READYBUSY_MASK:\r
-                       ProgrammingStatus = ISPTarget_WaitWhileTargetBusy();\r
-                       break;\r
-       }\r
-\r
-       return ProgrammingStatus;\r
-}\r
-\r
-/** Waits until the target has completed the last operation, by continuously polling the device's\r
- *  BUSY flag until it is cleared, or until the \ref TARGET_BUSY_TIMEOUT_MS timeout period has expired.\r
- *\r
- *  \return V2 Protocol status \ref STATUS_CMD_OK if the no timeout occurred, \ref STATUS_RDY_BSY_TOUT otherwise\r
- */\r
-uint8_t ISPTarget_WaitWhileTargetBusy(void)\r
-{\r
-       TCNT0 = 0;\r
-       TIFR0 = (1 << OCF1A);\r
-                       \r
-       uint8_t TimeoutMS = TARGET_BUSY_TIMEOUT_MS;\r
-       \r
-       do\r
-       {\r
-               SPI_SendByte(0xF0);\r
-               SPI_SendByte(0x00);\r
-\r
-               SPI_SendByte(0x00);\r
-\r
-               if (TIFR0 & (1 << OCF1A))\r
-               {\r
-                       TIFR0 = (1 << OCF1A);\r
-                       TimeoutMS--;\r
-               }\r
-       }\r
-       while ((SPI_ReceiveByte() & 0x01) && TimeoutMS);\r
-\r
-       if (!(TimeoutMS))\r
-         return STATUS_RDY_BSY_TOUT;\r
-       else\r
-         return STATUS_CMD_OK;\r
-}\r
-\r
-/** Sends a low-level LOAD EXTENDED ADDRESS command to the target, for addressing of memory beyond the\r
- *  64KB boundary. This sends the command with the correct address as indicated by the current address\r
- *  pointer variable set by the host when a SET ADDRESS command is issued.\r
- */\r
-void ISPTarget_LoadExtendedAddress(void)\r
-{\r
-       SPI_SendByte(0x4D);\r
-       SPI_SendByte(0x00);\r
-       SPI_SendByte((CurrentAddress & 0x00FF0000) >> 16);\r
-       SPI_SendByte(0x00);     \r
-}\r
-\r
-#endif\r
diff --git a/Projects/AVRISP/Lib/ISPTarget.h b/Projects/AVRISP/Lib/ISPTarget.h
deleted file mode 100644 (file)
index 62d8bbb..0000000
+++ /dev/null
@@ -1,76 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  Header file for ISPTarget.c.\r
- */\r
-\r
-#ifndef _ISP_TARGET_\r
-#define _ISP_TARGET_\r
-\r
-       /* Includes: */\r
-               #include <avr/io.h>\r
-               #include <util/delay.h>\r
-\r
-               #include <LUFA/Drivers/USB/USB.h>\r
-               #include <LUFA/Drivers/Peripheral/SPI.h>\r
-               \r
-               #include "../Descriptors.h"\r
-               #include "V2ProtocolConstants.h"\r
-               #include "V2ProtocolParams.h"\r
-\r
-       /* Preprocessor Checks: */\r
-               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
-                       #undef ENABLE_ISP_PROTOCOL\r
-                       #undef ENABLE_TPI_PROTOCOL\r
-                       \r
-                       #if !defined(ENABLE_PDI_PROTOCOL)\r
-                               #define ENABLE_PDI_PROTOCOL\r
-                       #endif\r
-               #endif\r
-\r
-       /* Macros: */\r
-               /** Total number of allowable ISP programming speeds supported by the device */\r
-               #define TOTAL_ISP_PROGRAMMING_SPEEDS  7\r
-\r
-               /** Timeout in milliseconds of target busy-wait loops waiting for a command to complete */\r
-               #define TARGET_BUSY_TIMEOUT_MS        100\r
-\r
-       /* Function Prototypes: */\r
-               uint8_t ISPTarget_GetSPIPrescalerMask(void);\r
-               void    ISPTarget_ChangeTargetResetLine(const bool ResetTarget);\r
-               uint8_t ISPTarget_WaitForProgComplete(const uint8_t ProgrammingMode, const uint16_t PollAddress,\r
-                                                     const uint8_t PollValue, const uint8_t DelayMS,\r
-                                                     const uint8_t ReadMemCommand);\r
-               uint8_t ISPTarget_WaitWhileTargetBusy(void);\r
-               void    ISPTarget_LoadExtendedAddress(void);\r
-\r
-#endif\r
diff --git a/Projects/AVRISP/Lib/PDI/PDIProtocol.c b/Projects/AVRISP/Lib/PDI/PDIProtocol.c
new file mode 100644 (file)
index 0000000..16ac209
--- /dev/null
@@ -0,0 +1,376 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  PDI Protocol handler, to process V2 Protocol wrapped PDI commands used in Atmel programmer devices.\r
+ */\r
+\r
+#define  INCLUDE_FROM_PDIPROTOCOL_C\r
+#include "PDIProtocol.h"\r
+\r
+#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)\r
+/** Base absolute address for the target's NVM controller */\r
+uint32_t XPROG_Param_NVMBase = 0x010001C0;\r
+\r
+/** Size in bytes of the target's EEPROM page */\r
+uint32_t XPROG_Param_EEPageSize;\r
+\r
+/** Handler for the CMD_XPROG_SETMODE command, which sets the programmer-to-target protocol used for PDI\r
+ *  XMEGA programming (either PDI or JTAG). Only PDI programming is supported.\r
+ */\r
+void PDIProtocol_XPROG_SetMode(void)\r
+{\r
+       struct\r
+       {\r
+               uint8_t Protocol;\r
+       } SetMode_XPROG_Params;\r
+       \r
+       Endpoint_Read_Stream_LE(&SetMode_XPROG_Params, sizeof(SetMode_XPROG_Params));\r
+\r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+       \r
+       Endpoint_Write_Byte(CMD_XPROG_SETMODE);\r
+       Endpoint_Write_Byte((SetMode_XPROG_Params.Protocol == XPRG_PROTOCOL_PDI) ? STATUS_CMD_OK : STATUS_CMD_FAILED);\r
+       Endpoint_ClearIN();     \r
+}\r
+\r
+/** Handler for the CMD_XPROG command, which wraps up XPROG commands in a V2 wrapper which need to be\r
+ *  removed and processed so that the underlying XPROG command can be handled.\r
+ */\r
+void PDIProtocol_XPROG_Command(void)\r
+{\r
+       uint8_t XPROGCommand = Endpoint_Read_Byte();\r
+\r
+       switch (XPROGCommand)\r
+       {\r
+               case XPRG_CMD_ENTER_PROGMODE:\r
+                       PDIProtocol_EnterXPROGMode();\r
+                       break;\r
+               case XPRG_CMD_LEAVE_PROGMODE:\r
+                       PDIProtocol_LeaveXPROGMode();\r
+                       break;\r
+               case XPRG_CMD_ERASE:\r
+                       PDIProtocol_Erase();\r
+                       break;\r
+               case XPRG_CMD_WRITE_MEM:\r
+                       PDIProtocol_WriteMemory();\r
+                       break;\r
+               case XPRG_CMD_READ_MEM:\r
+                       PDIProtocol_ReadMemory();\r
+                       break;\r
+               case XPRG_CMD_CRC:\r
+                       PDIProtocol_ReadCRC();\r
+                       break;\r
+               case XPRG_CMD_SET_PARAM:\r
+                       PDIProtocol_SetParam();\r
+                       break;\r
+       }\r
+}\r
+\r
+/** Handler for the XPROG ENTER_PROGMODE command to establish a PDI connection with the attached device. */\r
+static void PDIProtocol_EnterXPROGMode(void)\r
+{\r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+       \r
+       /* Enable PDI programming mode with the attached target */\r
+       PDITarget_EnableTargetPDI();\r
+       \r
+       /* Store the RESET key into the RESET PDI register to keep the XMEGA in reset */\r
+       PDITarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);       \r
+       PDITarget_SendByte(PDI_RESET_KEY);\r
+\r
+       /* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */\r
+       PDITarget_SendByte(PDI_CMD_KEY);        \r
+       for (uint8_t i = sizeof(PDI_NVMENABLE_KEY); i > 0; i--)\r
+         PDITarget_SendByte(PDI_NVMENABLE_KEY[i - 1]);\r
+\r
+       /* Wait until the NVM bus becomes active */\r
+       bool NVMBusEnabled = PDITarget_WaitWhileNVMBusBusy();\r
+       \r
+       Endpoint_Write_Byte(CMD_XPROG);\r
+       Endpoint_Write_Byte(XPRG_CMD_ENTER_PROGMODE);\r
+       Endpoint_Write_Byte(NVMBusEnabled ? XPRG_ERR_OK : XPRG_ERR_FAILED);\r
+       Endpoint_ClearIN();\r
+}\r
+\r
+/** Handler for the XPROG LEAVE_PROGMODE command to terminate the PDI programming connection with\r
+ *  the attached device.\r
+ */\r
+static void PDIProtocol_LeaveXPROGMode(void)\r
+{\r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+       \r
+       /* Clear the RESET key in the RESET PDI register to allow the XMEGA to run */\r
+       PDITarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);       \r
+       PDITarget_SendByte(0x00);\r
+\r
+       PDITarget_DisableTargetPDI();\r
+\r
+       Endpoint_Write_Byte(CMD_XPROG);\r
+       Endpoint_Write_Byte(XPRG_CMD_LEAVE_PROGMODE);\r
+       Endpoint_Write_Byte(XPRG_ERR_OK);\r
+       Endpoint_ClearIN();\r
+}\r
+\r
+/** Handler for the XPRG ERASE command to erase a specific memory address space in the attached device. */\r
+static void PDIProtocol_Erase(void)\r
+{\r
+       uint8_t ReturnStatus = XPRG_ERR_OK;\r
+\r
+       struct\r
+       {\r
+               uint8_t  MemoryType;\r
+               uint32_t Address;\r
+       } Erase_XPROG_Params;\r
+\r
+       Endpoint_Read_Stream_LE(&Erase_XPROG_Params, sizeof(Erase_XPROG_Params));\r
+       Erase_XPROG_Params.Address = SwapEndian_32(Erase_XPROG_Params.Address);\r
+\r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+       \r
+       uint8_t EraseCommand = XMEGA_NVM_CMD_NOOP;\r
+       \r
+       /* Determine which NVM command to send to the device depending on the memory to erase */\r
+       if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_CHIP)\r
+         EraseCommand = XMEGA_NVM_CMD_CHIPERASE;\r
+       else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_APP)\r
+         EraseCommand = XMEGA_NVM_CMD_ERASEAPPSEC;\r
+       else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_BOOT)\r
+         EraseCommand = XMEGA_NVM_CMD_ERASEBOOTSEC;\r
+       else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_EEPROM)\r
+         EraseCommand = XMEGA_NVM_CMD_ERASEEEPROM;\r
+       else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_APP_PAGE)\r
+         EraseCommand = XMEGA_NVM_CMD_ERASEAPPSECPAGE;\r
+       else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_BOOT_PAGE)\r
+         EraseCommand = XMEGA_NVM_CMD_ERASEBOOTSECPAGE;\r
+       else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_EEPROM_PAGE)\r
+         EraseCommand = XMEGA_NVM_CMD_ERASEEEPROMPAGE;\r
+       else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_USERSIG)\r
+         EraseCommand = XMEGA_NVM_CMD_ERASEUSERSIG;\r
+       \r
+       /* Erase the target memory, indicate timeout if ocurred */\r
+       if (!(XMEGANVM_EraseMemory(EraseCommand, Erase_XPROG_Params.Address)))\r
+         ReturnStatus = XPRG_ERR_TIMEOUT;\r
+       \r
+       Endpoint_Write_Byte(CMD_XPROG);\r
+       Endpoint_Write_Byte(XPRG_CMD_ERASE);\r
+       Endpoint_Write_Byte(ReturnStatus);\r
+       Endpoint_ClearIN();     \r
+}\r
+\r
+/** Handler for the XPROG WRITE_MEMORY command to write to a specific memory space within the attached device. */\r
+static void PDIProtocol_WriteMemory(void)\r
+{\r
+       uint8_t ReturnStatus = XPRG_ERR_OK;\r
+\r
+       struct\r
+       {\r
+               uint8_t  MemoryType;\r
+               uint8_t  PageMode;\r
+               uint32_t Address;\r
+               uint16_t Length;\r
+               uint8_t  ProgData[256];\r
+       } WriteMemory_XPROG_Params;\r
+       \r
+       Endpoint_Read_Stream_LE(&WriteMemory_XPROG_Params, (sizeof(WriteMemory_XPROG_Params) -\r
+                                                           sizeof(WriteMemory_XPROG_Params).ProgData));\r
+       WriteMemory_XPROG_Params.Address = SwapEndian_32(WriteMemory_XPROG_Params.Address);\r
+       WriteMemory_XPROG_Params.Length  = SwapEndian_16(WriteMemory_XPROG_Params.Length);\r
+       Endpoint_Read_Stream_LE(&WriteMemory_XPROG_Params.ProgData, WriteMemory_XPROG_Params.Length);\r
+\r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+\r
+       /* Assume FLASH page programming by default, as it is the common case */\r
+       uint8_t WriteCommand     = XMEGA_NVM_CMD_WRITEFLASHPAGE;\r
+       uint8_t WriteBuffCommand = XMEGA_NVM_CMD_LOADFLASHPAGEBUFF;\r
+       uint8_t EraseBuffCommand = XMEGA_NVM_CMD_ERASEFLASHPAGEBUFF;\r
+       bool    PagedMemory      = true;\r
+       \r
+       if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_APPL)\r
+       {\r
+               WriteCommand     = XMEGA_NVM_CMD_WRITEAPPSECPAGE;\r
+       }\r
+       else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_BOOT)\r
+       {\r
+               WriteCommand     = XMEGA_NVM_CMD_WRITEBOOTSECPAGE;\r
+       }\r
+       else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_EEPROM)\r
+       {\r
+               WriteCommand     = XMEGA_NVM_CMD_WRITEEEPROMPAGE;\r
+               WriteBuffCommand = XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF;\r
+               EraseBuffCommand = XMEGA_NVM_CMD_ERASEEEPROMPAGEBUFF;\r
+       }\r
+       else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_USERSIG)\r
+       {\r
+               /* User signature is paged, but needs us to manually indicate the mode bits since the host doesn't set them */\r
+               WriteMemory_XPROG_Params.PageMode = (XPRG_PAGEMODE_ERASE | XPRG_PAGEMODE_WRITE);\r
+               WriteCommand     = XMEGA_NVM_CMD_WRITEUSERSIG;\r
+       }\r
+       else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_FUSE)\r
+       {\r
+               WriteCommand     = XMEGA_NVM_CMD_WRITEFUSE;\r
+               PagedMemory      = false;\r
+       }\r
+       else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_LOCKBITS)\r
+       {\r
+               WriteCommand     = XMEGA_NVM_CMD_WRITELOCK;\r
+               PagedMemory      = false;\r
+       }\r
+       \r
+       /* Send the appropriate memory write commands to the device, indicate timeout if occurred */\r
+       if ((PagedMemory && !XMEGANVM_WritePageMemory(WriteBuffCommand, EraseBuffCommand, WriteCommand, \r
+                                                          WriteMemory_XPROG_Params.PageMode, WriteMemory_XPROG_Params.Address,\r
+                                                          WriteMemory_XPROG_Params.ProgData, WriteMemory_XPROG_Params.Length)) ||\r
+          (!PagedMemory && !XMEGANVM_WriteByteMemory(WriteCommand, WriteMemory_XPROG_Params.Address,\r
+                                                      WriteMemory_XPROG_Params.ProgData)))\r
+       {\r
+               ReturnStatus = XPRG_ERR_TIMEOUT;\r
+       }\r
+       \r
+       Endpoint_Write_Byte(CMD_XPROG);\r
+       Endpoint_Write_Byte(XPRG_CMD_WRITE_MEM);\r
+       Endpoint_Write_Byte(ReturnStatus);      \r
+       Endpoint_ClearIN();\r
+}\r
+\r
+/** Handler for the XPROG READ_MEMORY command to read data from a specific address space within the\r
+ *  attached device.\r
+ */\r
+static void PDIProtocol_ReadMemory(void)\r
+{\r
+       uint8_t ReturnStatus = XPRG_ERR_OK;\r
+\r
+       struct\r
+       {\r
+               uint8_t  MemoryType;\r
+               uint32_t Address;\r
+               uint16_t Length;\r
+       } ReadMemory_XPROG_Params;\r
+       \r
+       Endpoint_Read_Stream_LE(&ReadMemory_XPROG_Params, sizeof(ReadMemory_XPROG_Params));\r
+       ReadMemory_XPROG_Params.Address = SwapEndian_32(ReadMemory_XPROG_Params.Address);\r
+       ReadMemory_XPROG_Params.Length  = SwapEndian_16(ReadMemory_XPROG_Params.Length);\r
+\r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+\r
+       uint8_t ReadBuffer[256];\r
+       \r
+       /* Read the target's memory, indicate timeout if occurred */\r
+       if (!(XMEGANVM_ReadMemory(ReadMemory_XPROG_Params.Address, ReadBuffer, ReadMemory_XPROG_Params.Length)))\r
+         ReturnStatus = XPRG_ERR_TIMEOUT;\r
+\r
+       Endpoint_Write_Byte(CMD_XPROG);\r
+       Endpoint_Write_Byte(XPRG_CMD_READ_MEM);\r
+       Endpoint_Write_Byte(ReturnStatus);\r
+       \r
+       if (ReturnStatus == XPRG_ERR_OK)\r
+         Endpoint_Write_Stream_LE(ReadBuffer, ReadMemory_XPROG_Params.Length);\r
+       \r
+       Endpoint_ClearIN();\r
+}\r
+\r
+/** Handler for the XPROG CRC command to read a specific memory space's CRC value for comparison between the\r
+ *  attached device's memory and a data set on the host.\r
+ */\r
+static void PDIProtocol_ReadCRC(void)\r
+{\r
+       uint8_t ReturnStatus = XPRG_ERR_OK;\r
+       \r
+       struct\r
+       {\r
+               uint8_t CRCType;\r
+       } ReadCRC_XPROG_Params;\r
+       \r
+       Endpoint_Read_Stream_LE(&ReadCRC_XPROG_Params, sizeof(ReadCRC_XPROG_Params));\r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+       \r
+       uint8_t  CRCCommand = XMEGA_NVM_CMD_NOOP;\r
+       uint32_t MemoryCRC;\r
+\r
+       /* Determine which NVM command to send to the device depending on the memory to CRC */\r
+       if (ReadCRC_XPROG_Params.CRCType == XPRG_CRC_APP)\r
+         CRCCommand = XMEGA_NVM_CMD_APPCRC;\r
+       else if (ReadCRC_XPROG_Params.CRCType == XPRG_CRC_BOOT)\r
+         CRCCommand = XMEGA_NVM_CMD_BOOTCRC;\r
+       else\r
+         CRCCommand = XMEGA_NVM_CMD_FLASHCRC;\r
+       \r
+       /* Perform and retrieve the memory CRC, indicate timeout if occurred */\r
+       if (!(XMEGANVM_GetMemoryCRC(CRCCommand, &MemoryCRC)))\r
+         ReturnStatus = XPRG_ERR_TIMEOUT;\r
+       \r
+       Endpoint_Write_Byte(CMD_XPROG);\r
+       Endpoint_Write_Byte(XPRG_CMD_CRC);\r
+       Endpoint_Write_Byte(ReturnStatus);\r
+       \r
+       if (ReturnStatus == XPRG_ERR_OK)\r
+       {\r
+               Endpoint_Write_Byte(MemoryCRC >> 16);\r
+               Endpoint_Write_Word_LE(MemoryCRC & 0xFFFF);             \r
+       }\r
+       \r
+       Endpoint_ClearIN();     \r
+}\r
+\r
+/** Handler for the XPROG SET_PARAM command to set a PDI parameter for use when communicating with the\r
+ *  attached device.\r
+ */\r
+static void PDIProtocol_SetParam(void)\r
+{\r
+       uint8_t ReturnStatus = XPRG_ERR_OK;\r
+\r
+       uint8_t XPROGParam = Endpoint_Read_Byte();\r
+       \r
+       /* Determine which parameter is being set, store the new parameter value */\r
+       if (XPROGParam == XPRG_PARAM_NVMBASE)\r
+         XPROG_Param_NVMBase = Endpoint_Read_DWord_BE();\r
+       else if (XPROGParam == XPRG_PARAM_EEPPAGESIZE)\r
+         XPROG_Param_EEPageSize = Endpoint_Read_Word_BE();\r
+       else\r
+         ReturnStatus = XPRG_ERR_FAILED;\r
+       \r
+       Endpoint_ClearOUT();\r
+       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+                 \r
+       Endpoint_Write_Byte(CMD_XPROG);\r
+       Endpoint_Write_Byte(XPRG_CMD_SET_PARAM);\r
+       Endpoint_Write_Byte(ReturnStatus);\r
+       Endpoint_ClearIN();\r
+}\r
+\r
+#endif\r
diff --git a/Projects/AVRISP/Lib/PDI/PDIProtocol.h b/Projects/AVRISP/Lib/PDI/PDIProtocol.h
new file mode 100644 (file)
index 0000000..c1fbef4
--- /dev/null
@@ -0,0 +1,122 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Header file for PDIProtocol.c.\r
+ */\r
+\r
+#ifndef _PDI_PROTOCOL_\r
+#define _PDI_PROTOCOL_\r
+\r
+       /* Includes: */\r
+               #include <avr/io.h>\r
+               #include <util/delay.h>\r
+               #include <stdio.h>\r
+       \r
+               #include "V2Protocol.h"\r
+               #include "PDITarget.h"\r
+               #include "XMEGANVM.h"\r
+\r
+       /* Preprocessor Checks: */\r
+               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
+                       #undef ENABLE_ISP_PROTOCOL\r
+                       #undef ENABLE_TPI_PROTOCOL\r
+                       \r
+                       #if !defined(ENABLE_PDI_PROTOCOL)\r
+                               #define ENABLE_PDI_PROTOCOL\r
+                       #endif\r
+               #endif\r
+       \r
+       /* Macros: */\r
+               #define XPRG_CMD_ENTER_PROGMODE             0x01\r
+               #define XPRG_CMD_LEAVE_PROGMODE             0x02\r
+               #define XPRG_CMD_ERASE                      0x03\r
+               #define XPRG_CMD_WRITE_MEM                  0x04\r
+               #define XPRG_CMD_READ_MEM                   0x05\r
+               #define XPRG_CMD_CRC                        0x06\r
+               #define XPRG_CMD_SET_PARAM                  0x07\r
+\r
+               #define XPRG_MEM_TYPE_APPL                  1\r
+               #define XPRG_MEM_TYPE_BOOT                  2\r
+               #define XPRG_MEM_TYPE_EEPROM                3\r
+               #define XPRG_MEM_TYPE_FUSE                  4\r
+               #define XPRG_MEM_TYPE_LOCKBITS              5\r
+               #define XPRG_MEM_TYPE_USERSIG               6\r
+               #define XPRG_MEM_TYPE_FACTORY_CALIBRATION   7\r
+\r
+               #define XPRG_ERASE_CHIP                     1\r
+               #define XPRG_ERASE_APP                      2\r
+               #define XPRG_ERASE_BOOT                     3\r
+               #define XPRG_ERASE_EEPROM                   4\r
+               #define XPRG_ERASE_APP_PAGE                 5\r
+               #define XPRG_ERASE_BOOT_PAGE                6\r
+               #define XPRG_ERASE_EEPROM_PAGE              7\r
+               #define XPRG_ERASE_USERSIG                  8\r
+\r
+               #define XPRG_MEM_WRITE_ERASE                0\r
+               #define XPRG_MEM_WRITE_WRITE                1\r
+\r
+               #define XPRG_CRC_APP                        1\r
+               #define XPRG_CRC_BOOT                       2\r
+               #define XPRG_CRC_FLASH                      3\r
+\r
+               #define XPRG_ERR_OK                         0\r
+               #define XPRG_ERR_FAILED                     1\r
+               #define XPRG_ERR_COLLISION                  2\r
+               #define XPRG_ERR_TIMEOUT                    3\r
+\r
+               #define XPRG_PARAM_NVMBASE                  0x01\r
+               #define XPRG_PARAM_EEPPAGESIZE              0x02\r
+               \r
+               #define XPRG_PROTOCOL_PDI                   0x00\r
+               #define XPRG_PROTOCOL_JTAG                  0x01\r
+               \r
+               #define XPRG_PAGEMODE_WRITE                 (1 << 1)\r
+               #define XPRG_PAGEMODE_ERASE                 (1 << 0)\r
+       \r
+       /* External Variables: */\r
+               extern uint32_t XPROG_Param_NVMBase;\r
+               \r
+       /* Function Prototypes: */\r
+               void PDIProtocol_XPROG_SetMode(void);\r
+               void PDIProtocol_XPROG_Command(void);\r
+               \r
+               #if defined(INCLUDE_FROM_PDIPROTOCOL_C)\r
+                       static void PDIProtocol_EnterXPROGMode(void);\r
+                       static void PDIProtocol_LeaveXPROGMode(void);\r
+                       static void PDIProtocol_SetParam(void);\r
+                       static void PDIProtocol_Erase(void);\r
+                       static void PDIProtocol_WriteMemory(void);\r
+                       static void PDIProtocol_ReadMemory(void);\r
+                       static void PDIProtocol_ReadCRC(void);\r
+               #endif\r
+               \r
+#endif\r
diff --git a/Projects/AVRISP/Lib/PDI/PDITarget.c b/Projects/AVRISP/Lib/PDI/PDITarget.c
new file mode 100644 (file)
index 0000000..2c6ffd9
--- /dev/null
@@ -0,0 +1,335 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Target-related functions for the PDI Protocol decoder.\r
+ */\r
+\r
+#define  INCLUDE_FROM_PDITARGET_C\r
+#include "PDITarget.h"\r
+\r
+#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)\r
+\r
+/** Flag to indicate if the USART is currently in Tx or Rx mode. */\r
+volatile bool               IsSending;\r
+\r
+#if !defined(PDI_VIA_HARDWARE_USART)\r
+/** Software USART raw frame bits for transmission/reception. */\r
+volatile uint16_t           SoftUSART_Data;\r
+\r
+/** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */\r
+#define SoftUSART_BitCount  GPIOR2\r
+\r
+\r
+/** ISR to manage the software USART when bit-banged USART mode is selected. */\r
+ISR(TIMER1_COMPA_vect, ISR_BLOCK)\r
+{\r
+       /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
+       BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;\r
+\r
+       /* If not sending or receiving, just exit */\r
+       if (!(SoftUSART_BitCount))\r
+         return;\r
+\r
+       /* Check to see if we are at a rising or falling edge of the clock */\r
+       if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)\r
+       {\r
+               /* If at rising clock edge and we are in send mode, abort */\r
+               if (IsSending)\r
+                 return;\r
+                 \r
+               /* Wait for the start bit when receiving */\r
+               if ((SoftUSART_BitCount == BITS_IN_PDI_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r
+                 return;\r
+       \r
+               /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
+                * be discarded leaving the data to be byte-aligned for quick access */\r
+               if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
+                 SoftUSART_Data |= (1 << (BITS_IN_PDI_FRAME - 1));\r
+\r
+               SoftUSART_Data >>= 1;\r
+               SoftUSART_BitCount--;\r
+       }\r
+       else\r
+       {\r
+               /* If at falling clock edge and we are in receive mode, abort */\r
+               if (!IsSending)\r
+                 return;\r
+\r
+               /* Set the data line to the next bit value */\r
+               if (SoftUSART_Data & 0x01)\r
+                 BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;\r
+               else\r
+                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;                  \r
+\r
+               SoftUSART_Data >>= 1;\r
+               SoftUSART_BitCount--;\r
+       }\r
+}\r
+#endif\r
+\r
+/** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */\r
+void PDITarget_EnableTargetPDI(void)\r
+{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
+       /* Set Tx and XCK as outputs, Rx as input */\r
+       DDRD |=  (1 << 5) | (1 << 3);\r
+       DDRD &= ~(1 << 2);\r
+       \r
+       /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
+       PORTD |= (1 << 3);\r
+       asm volatile ("NOP"::);\r
+       asm volatile ("NOP"::);\r
+       \r
+       /* Set up the synchronous USART for XMEGA communications - \r
+          8 data bits, even parity, 2 stop bits */\r
+       UBRR1  = (F_CPU / 1000000UL);\r
+       UCSR1B = (1 << TXEN1);\r
+       UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
+\r
+       /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */\r
+       PDITarget_SendBreak();\r
+       PDITarget_SendBreak();\r
+#else\r
+       /* Set DATA and CLOCK lines to outputs */\r
+       BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;\r
+       BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;\r
+       \r
+       /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
+       BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+       asm volatile ("NOP"::);\r
+       asm volatile ("NOP"::);\r
+\r
+       /* Fire timer compare ISR every 100 cycles to manage the software USART */\r
+       OCR1A   = 80;\r
+       TCCR1B  = (1 << WGM12) | (1 << CS10);\r
+       TIMSK1  = (1 << OCIE1A);\r
+       \r
+       /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
+       PDITarget_SendBreak();\r
+       PDITarget_SendBreak();\r
+#endif\r
+}\r
+\r
+/** Disables the target's PDI interface, exits programming mode and starts the target's application. */\r
+void PDITarget_DisableTargetPDI(void)\r
+{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
+       /* Turn off receiver and transmitter of the USART, clear settings */\r
+       UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
+       UCSR1B  = 0;\r
+       UCSR1C  = 0;\r
+\r
+       /* Set all USART lines as input, tristate */\r
+       DDRD  &= ~((1 << 5) | (1 << 3));\r
+       PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
+#else\r
+       /* Set DATA and CLOCK lines to inputs */\r
+       BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;\r
+       BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;\r
+       \r
+       /* Tristate DATA and CLOCK lines */\r
+       BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;\r
+       BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;\r
+#endif\r
+}\r
+\r
+/** Sends a byte via the USART.\r
+ *\r
+ *  \param[in] Byte  Byte to send through the USART\r
+ */\r
+void PDITarget_SendByte(const uint8_t Byte)\r
+{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
+       /* Switch to Tx mode if currently in Rx mode */\r
+       if (!(IsSending))\r
+       {\r
+               PORTD  |=  (1 << 3);\r
+               DDRD   |=  (1 << 3);\r
+\r
+               UCSR1B |=  (1 << TXEN1);\r
+               UCSR1B &= ~(1 << RXEN1);\r
+               \r
+               IsSending = true;\r
+       }\r
+       \r
+       /* Wait until there is space in the hardware Tx buffer before writing */\r
+       while (!(UCSR1A & (1 << UDRE1)));\r
+       UCSR1A |= (1 << TXC1);\r
+       UDR1    = Byte;\r
+#else\r
+       /* Switch to Tx mode if currently in Rx mode */\r
+       if (!(IsSending))\r
+       {\r
+               BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+               BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;\r
+\r
+               IsSending = true;\r
+       }\r
+\r
+       /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */\r
+       uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));\r
+\r
+       /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */\r
+       uint8_t ParityData    = Byte;\r
+       while (ParityData)\r
+       {\r
+               NewUSARTData ^= (1 << 9);\r
+               ParityData   &= (ParityData - 1);\r
+       }\r
+\r
+       /* Wait until transmitter is idle before writing new data */\r
+       while (SoftUSART_BitCount);\r
+\r
+       /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
+       SoftUSART_Data     = NewUSARTData;\r
+       SoftUSART_BitCount = BITS_IN_PDI_FRAME;\r
+#endif\r
+}\r
+\r
+/** Receives a byte via the software USART, blocking until data is received.\r
+ *\r
+ *  \return Received byte from the USART\r
+ */\r
+uint8_t PDITarget_ReceiveByte(void)\r
+{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
+       /* Switch to Rx mode if currently in Tx mode */\r
+       if (IsSending)\r
+       {\r
+               while (!(UCSR1A & (1 << TXC1)));\r
+               UCSR1A |=  (1 << TXC1);\r
+\r
+               UCSR1B &= ~(1 << TXEN1);\r
+               UCSR1B |=  (1 << RXEN1);\r
+\r
+               DDRD   &= ~(1 << 3);\r
+               PORTD  &= ~(1 << 3);\r
+               \r
+               IsSending = false;\r
+       }\r
+\r
+       /* Wait until a byte has been received before reading */\r
+       while (!(UCSR1A & (1 << RXC1)));\r
+       return UDR1;\r
+#else\r
+       /* Switch to Rx mode if currently in Tx mode */\r
+       if (IsSending)\r
+       {\r
+               while (SoftUSART_BitCount);\r
+\r
+               BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;\r
+               BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
+\r
+               IsSending = false;\r
+       }\r
+\r
+       /* Wait until a byte has been received before reading */\r
+       SoftUSART_BitCount = BITS_IN_PDI_FRAME;\r
+       while (SoftUSART_BitCount);\r
+       \r
+       /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */\r
+       return (uint8_t)SoftUSART_Data;\r
+#endif\r
+}\r
+\r
+/** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */\r
+void PDITarget_SendBreak(void)\r
+{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
+       /* Switch to Tx mode if currently in Rx mode */\r
+       if (!(IsSending))\r
+       {\r
+               PORTD  |=  (1 << 3);\r
+               DDRD   |=  (1 << 3);\r
+\r
+               UCSR1B &= ~(1 << RXEN1);\r
+               UCSR1B |=  (1 << TXEN1);\r
+               \r
+               IsSending = true;\r
+       }\r
+\r
+       /* Need to do nothing for a full frame to send a BREAK */\r
+       for (uint8_t i = 0; i < BITS_IN_PDI_FRAME; i++)\r
+       {\r
+               /* Wait for a full cycle of the clock */\r
+               while (PIND & (1 << 5));\r
+               while (!(PIND & (1 << 5)));\r
+       }\r
+#else\r
+       /* Switch to Tx mode if currently in Rx mode */\r
+       if (!(IsSending))\r
+       {\r
+               BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+               BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;\r
+\r
+               IsSending = true;\r
+       }\r
+       \r
+       while (SoftUSART_BitCount);\r
+\r
+       /* Need to do nothing for a full frame to send a BREAK */\r
+       SoftUSART_Data     = 0x0FFF;\r
+       SoftUSART_BitCount = BITS_IN_PDI_FRAME;\r
+#endif\r
+}\r
+\r
+/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC\r
+ *  calculation.\r
+ *\r
+ *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
+ */\r
+bool PDITarget_WaitWhileNVMBusBusy(void)\r
+{\r
+       TCNT0 = 0;\r
+       TIFR0 = (1 << OCF1A);\r
+                       \r
+       uint8_t TimeoutMS = PDI_NVM_TIMEOUT_MS;\r
+       \r
+       /* Poll the STATUS register to check to see if NVM access has been enabled */\r
+       while (TimeoutMS)\r
+       {\r
+               /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */\r
+               PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);\r
+               if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)\r
+                 return true;\r
+\r
+               if (TIFR0 & (1 << OCF1A))\r
+               {\r
+                       TIFR0 = (1 << OCF1A);\r
+                       TimeoutMS--;\r
+               }\r
+       }\r
+       \r
+       return false;\r
+}\r
+\r
+#endif\r
diff --git a/Projects/AVRISP/Lib/PDI/PDITarget.h b/Projects/AVRISP/Lib/PDI/PDITarget.h
new file mode 100644 (file)
index 0000000..cf7780c
--- /dev/null
@@ -0,0 +1,112 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Header file for PDITarget.c.\r
+ */\r
+\r
+#ifndef _PDI_TARGET_\r
+#define _PDI_TARGET_\r
+\r
+       /* Includes: */\r
+               #include <avr/io.h>\r
+               #include <avr/interrupt.h>\r
+               #include <stdbool.h>\r
+               \r
+               #include <LUFA/Common/Common.h>\r
+       \r
+       /* Preprocessor Checks: */\r
+               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
+                       #undef ENABLE_ISP_PROTOCOL\r
+                       #undef ENABLE_TPI_PROTOCOL\r
+                       \r
+                       #if !defined(ENABLE_PDI_PROTOCOL)\r
+                               #define ENABLE_PDI_PROTOCOL\r
+                       #endif\r
+               #endif\r
+\r
+       /* Defines: */\r
+               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
+                       #define PDI_VIA_HARDWARE_USART\r
+               #else\r
+                       #define BITBANG_PDIDATA_PORT     PORTB\r
+                       #define BITBANG_PDIDATA_DDR      DDRB\r
+                       #define BITBANG_PDIDATA_PIN      PINB\r
+                       #define BITBANG_PDIDATA_MASK     (1 << 3)\r
+                       \r
+                       #define BITBANG_PDICLOCK_PORT    RESET_LINE_PORT\r
+                       #define BITBANG_PDICLOCK_DDR     RESET_LINE_DDR\r
+                       #define BITBANG_PDICLOCK_PIN     RESET_LINE_PIN\r
+                       #define BITBANG_PDICLOCK_MASK    RESET_LINE_MASK\r
+               #endif\r
+               \r
+               /** Total number of bits in a single USART frame */\r
+               #define BITS_IN_PDI_FRAME        12\r
+               \r
+               /** Timeout in milliseconds of a PDI busy-wait command */\r
+               #define PDI_NVM_TIMEOUT_MS       100\r
+               \r
+               #define PDI_CMD_LDS              0x00\r
+               #define PDI_CMD_LD               0x20\r
+               #define PDI_CMD_STS              0x40\r
+               #define PDI_CMD_ST               0x60\r
+               #define PDI_CMD_LDCS             0x80\r
+               #define PDI_CMD_REPEAT           0xA0\r
+               #define PDI_CMD_STCS             0xC0\r
+               #define PDI_CMD_KEY              0xE0\r
+               \r
+               #define PDI_STATUS_REG           0\r
+               #define PDI_RESET_REG            1\r
+               #define PDI_CTRL_REG             2\r
+               \r
+               #define PDI_STATUS_NVM           (1 << 1)\r
+               #define PDI_RESET_KEY            0x59\r
+\r
+               #define PDI_NVMENABLE_KEY        (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}\r
+\r
+               #define PDI_DATSIZE_1BYTE        0\r
+               #define PDI_DATSIZE_2BYTES       1\r
+               #define PDI_DATSIZE_3BYTES       2\r
+               #define PDI_DATSIZE_4BYTES       3\r
+               \r
+               #define PDI_POINTER_INDIRECT     0\r
+               #define PDI_POINTER_INDIRECT_PI  1\r
+               #define PDI_POINTER_DIRECT       2\r
+                               \r
+       /* Function Prototypes: */\r
+               void    PDITarget_EnableTargetPDI(void);\r
+               void    PDITarget_DisableTargetPDI(void);\r
+               void    PDITarget_SendByte(const uint8_t Byte);\r
+               uint8_t PDITarget_ReceiveByte(void);\r
+               void    PDITarget_SendBreak(void);\r
+               bool    PDITarget_WaitWhileNVMBusBusy(void);\r
+\r
+#endif\r
diff --git a/Projects/AVRISP/Lib/PDI/XMEGANVM.c b/Projects/AVRISP/Lib/PDI/XMEGANVM.c
new file mode 100644 (file)
index 0000000..ed8719c
--- /dev/null
@@ -0,0 +1,332 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Target-related functions for the XMEGA target's NVM module.\r
+ */\r
+\r
+#define  INCLUDE_FROM_XMEGA_NVM_C\r
+#include "XMEGANVM.h"\r
+\r
+#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)\r
+\r
+/** Sends the given NVM register address to the target.\r
+ *\r
+ *  \param[in] Register  NVM register whose absolute address is to be sent\r
+ */\r
+void XMEGANVM_SendNVMRegAddress(const uint8_t Register)\r
+{\r
+       /* Determine the absolute register address from the NVM base memory address and the NVM register address */\r
+       uint32_t Address = XPROG_Param_NVMBase | Register;\r
+\r
+       /* Send the calculated 32-bit address to the target, LSB first */\r
+       XMEGANVM_SendAddress(Address);\r
+}\r
+\r
+/** Sends the given 32-bit absolute address to the target.\r
+ *\r
+ *  \param[in] AbsoluteAddress  Absolute address to send to the target\r
+ */\r
+void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)\r
+{\r
+       /* Send the given 32-bit address to the target, LSB first */\r
+       PDITarget_SendByte(AbsoluteAddress &  0xFF);\r
+       PDITarget_SendByte(AbsoluteAddress >> 8);\r
+       PDITarget_SendByte(AbsoluteAddress >> 16);\r
+       PDITarget_SendByte(AbsoluteAddress >> 24);\r
+}\r
+\r
+/** Waits while the target's NVM controller is busy performing an operation, exiting if the\r
+ *  timeout period expires.\r
+ *\r
+ *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
+ */\r
+bool XMEGANVM_WaitWhileNVMControllerBusy(void)\r
+{\r
+       TCNT0 = 0;\r
+       TIFR0 = (1 << OCF1A);\r
+                       \r
+       uint8_t TimeoutMS = XMEGA_NVM_BUSY_TIMEOUT_MS;\r
+       \r
+       /* Poll the NVM STATUS register while the NVM controller is busy */\r
+       while (TimeoutMS)\r
+       {\r
+               /* Send a LDS command to read the NVM STATUS register to check the BUSY flag */\r
+               PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
+               XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_STATUS);\r
+               \r
+               /* Check to see if the BUSY flag is still set */\r
+               if (!(PDITarget_ReceiveByte() & (1 << 7)))\r
+                 return true;\r
+\r
+               if (TIFR0 & (1 << OCF1A))\r
+               {\r
+                       TIFR0 = (1 << OCF1A);\r
+                       TimeoutMS--;\r
+               }\r
+       }\r
+       \r
+       return false;\r
+}\r
+\r
+/** Retrieves the CRC value of the given memory space.\r
+ *\r
+ *  \param[in]  CRCCommand  NVM CRC command to issue to the target\r
+ *  \param[out] CRCDest     CRC Destination when read from the target\r
+ *\r
+ *  \return Boolean true if the command sequence complete successfully\r
+ */\r
+bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)\r
+{\r
+       /* Wait until the NVM controller is no longer busy */\r
+       if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
+         return false;\r
+         \r
+       /* Set the NVM command to the correct CRC read command */\r
+       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
+       PDITarget_SendByte(CRCCommand);\r
+\r
+       /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */\r
+       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);\r
+       PDITarget_SendByte(1 << 0);\r
+\r
+       /* Wait until the NVM bus is ready again */\r
+       if (!(PDITarget_WaitWhileNVMBusBusy()))\r
+         return false;\r
+\r
+       /* Wait until the NVM controller is no longer busy */\r
+       if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
+         return false;\r
+       \r
+       *CRCDest = 0;\r
+       \r
+       /* Read the first generated CRC byte value */\r
+       PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
+       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0);\r
+       *CRCDest  = PDITarget_ReceiveByte();\r
+\r
+       /* Read the second generated CRC byte value */\r
+       PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
+       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT1);\r
+       *CRCDest |= ((uint16_t)PDITarget_ReceiveByte() << 8);\r
+\r
+       /* Read the third generated CRC byte value */\r
+       PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
+       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT2);\r
+       *CRCDest |= ((uint32_t)PDITarget_ReceiveByte() << 16);\r
+       \r
+       return true;\r
+}\r
+\r
+/** Reads memory from the target's memory spaces.\r
+ *\r
+ *  \param[in]  ReadAddress  Start address to read from within the target's address space\r
+ *  \param[out] ReadBuffer   Buffer to store read data into\r
+ *  \param[in]  ReadSize     Number of bytes to read\r
+ *\r
+ *  \return Boolean true if the command sequence complete successfully\r
+ */\r
+bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize)\r
+{\r
+       /* Wait until the NVM controller is no longer busy */\r
+       if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
+         return false;\r
+       \r
+       /* Send the READNVM command to the NVM controller for reading of an arbitrary location */\r
+       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
+       PDITarget_SendByte(XMEGA_NVM_CMD_READNVM);\r
+\r
+       /* Load the PDI pointer register with the start address we want to read from */\r
+       PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);\r
+       XMEGANVM_SendAddress(ReadAddress);\r
+\r
+       /* Send the REPEAT command with the specified number of bytes to read */\r
+       PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);\r
+       PDITarget_SendByte(ReadSize - 1);\r
+               \r
+       /* Send a LD command with indirect access and postincrement to read out the bytes */\r
+       PDITarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
+       for (uint16_t i = 0; i < ReadSize; i++)\r
+         *(ReadBuffer++) = PDITarget_ReceiveByte();\r
+       \r
+       return true;\r
+}\r
+\r
+/** Writes byte addressed memory to the target's memory spaces.\r
+ *\r
+ *  \param[in]  WriteCommand  Command to send to the device to write each memory byte\r
+ *  \param[in]  WriteAddress  Start address to write to within the target's address space\r
+ *  \param[in]  WriteBuffer   Buffer to source data from\r
+ *\r
+ *  \return Boolean true if the command sequence complete successfully\r
+ */\r
+bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer)\r
+{\r
+       /* Wait until the NVM controller is no longer busy */\r
+       if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
+         return false;\r
+\r
+       /* Send the memory write command to the target */\r
+       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
+       PDITarget_SendByte(WriteCommand);\r
+       \r
+       /* Send new memory byte to the memory to the target */\r
+       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+       XMEGANVM_SendAddress(WriteAddress);\r
+       PDITarget_SendByte(*(WriteBuffer++));\r
+       \r
+       return true;\r
+}\r
+\r
+/** Writes page addressed memory to the target's memory spaces.\r
+ *\r
+ *  \param[in]  WriteBuffCommand  Command to send to the device to write a byte to the memory page buffer\r
+ *  \param[in]  EraseBuffCommand  Command to send to the device to erase the memory page buffer\r
+ *  \param[in]  WritePageCommand  Command to send to the device to write the page buffer to the destination memory\r
+ *  \param[in]  PageMode          Bitfield indicating what operations need to be executed on the specified page\r
+ *  \param[in]  WriteAddress      Start address to write the page data to within the target's address space\r
+ *  \param[in]  WriteBuffer       Buffer to source data from\r
+ *  \param[in]  WriteSize         Number of bytes to write\r
+ *\r
+ *  \return Boolean true if the command sequence complete successfully\r
+ */\r
+bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,\r
+                               const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,\r
+                               const uint8_t* WriteBuffer, const uint16_t WriteSize)\r
+{\r
+       if (PageMode & XPRG_PAGEMODE_ERASE)\r
+       {\r
+               /* Wait until the NVM controller is no longer busy */\r
+               if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
+                 return false;\r
+\r
+               /* Send the memory buffer erase command to the target */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
+               PDITarget_SendByte(EraseBuffCommand);\r
+\r
+               /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);\r
+               PDITarget_SendByte(1 << 0);\r
+       }\r
+\r
+       if (WriteSize)\r
+       {\r
+               /* Wait until the NVM controller is no longer busy */\r
+               if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
+                 return false;\r
+\r
+               /* Send the memory buffer write command to the target */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
+               PDITarget_SendByte(WriteBuffCommand);\r
+\r
+               /* Load the PDI pointer register with the start address we want to write to */\r
+               PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);\r
+               XMEGANVM_SendAddress(WriteAddress);\r
+\r
+               /* Send the REPEAT command with the specified number of bytes to write */\r
+               PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);\r
+               PDITarget_SendByte(WriteSize - 1);\r
+                       \r
+               /* Send a ST command with indirect access and postincrement to write the bytes */\r
+               PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
+               for (uint16_t i = 0; i < WriteSize; i++)\r
+                 PDITarget_SendByte(*(WriteBuffer++));\r
+       }\r
+       \r
+       if (PageMode & XPRG_PAGEMODE_WRITE)\r
+       {\r
+               /* Wait until the NVM controller is no longer busy */\r
+               if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
+                 return false;\r
+\r
+               /* Send the memory write command to the target */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
+               PDITarget_SendByte(WritePageCommand);\r
+               \r
+               /* Send the address of the first page location to write the memory page */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               XMEGANVM_SendAddress(WriteAddress);\r
+               PDITarget_SendByte(0x00);\r
+       }\r
+\r
+       return true;\r
+}\r
+\r
+/** Erases a specific memory space of the target.\r
+ *\r
+ *  \param[in] EraseCommand  NVM erase command to send to the device\r
+ *  \param[in] Address  Address inside the memory space to erase\r
+ *\r
+ *  \return Boolean true if the command sequence complete successfully\r
+ */\r
+bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)\r
+{\r
+       /* Wait until the NVM controller is no longer busy */\r
+       if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
+         return false;\r
+         \r
+       /* Send the memory erase command to the target */\r
+       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
+       PDITarget_SendByte(EraseCommand);\r
+       \r
+       /* Chip erase is handled separately, since it's procedure is different to other erase types */\r
+       if (EraseCommand == XMEGA_NVM_CMD_CHIPERASE)\r
+       {\r
+               /* Set CMDEX bit in NVM CTRLA register to start the chip erase */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);\r
+               PDITarget_SendByte(1 << 0);             \r
+       }\r
+       else\r
+       {\r
+               /* Other erase modes just need us to address a byte within the target memory space */\r
+               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+               XMEGANVM_SendAddress(Address);  \r
+               PDITarget_SendByte(0x00);\r
+       }\r
+       \r
+       /* Wait until the NVM bus is ready again */\r
+       if (!(PDITarget_WaitWhileNVMBusBusy()))\r
+         return false;\r
+         \r
+       return true;\r
+}\r
+\r
+#endif\r
diff --git a/Projects/AVRISP/Lib/PDI/XMEGANVM.h b/Projects/AVRISP/Lib/PDI/XMEGANVM.h
new file mode 100644 (file)
index 0000000..c31c7e8
--- /dev/null
@@ -0,0 +1,121 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Header file for XMEGANVM.c.\r
+ */\r
+\r
+#ifndef _XMEGA_NVM__\r
+#define _XMEGA_NVM_\r
+\r
+       /* Includes: */\r
+               #include <avr/io.h>\r
+               #include <avr/interrupt.h>\r
+               #include <stdbool.h>\r
+               \r
+               #include <LUFA/Common/Common.h>\r
+               \r
+               #include "PDIProtocol.h"\r
+               #include "PDITarget.h"\r
+       \r
+       /* Preprocessor Checks: */\r
+               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
+                       #undef ENABLE_ISP_PROTOCOL\r
+                       #undef ENABLE_TPI_PROTOCOL\r
+                       \r
+                       #if !defined(ENABLE_PDI_PROTOCOL)\r
+                               #define ENABLE_PDI_PROTOCOL\r
+                       #endif\r
+               #endif\r
+\r
+       /* Defines: */\r
+               #define XMEGA_NVM_BUSY_TIMEOUT_MS            200\r
+               \r
+               #define XMEGA_NVM_REG_ADDR0                  0x00\r
+               #define XMEGA_NVM_REG_ADDR1                  0x01\r
+               #define XMEGA_NVM_REG_ADDR2                  0x02\r
+               #define XMEGA_NVM_REG_DAT0                   0x04\r
+               #define XMEGA_NVM_REG_DAT1                   0x05\r
+               #define XMEGA_NVM_REG_DAT2                   0x06\r
+               #define XMEGA_NVM_REG_CMD                    0x0A\r
+               #define XMEGA_NVM_REG_CTRLA                  0x0B\r
+               #define XMEGA_NVM_REG_CTRLB                  0x0C\r
+               #define XMEGA_NVM_REG_INTCTRL                0x0D\r
+               #define XMEGA_NVM_REG_STATUS                 0x0F\r
+               #define XMEGA_NVM_REG_LOCKBITS               0x10\r
+               \r
+               #define XMEGA_NVM_CMD_NOOP                   0x00\r
+               #define XMEGA_NVM_CMD_CHIPERASE              0x40\r
+               #define XMEGA_NVM_CMD_READNVM                0x43\r
+               #define XMEGA_NVM_CMD_LOADFLASHPAGEBUFF      0x23\r
+               #define XMEGA_NVM_CMD_ERASEFLASHPAGEBUFF     0x26\r
+               #define XMEGA_NVM_CMD_ERASEFLASHPAGE         0x2B\r
+               #define XMEGA_NVM_CMD_WRITEFLASHPAGE         0x2E\r
+               #define XMEGA_NVM_CMD_ERASEWRITEFLASH        0x2F\r
+               #define XMEGA_NVM_CMD_FLASHCRC               0x78\r
+               #define XMEGA_NVM_CMD_ERASEAPPSEC            0x20\r
+               #define XMEGA_NVM_CMD_ERASEAPPSECPAGE        0x22\r
+               #define XMEGA_NVM_CMD_WRITEAPPSECPAGE        0x24\r
+               #define XMEGA_NVM_CMD_ERASEWRITEAPPSECPAGE   0x25\r
+               #define XMEGA_NVM_CMD_APPCRC                 0x38\r
+               #define XMEGA_NVM_CMD_ERASEBOOTSEC           0x68\r
+               #define XMEGA_NVM_CMD_ERASEBOOTSECPAGE       0x2A\r
+               #define XMEGA_NVM_CMD_WRITEBOOTSECPAGE       0x2C\r
+               #define XMEGA_NVM_CMD_ERASEWRITEBOOTSECPAGE  0x2D\r
+               #define XMEGA_NVM_CMD_BOOTCRC                0x39\r
+               #define XMEGA_NVM_CMD_READUSERSIG            0x03\r
+               #define XMEGA_NVM_CMD_ERASEUSERSIG           0x18\r
+               #define XMEGA_NVM_CMD_WRITEUSERSIG           0x1A\r
+               #define XMEGA_NVM_CMD_READCALIBRATION        0x02\r
+               #define XMEGA_NVM_CMD_READFUSE               0x07\r
+               #define XMEGA_NVM_CMD_WRITEFUSE              0x4C\r
+               #define XMEGA_NVM_CMD_WRITELOCK              0x08\r
+               #define XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF     0x33\r
+               #define XMEGA_NVM_CMD_ERASEEEPROMPAGEBUFF    0x36\r
+               #define XMEGA_NVM_CMD_ERASEEEPROM            0x30\r
+               #define XMEGA_NVM_CMD_ERASEEEPROMPAGE        0x32\r
+               #define XMEGA_NVM_CMD_WRITEEEPROMPAGE        0x34\r
+               #define XMEGA_NVM_CMD_ERASEWRITEEEPROMPAGE   0x35\r
+               #define XMEGA_NVM_CMD_READEEPROM             0x06\r
+\r
+       /* Function Prototypes: */\r
+               void XMEGANVM_SendNVMRegAddress(const uint8_t Register);\r
+               void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress);\r
+               bool XMEGANVM_WaitWhileNVMControllerBusy(void);\r
+               bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest);\r
+               bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize);\r
+               bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer);\r
+               bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,\r
+                                             const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,\r
+                                             const uint8_t* WriteBuffer, const uint16_t WriteSize);\r
+               bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address);\r
+\r
+#endif\r
diff --git a/Projects/AVRISP/Lib/PDIProtocol.c b/Projects/AVRISP/Lib/PDIProtocol.c
deleted file mode 100644 (file)
index 16ac209..0000000
+++ /dev/null
@@ -1,376 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  PDI Protocol handler, to process V2 Protocol wrapped PDI commands used in Atmel programmer devices.\r
- */\r
-\r
-#define  INCLUDE_FROM_PDIPROTOCOL_C\r
-#include "PDIProtocol.h"\r
-\r
-#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)\r
-/** Base absolute address for the target's NVM controller */\r
-uint32_t XPROG_Param_NVMBase = 0x010001C0;\r
-\r
-/** Size in bytes of the target's EEPROM page */\r
-uint32_t XPROG_Param_EEPageSize;\r
-\r
-/** Handler for the CMD_XPROG_SETMODE command, which sets the programmer-to-target protocol used for PDI\r
- *  XMEGA programming (either PDI or JTAG). Only PDI programming is supported.\r
- */\r
-void PDIProtocol_XPROG_SetMode(void)\r
-{\r
-       struct\r
-       {\r
-               uint8_t Protocol;\r
-       } SetMode_XPROG_Params;\r
-       \r
-       Endpoint_Read_Stream_LE(&SetMode_XPROG_Params, sizeof(SetMode_XPROG_Params));\r
-\r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-       \r
-       Endpoint_Write_Byte(CMD_XPROG_SETMODE);\r
-       Endpoint_Write_Byte((SetMode_XPROG_Params.Protocol == XPRG_PROTOCOL_PDI) ? STATUS_CMD_OK : STATUS_CMD_FAILED);\r
-       Endpoint_ClearIN();     \r
-}\r
-\r
-/** Handler for the CMD_XPROG command, which wraps up XPROG commands in a V2 wrapper which need to be\r
- *  removed and processed so that the underlying XPROG command can be handled.\r
- */\r
-void PDIProtocol_XPROG_Command(void)\r
-{\r
-       uint8_t XPROGCommand = Endpoint_Read_Byte();\r
-\r
-       switch (XPROGCommand)\r
-       {\r
-               case XPRG_CMD_ENTER_PROGMODE:\r
-                       PDIProtocol_EnterXPROGMode();\r
-                       break;\r
-               case XPRG_CMD_LEAVE_PROGMODE:\r
-                       PDIProtocol_LeaveXPROGMode();\r
-                       break;\r
-               case XPRG_CMD_ERASE:\r
-                       PDIProtocol_Erase();\r
-                       break;\r
-               case XPRG_CMD_WRITE_MEM:\r
-                       PDIProtocol_WriteMemory();\r
-                       break;\r
-               case XPRG_CMD_READ_MEM:\r
-                       PDIProtocol_ReadMemory();\r
-                       break;\r
-               case XPRG_CMD_CRC:\r
-                       PDIProtocol_ReadCRC();\r
-                       break;\r
-               case XPRG_CMD_SET_PARAM:\r
-                       PDIProtocol_SetParam();\r
-                       break;\r
-       }\r
-}\r
-\r
-/** Handler for the XPROG ENTER_PROGMODE command to establish a PDI connection with the attached device. */\r
-static void PDIProtocol_EnterXPROGMode(void)\r
-{\r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-       \r
-       /* Enable PDI programming mode with the attached target */\r
-       PDITarget_EnableTargetPDI();\r
-       \r
-       /* Store the RESET key into the RESET PDI register to keep the XMEGA in reset */\r
-       PDITarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);       \r
-       PDITarget_SendByte(PDI_RESET_KEY);\r
-\r
-       /* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */\r
-       PDITarget_SendByte(PDI_CMD_KEY);        \r
-       for (uint8_t i = sizeof(PDI_NVMENABLE_KEY); i > 0; i--)\r
-         PDITarget_SendByte(PDI_NVMENABLE_KEY[i - 1]);\r
-\r
-       /* Wait until the NVM bus becomes active */\r
-       bool NVMBusEnabled = PDITarget_WaitWhileNVMBusBusy();\r
-       \r
-       Endpoint_Write_Byte(CMD_XPROG);\r
-       Endpoint_Write_Byte(XPRG_CMD_ENTER_PROGMODE);\r
-       Endpoint_Write_Byte(NVMBusEnabled ? XPRG_ERR_OK : XPRG_ERR_FAILED);\r
-       Endpoint_ClearIN();\r
-}\r
-\r
-/** Handler for the XPROG LEAVE_PROGMODE command to terminate the PDI programming connection with\r
- *  the attached device.\r
- */\r
-static void PDIProtocol_LeaveXPROGMode(void)\r
-{\r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-       \r
-       /* Clear the RESET key in the RESET PDI register to allow the XMEGA to run */\r
-       PDITarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);       \r
-       PDITarget_SendByte(0x00);\r
-\r
-       PDITarget_DisableTargetPDI();\r
-\r
-       Endpoint_Write_Byte(CMD_XPROG);\r
-       Endpoint_Write_Byte(XPRG_CMD_LEAVE_PROGMODE);\r
-       Endpoint_Write_Byte(XPRG_ERR_OK);\r
-       Endpoint_ClearIN();\r
-}\r
-\r
-/** Handler for the XPRG ERASE command to erase a specific memory address space in the attached device. */\r
-static void PDIProtocol_Erase(void)\r
-{\r
-       uint8_t ReturnStatus = XPRG_ERR_OK;\r
-\r
-       struct\r
-       {\r
-               uint8_t  MemoryType;\r
-               uint32_t Address;\r
-       } Erase_XPROG_Params;\r
-\r
-       Endpoint_Read_Stream_LE(&Erase_XPROG_Params, sizeof(Erase_XPROG_Params));\r
-       Erase_XPROG_Params.Address = SwapEndian_32(Erase_XPROG_Params.Address);\r
-\r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-       \r
-       uint8_t EraseCommand = XMEGA_NVM_CMD_NOOP;\r
-       \r
-       /* Determine which NVM command to send to the device depending on the memory to erase */\r
-       if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_CHIP)\r
-         EraseCommand = XMEGA_NVM_CMD_CHIPERASE;\r
-       else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_APP)\r
-         EraseCommand = XMEGA_NVM_CMD_ERASEAPPSEC;\r
-       else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_BOOT)\r
-         EraseCommand = XMEGA_NVM_CMD_ERASEBOOTSEC;\r
-       else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_EEPROM)\r
-         EraseCommand = XMEGA_NVM_CMD_ERASEEEPROM;\r
-       else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_APP_PAGE)\r
-         EraseCommand = XMEGA_NVM_CMD_ERASEAPPSECPAGE;\r
-       else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_BOOT_PAGE)\r
-         EraseCommand = XMEGA_NVM_CMD_ERASEBOOTSECPAGE;\r
-       else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_EEPROM_PAGE)\r
-         EraseCommand = XMEGA_NVM_CMD_ERASEEEPROMPAGE;\r
-       else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_USERSIG)\r
-         EraseCommand = XMEGA_NVM_CMD_ERASEUSERSIG;\r
-       \r
-       /* Erase the target memory, indicate timeout if ocurred */\r
-       if (!(XMEGANVM_EraseMemory(EraseCommand, Erase_XPROG_Params.Address)))\r
-         ReturnStatus = XPRG_ERR_TIMEOUT;\r
-       \r
-       Endpoint_Write_Byte(CMD_XPROG);\r
-       Endpoint_Write_Byte(XPRG_CMD_ERASE);\r
-       Endpoint_Write_Byte(ReturnStatus);\r
-       Endpoint_ClearIN();     \r
-}\r
-\r
-/** Handler for the XPROG WRITE_MEMORY command to write to a specific memory space within the attached device. */\r
-static void PDIProtocol_WriteMemory(void)\r
-{\r
-       uint8_t ReturnStatus = XPRG_ERR_OK;\r
-\r
-       struct\r
-       {\r
-               uint8_t  MemoryType;\r
-               uint8_t  PageMode;\r
-               uint32_t Address;\r
-               uint16_t Length;\r
-               uint8_t  ProgData[256];\r
-       } WriteMemory_XPROG_Params;\r
-       \r
-       Endpoint_Read_Stream_LE(&WriteMemory_XPROG_Params, (sizeof(WriteMemory_XPROG_Params) -\r
-                                                           sizeof(WriteMemory_XPROG_Params).ProgData));\r
-       WriteMemory_XPROG_Params.Address = SwapEndian_32(WriteMemory_XPROG_Params.Address);\r
-       WriteMemory_XPROG_Params.Length  = SwapEndian_16(WriteMemory_XPROG_Params.Length);\r
-       Endpoint_Read_Stream_LE(&WriteMemory_XPROG_Params.ProgData, WriteMemory_XPROG_Params.Length);\r
-\r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-\r
-       /* Assume FLASH page programming by default, as it is the common case */\r
-       uint8_t WriteCommand     = XMEGA_NVM_CMD_WRITEFLASHPAGE;\r
-       uint8_t WriteBuffCommand = XMEGA_NVM_CMD_LOADFLASHPAGEBUFF;\r
-       uint8_t EraseBuffCommand = XMEGA_NVM_CMD_ERASEFLASHPAGEBUFF;\r
-       bool    PagedMemory      = true;\r
-       \r
-       if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_APPL)\r
-       {\r
-               WriteCommand     = XMEGA_NVM_CMD_WRITEAPPSECPAGE;\r
-       }\r
-       else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_BOOT)\r
-       {\r
-               WriteCommand     = XMEGA_NVM_CMD_WRITEBOOTSECPAGE;\r
-       }\r
-       else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_EEPROM)\r
-       {\r
-               WriteCommand     = XMEGA_NVM_CMD_WRITEEEPROMPAGE;\r
-               WriteBuffCommand = XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF;\r
-               EraseBuffCommand = XMEGA_NVM_CMD_ERASEEEPROMPAGEBUFF;\r
-       }\r
-       else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_USERSIG)\r
-       {\r
-               /* User signature is paged, but needs us to manually indicate the mode bits since the host doesn't set them */\r
-               WriteMemory_XPROG_Params.PageMode = (XPRG_PAGEMODE_ERASE | XPRG_PAGEMODE_WRITE);\r
-               WriteCommand     = XMEGA_NVM_CMD_WRITEUSERSIG;\r
-       }\r
-       else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_FUSE)\r
-       {\r
-               WriteCommand     = XMEGA_NVM_CMD_WRITEFUSE;\r
-               PagedMemory      = false;\r
-       }\r
-       else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_LOCKBITS)\r
-       {\r
-               WriteCommand     = XMEGA_NVM_CMD_WRITELOCK;\r
-               PagedMemory      = false;\r
-       }\r
-       \r
-       /* Send the appropriate memory write commands to the device, indicate timeout if occurred */\r
-       if ((PagedMemory && !XMEGANVM_WritePageMemory(WriteBuffCommand, EraseBuffCommand, WriteCommand, \r
-                                                          WriteMemory_XPROG_Params.PageMode, WriteMemory_XPROG_Params.Address,\r
-                                                          WriteMemory_XPROG_Params.ProgData, WriteMemory_XPROG_Params.Length)) ||\r
-          (!PagedMemory && !XMEGANVM_WriteByteMemory(WriteCommand, WriteMemory_XPROG_Params.Address,\r
-                                                      WriteMemory_XPROG_Params.ProgData)))\r
-       {\r
-               ReturnStatus = XPRG_ERR_TIMEOUT;\r
-       }\r
-       \r
-       Endpoint_Write_Byte(CMD_XPROG);\r
-       Endpoint_Write_Byte(XPRG_CMD_WRITE_MEM);\r
-       Endpoint_Write_Byte(ReturnStatus);      \r
-       Endpoint_ClearIN();\r
-}\r
-\r
-/** Handler for the XPROG READ_MEMORY command to read data from a specific address space within the\r
- *  attached device.\r
- */\r
-static void PDIProtocol_ReadMemory(void)\r
-{\r
-       uint8_t ReturnStatus = XPRG_ERR_OK;\r
-\r
-       struct\r
-       {\r
-               uint8_t  MemoryType;\r
-               uint32_t Address;\r
-               uint16_t Length;\r
-       } ReadMemory_XPROG_Params;\r
-       \r
-       Endpoint_Read_Stream_LE(&ReadMemory_XPROG_Params, sizeof(ReadMemory_XPROG_Params));\r
-       ReadMemory_XPROG_Params.Address = SwapEndian_32(ReadMemory_XPROG_Params.Address);\r
-       ReadMemory_XPROG_Params.Length  = SwapEndian_16(ReadMemory_XPROG_Params.Length);\r
-\r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-\r
-       uint8_t ReadBuffer[256];\r
-       \r
-       /* Read the target's memory, indicate timeout if occurred */\r
-       if (!(XMEGANVM_ReadMemory(ReadMemory_XPROG_Params.Address, ReadBuffer, ReadMemory_XPROG_Params.Length)))\r
-         ReturnStatus = XPRG_ERR_TIMEOUT;\r
-\r
-       Endpoint_Write_Byte(CMD_XPROG);\r
-       Endpoint_Write_Byte(XPRG_CMD_READ_MEM);\r
-       Endpoint_Write_Byte(ReturnStatus);\r
-       \r
-       if (ReturnStatus == XPRG_ERR_OK)\r
-         Endpoint_Write_Stream_LE(ReadBuffer, ReadMemory_XPROG_Params.Length);\r
-       \r
-       Endpoint_ClearIN();\r
-}\r
-\r
-/** Handler for the XPROG CRC command to read a specific memory space's CRC value for comparison between the\r
- *  attached device's memory and a data set on the host.\r
- */\r
-static void PDIProtocol_ReadCRC(void)\r
-{\r
-       uint8_t ReturnStatus = XPRG_ERR_OK;\r
-       \r
-       struct\r
-       {\r
-               uint8_t CRCType;\r
-       } ReadCRC_XPROG_Params;\r
-       \r
-       Endpoint_Read_Stream_LE(&ReadCRC_XPROG_Params, sizeof(ReadCRC_XPROG_Params));\r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-       \r
-       uint8_t  CRCCommand = XMEGA_NVM_CMD_NOOP;\r
-       uint32_t MemoryCRC;\r
-\r
-       /* Determine which NVM command to send to the device depending on the memory to CRC */\r
-       if (ReadCRC_XPROG_Params.CRCType == XPRG_CRC_APP)\r
-         CRCCommand = XMEGA_NVM_CMD_APPCRC;\r
-       else if (ReadCRC_XPROG_Params.CRCType == XPRG_CRC_BOOT)\r
-         CRCCommand = XMEGA_NVM_CMD_BOOTCRC;\r
-       else\r
-         CRCCommand = XMEGA_NVM_CMD_FLASHCRC;\r
-       \r
-       /* Perform and retrieve the memory CRC, indicate timeout if occurred */\r
-       if (!(XMEGANVM_GetMemoryCRC(CRCCommand, &MemoryCRC)))\r
-         ReturnStatus = XPRG_ERR_TIMEOUT;\r
-       \r
-       Endpoint_Write_Byte(CMD_XPROG);\r
-       Endpoint_Write_Byte(XPRG_CMD_CRC);\r
-       Endpoint_Write_Byte(ReturnStatus);\r
-       \r
-       if (ReturnStatus == XPRG_ERR_OK)\r
-       {\r
-               Endpoint_Write_Byte(MemoryCRC >> 16);\r
-               Endpoint_Write_Word_LE(MemoryCRC & 0xFFFF);             \r
-       }\r
-       \r
-       Endpoint_ClearIN();     \r
-}\r
-\r
-/** Handler for the XPROG SET_PARAM command to set a PDI parameter for use when communicating with the\r
- *  attached device.\r
- */\r
-static void PDIProtocol_SetParam(void)\r
-{\r
-       uint8_t ReturnStatus = XPRG_ERR_OK;\r
-\r
-       uint8_t XPROGParam = Endpoint_Read_Byte();\r
-       \r
-       /* Determine which parameter is being set, store the new parameter value */\r
-       if (XPROGParam == XPRG_PARAM_NVMBASE)\r
-         XPROG_Param_NVMBase = Endpoint_Read_DWord_BE();\r
-       else if (XPROGParam == XPRG_PARAM_EEPPAGESIZE)\r
-         XPROG_Param_EEPageSize = Endpoint_Read_Word_BE();\r
-       else\r
-         ReturnStatus = XPRG_ERR_FAILED;\r
-       \r
-       Endpoint_ClearOUT();\r
-       Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
-                 \r
-       Endpoint_Write_Byte(CMD_XPROG);\r
-       Endpoint_Write_Byte(XPRG_CMD_SET_PARAM);\r
-       Endpoint_Write_Byte(ReturnStatus);\r
-       Endpoint_ClearIN();\r
-}\r
-\r
-#endif\r
diff --git a/Projects/AVRISP/Lib/PDIProtocol.h b/Projects/AVRISP/Lib/PDIProtocol.h
deleted file mode 100644 (file)
index c1fbef4..0000000
+++ /dev/null
@@ -1,122 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  Header file for PDIProtocol.c.\r
- */\r
-\r
-#ifndef _PDI_PROTOCOL_\r
-#define _PDI_PROTOCOL_\r
-\r
-       /* Includes: */\r
-               #include <avr/io.h>\r
-               #include <util/delay.h>\r
-               #include <stdio.h>\r
-       \r
-               #include "V2Protocol.h"\r
-               #include "PDITarget.h"\r
-               #include "XMEGANVM.h"\r
-\r
-       /* Preprocessor Checks: */\r
-               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
-                       #undef ENABLE_ISP_PROTOCOL\r
-                       #undef ENABLE_TPI_PROTOCOL\r
-                       \r
-                       #if !defined(ENABLE_PDI_PROTOCOL)\r
-                               #define ENABLE_PDI_PROTOCOL\r
-                       #endif\r
-               #endif\r
-       \r
-       /* Macros: */\r
-               #define XPRG_CMD_ENTER_PROGMODE             0x01\r
-               #define XPRG_CMD_LEAVE_PROGMODE             0x02\r
-               #define XPRG_CMD_ERASE                      0x03\r
-               #define XPRG_CMD_WRITE_MEM                  0x04\r
-               #define XPRG_CMD_READ_MEM                   0x05\r
-               #define XPRG_CMD_CRC                        0x06\r
-               #define XPRG_CMD_SET_PARAM                  0x07\r
-\r
-               #define XPRG_MEM_TYPE_APPL                  1\r
-               #define XPRG_MEM_TYPE_BOOT                  2\r
-               #define XPRG_MEM_TYPE_EEPROM                3\r
-               #define XPRG_MEM_TYPE_FUSE                  4\r
-               #define XPRG_MEM_TYPE_LOCKBITS              5\r
-               #define XPRG_MEM_TYPE_USERSIG               6\r
-               #define XPRG_MEM_TYPE_FACTORY_CALIBRATION   7\r
-\r
-               #define XPRG_ERASE_CHIP                     1\r
-               #define XPRG_ERASE_APP                      2\r
-               #define XPRG_ERASE_BOOT                     3\r
-               #define XPRG_ERASE_EEPROM                   4\r
-               #define XPRG_ERASE_APP_PAGE                 5\r
-               #define XPRG_ERASE_BOOT_PAGE                6\r
-               #define XPRG_ERASE_EEPROM_PAGE              7\r
-               #define XPRG_ERASE_USERSIG                  8\r
-\r
-               #define XPRG_MEM_WRITE_ERASE                0\r
-               #define XPRG_MEM_WRITE_WRITE                1\r
-\r
-               #define XPRG_CRC_APP                        1\r
-               #define XPRG_CRC_BOOT                       2\r
-               #define XPRG_CRC_FLASH                      3\r
-\r
-               #define XPRG_ERR_OK                         0\r
-               #define XPRG_ERR_FAILED                     1\r
-               #define XPRG_ERR_COLLISION                  2\r
-               #define XPRG_ERR_TIMEOUT                    3\r
-\r
-               #define XPRG_PARAM_NVMBASE                  0x01\r
-               #define XPRG_PARAM_EEPPAGESIZE              0x02\r
-               \r
-               #define XPRG_PROTOCOL_PDI                   0x00\r
-               #define XPRG_PROTOCOL_JTAG                  0x01\r
-               \r
-               #define XPRG_PAGEMODE_WRITE                 (1 << 1)\r
-               #define XPRG_PAGEMODE_ERASE                 (1 << 0)\r
-       \r
-       /* External Variables: */\r
-               extern uint32_t XPROG_Param_NVMBase;\r
-               \r
-       /* Function Prototypes: */\r
-               void PDIProtocol_XPROG_SetMode(void);\r
-               void PDIProtocol_XPROG_Command(void);\r
-               \r
-               #if defined(INCLUDE_FROM_PDIPROTOCOL_C)\r
-                       static void PDIProtocol_EnterXPROGMode(void);\r
-                       static void PDIProtocol_LeaveXPROGMode(void);\r
-                       static void PDIProtocol_SetParam(void);\r
-                       static void PDIProtocol_Erase(void);\r
-                       static void PDIProtocol_WriteMemory(void);\r
-                       static void PDIProtocol_ReadMemory(void);\r
-                       static void PDIProtocol_ReadCRC(void);\r
-               #endif\r
-               \r
-#endif\r
diff --git a/Projects/AVRISP/Lib/PDITarget.c b/Projects/AVRISP/Lib/PDITarget.c
deleted file mode 100644 (file)
index 2c6ffd9..0000000
+++ /dev/null
@@ -1,335 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  Target-related functions for the PDI Protocol decoder.\r
- */\r
-\r
-#define  INCLUDE_FROM_PDITARGET_C\r
-#include "PDITarget.h"\r
-\r
-#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)\r
-\r
-/** Flag to indicate if the USART is currently in Tx or Rx mode. */\r
-volatile bool               IsSending;\r
-\r
-#if !defined(PDI_VIA_HARDWARE_USART)\r
-/** Software USART raw frame bits for transmission/reception. */\r
-volatile uint16_t           SoftUSART_Data;\r
-\r
-/** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */\r
-#define SoftUSART_BitCount  GPIOR2\r
-\r
-\r
-/** ISR to manage the software USART when bit-banged USART mode is selected. */\r
-ISR(TIMER1_COMPA_vect, ISR_BLOCK)\r
-{\r
-       /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
-       BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;\r
-\r
-       /* If not sending or receiving, just exit */\r
-       if (!(SoftUSART_BitCount))\r
-         return;\r
-\r
-       /* Check to see if we are at a rising or falling edge of the clock */\r
-       if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)\r
-       {\r
-               /* If at rising clock edge and we are in send mode, abort */\r
-               if (IsSending)\r
-                 return;\r
-                 \r
-               /* Wait for the start bit when receiving */\r
-               if ((SoftUSART_BitCount == BITS_IN_PDI_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r
-                 return;\r
-       \r
-               /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
-                * be discarded leaving the data to be byte-aligned for quick access */\r
-               if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
-                 SoftUSART_Data |= (1 << (BITS_IN_PDI_FRAME - 1));\r
-\r
-               SoftUSART_Data >>= 1;\r
-               SoftUSART_BitCount--;\r
-       }\r
-       else\r
-       {\r
-               /* If at falling clock edge and we are in receive mode, abort */\r
-               if (!IsSending)\r
-                 return;\r
-\r
-               /* Set the data line to the next bit value */\r
-               if (SoftUSART_Data & 0x01)\r
-                 BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;\r
-               else\r
-                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;                  \r
-\r
-               SoftUSART_Data >>= 1;\r
-               SoftUSART_BitCount--;\r
-       }\r
-}\r
-#endif\r
-\r
-/** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */\r
-void PDITarget_EnableTargetPDI(void)\r
-{\r
-#if defined(PDI_VIA_HARDWARE_USART)\r
-       /* Set Tx and XCK as outputs, Rx as input */\r
-       DDRD |=  (1 << 5) | (1 << 3);\r
-       DDRD &= ~(1 << 2);\r
-       \r
-       /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
-       PORTD |= (1 << 3);\r
-       asm volatile ("NOP"::);\r
-       asm volatile ("NOP"::);\r
-       \r
-       /* Set up the synchronous USART for XMEGA communications - \r
-          8 data bits, even parity, 2 stop bits */\r
-       UBRR1  = (F_CPU / 1000000UL);\r
-       UCSR1B = (1 << TXEN1);\r
-       UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
-\r
-       /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */\r
-       PDITarget_SendBreak();\r
-       PDITarget_SendBreak();\r
-#else\r
-       /* Set DATA and CLOCK lines to outputs */\r
-       BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;\r
-       BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;\r
-       \r
-       /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
-       BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
-       asm volatile ("NOP"::);\r
-       asm volatile ("NOP"::);\r
-\r
-       /* Fire timer compare ISR every 100 cycles to manage the software USART */\r
-       OCR1A   = 80;\r
-       TCCR1B  = (1 << WGM12) | (1 << CS10);\r
-       TIMSK1  = (1 << OCIE1A);\r
-       \r
-       /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
-       PDITarget_SendBreak();\r
-       PDITarget_SendBreak();\r
-#endif\r
-}\r
-\r
-/** Disables the target's PDI interface, exits programming mode and starts the target's application. */\r
-void PDITarget_DisableTargetPDI(void)\r
-{\r
-#if defined(PDI_VIA_HARDWARE_USART)\r
-       /* Turn off receiver and transmitter of the USART, clear settings */\r
-       UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
-       UCSR1B  = 0;\r
-       UCSR1C  = 0;\r
-\r
-       /* Set all USART lines as input, tristate */\r
-       DDRD  &= ~((1 << 5) | (1 << 3));\r
-       PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
-#else\r
-       /* Set DATA and CLOCK lines to inputs */\r
-       BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;\r
-       BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;\r
-       \r
-       /* Tristate DATA and CLOCK lines */\r
-       BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;\r
-       BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;\r
-#endif\r
-}\r
-\r
-/** Sends a byte via the USART.\r
- *\r
- *  \param[in] Byte  Byte to send through the USART\r
- */\r
-void PDITarget_SendByte(const uint8_t Byte)\r
-{\r
-#if defined(PDI_VIA_HARDWARE_USART)\r
-       /* Switch to Tx mode if currently in Rx mode */\r
-       if (!(IsSending))\r
-       {\r
-               PORTD  |=  (1 << 3);\r
-               DDRD   |=  (1 << 3);\r
-\r
-               UCSR1B |=  (1 << TXEN1);\r
-               UCSR1B &= ~(1 << RXEN1);\r
-               \r
-               IsSending = true;\r
-       }\r
-       \r
-       /* Wait until there is space in the hardware Tx buffer before writing */\r
-       while (!(UCSR1A & (1 << UDRE1)));\r
-       UCSR1A |= (1 << TXC1);\r
-       UDR1    = Byte;\r
-#else\r
-       /* Switch to Tx mode if currently in Rx mode */\r
-       if (!(IsSending))\r
-       {\r
-               BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
-               BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;\r
-\r
-               IsSending = true;\r
-       }\r
-\r
-       /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */\r
-       uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));\r
-\r
-       /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */\r
-       uint8_t ParityData    = Byte;\r
-       while (ParityData)\r
-       {\r
-               NewUSARTData ^= (1 << 9);\r
-               ParityData   &= (ParityData - 1);\r
-       }\r
-\r
-       /* Wait until transmitter is idle before writing new data */\r
-       while (SoftUSART_BitCount);\r
-\r
-       /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
-       SoftUSART_Data     = NewUSARTData;\r
-       SoftUSART_BitCount = BITS_IN_PDI_FRAME;\r
-#endif\r
-}\r
-\r
-/** Receives a byte via the software USART, blocking until data is received.\r
- *\r
- *  \return Received byte from the USART\r
- */\r
-uint8_t PDITarget_ReceiveByte(void)\r
-{\r
-#if defined(PDI_VIA_HARDWARE_USART)\r
-       /* Switch to Rx mode if currently in Tx mode */\r
-       if (IsSending)\r
-       {\r
-               while (!(UCSR1A & (1 << TXC1)));\r
-               UCSR1A |=  (1 << TXC1);\r
-\r
-               UCSR1B &= ~(1 << TXEN1);\r
-               UCSR1B |=  (1 << RXEN1);\r
-\r
-               DDRD   &= ~(1 << 3);\r
-               PORTD  &= ~(1 << 3);\r
-               \r
-               IsSending = false;\r
-       }\r
-\r
-       /* Wait until a byte has been received before reading */\r
-       while (!(UCSR1A & (1 << RXC1)));\r
-       return UDR1;\r
-#else\r
-       /* Switch to Rx mode if currently in Tx mode */\r
-       if (IsSending)\r
-       {\r
-               while (SoftUSART_BitCount);\r
-\r
-               BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;\r
-               BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
-\r
-               IsSending = false;\r
-       }\r
-\r
-       /* Wait until a byte has been received before reading */\r
-       SoftUSART_BitCount = BITS_IN_PDI_FRAME;\r
-       while (SoftUSART_BitCount);\r
-       \r
-       /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */\r
-       return (uint8_t)SoftUSART_Data;\r
-#endif\r
-}\r
-\r
-/** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */\r
-void PDITarget_SendBreak(void)\r
-{\r
-#if defined(PDI_VIA_HARDWARE_USART)\r
-       /* Switch to Tx mode if currently in Rx mode */\r
-       if (!(IsSending))\r
-       {\r
-               PORTD  |=  (1 << 3);\r
-               DDRD   |=  (1 << 3);\r
-\r
-               UCSR1B &= ~(1 << RXEN1);\r
-               UCSR1B |=  (1 << TXEN1);\r
-               \r
-               IsSending = true;\r
-       }\r
-\r
-       /* Need to do nothing for a full frame to send a BREAK */\r
-       for (uint8_t i = 0; i < BITS_IN_PDI_FRAME; i++)\r
-       {\r
-               /* Wait for a full cycle of the clock */\r
-               while (PIND & (1 << 5));\r
-               while (!(PIND & (1 << 5)));\r
-       }\r
-#else\r
-       /* Switch to Tx mode if currently in Rx mode */\r
-       if (!(IsSending))\r
-       {\r
-               BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
-               BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;\r
-\r
-               IsSending = true;\r
-       }\r
-       \r
-       while (SoftUSART_BitCount);\r
-\r
-       /* Need to do nothing for a full frame to send a BREAK */\r
-       SoftUSART_Data     = 0x0FFF;\r
-       SoftUSART_BitCount = BITS_IN_PDI_FRAME;\r
-#endif\r
-}\r
-\r
-/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC\r
- *  calculation.\r
- *\r
- *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
- */\r
-bool PDITarget_WaitWhileNVMBusBusy(void)\r
-{\r
-       TCNT0 = 0;\r
-       TIFR0 = (1 << OCF1A);\r
-                       \r
-       uint8_t TimeoutMS = PDI_NVM_TIMEOUT_MS;\r
-       \r
-       /* Poll the STATUS register to check to see if NVM access has been enabled */\r
-       while (TimeoutMS)\r
-       {\r
-               /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */\r
-               PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);\r
-               if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)\r
-                 return true;\r
-\r
-               if (TIFR0 & (1 << OCF1A))\r
-               {\r
-                       TIFR0 = (1 << OCF1A);\r
-                       TimeoutMS--;\r
-               }\r
-       }\r
-       \r
-       return false;\r
-}\r
-\r
-#endif\r
diff --git a/Projects/AVRISP/Lib/PDITarget.h b/Projects/AVRISP/Lib/PDITarget.h
deleted file mode 100644 (file)
index cf7780c..0000000
+++ /dev/null
@@ -1,112 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  Header file for PDITarget.c.\r
- */\r
-\r
-#ifndef _PDI_TARGET_\r
-#define _PDI_TARGET_\r
-\r
-       /* Includes: */\r
-               #include <avr/io.h>\r
-               #include <avr/interrupt.h>\r
-               #include <stdbool.h>\r
-               \r
-               #include <LUFA/Common/Common.h>\r
-       \r
-       /* Preprocessor Checks: */\r
-               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
-                       #undef ENABLE_ISP_PROTOCOL\r
-                       #undef ENABLE_TPI_PROTOCOL\r
-                       \r
-                       #if !defined(ENABLE_PDI_PROTOCOL)\r
-                               #define ENABLE_PDI_PROTOCOL\r
-                       #endif\r
-               #endif\r
-\r
-       /* Defines: */\r
-               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
-                       #define PDI_VIA_HARDWARE_USART\r
-               #else\r
-                       #define BITBANG_PDIDATA_PORT     PORTB\r
-                       #define BITBANG_PDIDATA_DDR      DDRB\r
-                       #define BITBANG_PDIDATA_PIN      PINB\r
-                       #define BITBANG_PDIDATA_MASK     (1 << 3)\r
-                       \r
-                       #define BITBANG_PDICLOCK_PORT    RESET_LINE_PORT\r
-                       #define BITBANG_PDICLOCK_DDR     RESET_LINE_DDR\r
-                       #define BITBANG_PDICLOCK_PIN     RESET_LINE_PIN\r
-                       #define BITBANG_PDICLOCK_MASK    RESET_LINE_MASK\r
-               #endif\r
-               \r
-               /** Total number of bits in a single USART frame */\r
-               #define BITS_IN_PDI_FRAME        12\r
-               \r
-               /** Timeout in milliseconds of a PDI busy-wait command */\r
-               #define PDI_NVM_TIMEOUT_MS       100\r
-               \r
-               #define PDI_CMD_LDS              0x00\r
-               #define PDI_CMD_LD               0x20\r
-               #define PDI_CMD_STS              0x40\r
-               #define PDI_CMD_ST               0x60\r
-               #define PDI_CMD_LDCS             0x80\r
-               #define PDI_CMD_REPEAT           0xA0\r
-               #define PDI_CMD_STCS             0xC0\r
-               #define PDI_CMD_KEY              0xE0\r
-               \r
-               #define PDI_STATUS_REG           0\r
-               #define PDI_RESET_REG            1\r
-               #define PDI_CTRL_REG             2\r
-               \r
-               #define PDI_STATUS_NVM           (1 << 1)\r
-               #define PDI_RESET_KEY            0x59\r
-\r
-               #define PDI_NVMENABLE_KEY        (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}\r
-\r
-               #define PDI_DATSIZE_1BYTE        0\r
-               #define PDI_DATSIZE_2BYTES       1\r
-               #define PDI_DATSIZE_3BYTES       2\r
-               #define PDI_DATSIZE_4BYTES       3\r
-               \r
-               #define PDI_POINTER_INDIRECT     0\r
-               #define PDI_POINTER_INDIRECT_PI  1\r
-               #define PDI_POINTER_DIRECT       2\r
-                               \r
-       /* Function Prototypes: */\r
-               void    PDITarget_EnableTargetPDI(void);\r
-               void    PDITarget_DisableTargetPDI(void);\r
-               void    PDITarget_SendByte(const uint8_t Byte);\r
-               uint8_t PDITarget_ReceiveByte(void);\r
-               void    PDITarget_SendBreak(void);\r
-               bool    PDITarget_WaitWhileNVMBusBusy(void);\r
-\r
-#endif\r
diff --git a/Projects/AVRISP/Lib/TINYNVM.c b/Projects/AVRISP/Lib/TINYNVM.c
deleted file mode 100644 (file)
index 206ea39..0000000
+++ /dev/null
@@ -1,43 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  Target-related functions for the TINY target's NVM module.\r
- */\r
-\r
-#define  INCLUDE_FROM_TINYNVM_C\r
-#include "TINYNVM.h"\r
-\r
-#if defined(ENABLE_TPI_PROTOCOL) || defined(__DOXYGEN__)\r
-\r
-// TODO\r
-\r
-#endif\r
diff --git a/Projects/AVRISP/Lib/TINYNVM.h b/Projects/AVRISP/Lib/TINYNVM.h
deleted file mode 100644 (file)
index eca3c98..0000000
+++ /dev/null
@@ -1,62 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  Header file for TINYNVM.c.\r
- */\r
-\r
-#ifndef _TINY_NVM_\r
-#define _TINY_NVM_\r
-\r
-       /* Includes: */\r
-               #include <avr/io.h>\r
-               #include <avr/interrupt.h>\r
-               #include <stdbool.h>\r
-               \r
-               #include <LUFA/Common/Common.h>\r
-               \r
-               #include "TPIProtocol.h"\r
-               #include "TPITarget.h"\r
-       \r
-       /* Preprocessor Checks: */\r
-               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
-                       #undef ENABLE_ISP_PROTOCOL\r
-                       #undef ENABLE_TPI_PROTOCOL\r
-                       \r
-                       #if !defined(ENABLE_PDI_PROTOCOL)\r
-                               #define ENABLE_PDI_PROTOCOL\r
-                       #endif\r
-               #endif\r
-\r
-       /* Defines: */\r
-               #define TINY_NVM_BUSY_TIMEOUT_MS       100\r
-\r
-#endif\r
diff --git a/Projects/AVRISP/Lib/TPI/TINYNVM.c b/Projects/AVRISP/Lib/TPI/TINYNVM.c
new file mode 100644 (file)
index 0000000..206ea39
--- /dev/null
@@ -0,0 +1,43 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Target-related functions for the TINY target's NVM module.\r
+ */\r
+\r
+#define  INCLUDE_FROM_TINYNVM_C\r
+#include "TINYNVM.h"\r
+\r
+#if defined(ENABLE_TPI_PROTOCOL) || defined(__DOXYGEN__)\r
+\r
+// TODO\r
+\r
+#endif\r
diff --git a/Projects/AVRISP/Lib/TPI/TINYNVM.h b/Projects/AVRISP/Lib/TPI/TINYNVM.h
new file mode 100644 (file)
index 0000000..eca3c98
--- /dev/null
@@ -0,0 +1,62 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Header file for TINYNVM.c.\r
+ */\r
+\r
+#ifndef _TINY_NVM_\r
+#define _TINY_NVM_\r
+\r
+       /* Includes: */\r
+               #include <avr/io.h>\r
+               #include <avr/interrupt.h>\r
+               #include <stdbool.h>\r
+               \r
+               #include <LUFA/Common/Common.h>\r
+               \r
+               #include "TPIProtocol.h"\r
+               #include "TPITarget.h"\r
+       \r
+       /* Preprocessor Checks: */\r
+               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
+                       #undef ENABLE_ISP_PROTOCOL\r
+                       #undef ENABLE_TPI_PROTOCOL\r
+                       \r
+                       #if !defined(ENABLE_PDI_PROTOCOL)\r
+                               #define ENABLE_PDI_PROTOCOL\r
+                       #endif\r
+               #endif\r
+\r
+       /* Defines: */\r
+               #define TINY_NVM_BUSY_TIMEOUT_MS       100\r
+\r
+#endif\r
diff --git a/Projects/AVRISP/Lib/TPI/TPIProtocol.c b/Projects/AVRISP/Lib/TPI/TPIProtocol.c
new file mode 100644 (file)
index 0000000..a95e94b
--- /dev/null
@@ -0,0 +1,44 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  TPI Protocol handler, to process V2 Protocol wrapped TPI commands used in Atmel programmer devices.\r
+ */\r
+\r
+#define  INCLUDE_FROM_TPIPROTOCOL_C\r
+#include "TPIProtocol.h"\r
+\r
+#if defined(ENABLE_TPI_PROTOCOL) || defined(__DOXYGEN__)\r
+#warning TPI Programming Protocol is currently incomplete and is not suitable for general use.\r
+\r
+// TODO\r
+\r
+#endif\r
diff --git a/Projects/AVRISP/Lib/TPI/TPIProtocol.h b/Projects/AVRISP/Lib/TPI/TPIProtocol.h
new file mode 100644 (file)
index 0000000..2b6849c
--- /dev/null
@@ -0,0 +1,58 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Header file for TPIProtocol.c.\r
+ */\r
+\r
+#ifndef _TPI_PROTOCOL_\r
+#define _TPI_PROTOCOL_\r
+\r
+       /* Includes: */\r
+               #include <avr/io.h>\r
+               #include <util/delay.h>\r
+               #include <stdio.h>\r
+       \r
+               #include "V2Protocol.h"\r
+               #include "TPITarget.h"\r
+               #include "TINYNVM.h"\r
+\r
+       /* Preprocessor Checks: */\r
+               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
+                       #undef ENABLE_ISP_PROTOCOL\r
+                       #undef ENABLE_TPI_PROTOCOL\r
+                       \r
+                       #if !defined(ENABLE_PDI_PROTOCOL)\r
+                               #define ENABLE_PDI_PROTOCOL\r
+                       #endif\r
+               #endif\r
+               \r
+#endif\r
diff --git a/Projects/AVRISP/Lib/TPI/TPITarget.c b/Projects/AVRISP/Lib/TPI/TPITarget.c
new file mode 100644 (file)
index 0000000..464d403
--- /dev/null
@@ -0,0 +1,338 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Target-related functions for the TPI Protocol decoder.\r
+ */\r
+\r
+#define  INCLUDE_FROM_TPITARGET_C\r
+#include "TPITarget.h"\r
+\r
+#if defined(ENABLE_TPI_PROTOCOL) || defined(__DOXYGEN__)\r
+\r
+/** Flag to indicate if the USART is currently in Tx or Rx mode. */\r
+volatile bool               IsSending;\r
+\r
+#if !defined(TPI_VIA_HARDWARE_USART)\r
+/** Software USART raw frame bits for transmission/reception. */\r
+volatile uint16_t           SoftUSART_Data;\r
+\r
+/** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */\r
+#define SoftUSART_BitCount  GPIOR2\r
+\r
+\r
+/** ISR to manage the software USART when bit-banged USART mode is selected. */\r
+ISR(TIMER1_CAPT_vect, ISR_BLOCK)\r
+{\r
+       /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
+       BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;\r
+\r
+       /* If not sending or receiving, just exit */\r
+       if (!(SoftUSART_BitCount))\r
+         return;\r
+\r
+       /* Check to see if we are at a rising or falling edge of the clock */\r
+       if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)\r
+       {\r
+               /* If at rising clock edge and we are in send mode, abort */\r
+               if (IsSending)\r
+                 return;\r
+                 \r
+               /* Wait for the start bit when receiving */\r
+               if ((SoftUSART_BitCount == BITS_IN_TPI_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))\r
+                 return;\r
+       \r
+               /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
+                * be discarded leaving the data to be byte-aligned for quick access */\r
+               if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)\r
+                 SoftUSART_Data |= (1 << (BITS_IN_TPI_FRAME - 1));\r
+\r
+               SoftUSART_Data >>= 1;\r
+               SoftUSART_BitCount--;\r
+       }\r
+       else\r
+       {\r
+               /* If at falling clock edge and we are in receive mode, abort */\r
+               if (!IsSending)\r
+                 return;\r
+\r
+               /* Set the data line to the next bit value */\r
+               if (SoftUSART_Data & 0x01)\r
+                 BITBANG_TPIDATA_PORT |=  BITBANG_TPIDATA_MASK;\r
+               else\r
+                 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;                  \r
+\r
+               SoftUSART_Data >>= 1;\r
+               SoftUSART_BitCount--;\r
+       }\r
+}\r
+#endif\r
+\r
+/** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */\r
+void TPITarget_EnableTargetTPI(void)\r
+{\r
+       /* Set /RESET line low for at least 90ns to enable TPI functionality */\r
+       RESET_LINE_DDR  |= RESET_LINE_MASK;\r
+       RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
+       asm volatile ("NOP"::);\r
+       asm volatile ("NOP"::);\r
+\r
+#if defined(TPI_VIA_HARDWARE_USART)\r
+       /* Set Tx and XCK as outputs, Rx as input */\r
+       DDRD |=  (1 << 5) | (1 << 3);\r
+       DDRD &= ~(1 << 2);\r
+               \r
+       /* Set up the synchronous USART for XMEGA communications - \r
+          8 data bits, even parity, 2 stop bits */\r
+       UBRR1  = (F_CPU / 1000000UL);\r
+       UCSR1B = (1 << TXEN1);\r
+       UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
+\r
+       /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
+       TPITarget_SendBreak();\r
+       TPITarget_SendBreak();\r
+#else\r
+       /* Set DATA and CLOCK lines to outputs */\r
+       BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;\r
+       BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;\r
+       \r
+       /* Set DATA line high for idle state */\r
+       BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
+\r
+       /* Fire timer capture ISR every 100 cycles to manage the software USART */\r
+       OCR1A   = 80;\r
+       TCCR1B  = (1 << WGM13) | (1 << WGM12) | (1 << CS10);\r
+       TIMSK1  = (1 << ICIE1);\r
+       \r
+       /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
+       TPITarget_SendBreak();\r
+       TPITarget_SendBreak();\r
+#endif\r
+}\r
+\r
+/** Disables the target's TPI interface, exits programming mode and starts the target's application. */\r
+void TPITarget_DisableTargetTPI(void)\r
+{\r
+#if defined(TPI_VIA_HARDWARE_USART)\r
+       /* Turn off receiver and transmitter of the USART, clear settings */\r
+       UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
+       UCSR1B  = 0;\r
+       UCSR1C  = 0;\r
+\r
+       /* Set all USART lines as input, tristate */\r
+       DDRD  &= ~((1 << 5) | (1 << 3));\r
+       PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
+#else\r
+       /* Set DATA and CLOCK lines to inputs */\r
+       BITBANG_TPIDATA_DDR   &= ~BITBANG_TPIDATA_MASK;\r
+       BITBANG_TPICLOCK_DDR  &= ~BITBANG_TPICLOCK_MASK;\r
+       \r
+       /* Tristate DATA and CLOCK lines */\r
+       BITBANG_TPIDATA_PORT  &= ~BITBANG_TPIDATA_MASK;\r
+       BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;\r
+#endif\r
+\r
+       /* Tristate target /RESET line */\r
+       RESET_LINE_DDR  &= ~RESET_LINE_MASK;\r
+       RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
+}\r
+\r
+/** Sends a byte via the USART.\r
+ *\r
+ *  \param[in] Byte  Byte to send through the USART\r
+ */\r
+void TPITarget_SendByte(const uint8_t Byte)\r
+{\r
+#if defined(TPI_VIA_HARDWARE_USART)\r
+       /* Switch to Tx mode if currently in Rx mode */\r
+       if (!(IsSending))\r
+       {\r
+               PORTD  |=  (1 << 3);\r
+               DDRD   |=  (1 << 3);\r
+\r
+               UCSR1B |=  (1 << TXEN1);\r
+               UCSR1B &= ~(1 << RXEN1);\r
+               \r
+               IsSending = true;\r
+       }\r
+       \r
+       /* Wait until there is space in the hardware Tx buffer before writing */\r
+       while (!(UCSR1A & (1 << UDRE1)));\r
+       UCSR1A |= (1 << TXC1);\r
+       UDR1    = Byte;\r
+#else\r
+       /* Switch to Tx mode if currently in Rx mode */\r
+       if (!(IsSending))\r
+       {\r
+               BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
+               BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;\r
+\r
+               IsSending = true;\r
+       }\r
+\r
+       /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */\r
+       uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));\r
+\r
+       /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */\r
+       uint8_t ParityData    = Byte;\r
+       while (ParityData)\r
+       {\r
+               NewUSARTData ^= (1 << 9);\r
+               ParityData   &= (ParityData - 1);\r
+       }\r
+\r
+       /* Wait until transmitter is idle before writing new data */\r
+       while (SoftUSART_BitCount);\r
+\r
+       /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
+       SoftUSART_Data     = NewUSARTData;\r
+       SoftUSART_BitCount = BITS_IN_TPI_FRAME;\r
+#endif\r
+}\r
+\r
+/** Receives a byte via the software USART, blocking until data is received.\r
+ *\r
+ *  \return Received byte from the USART\r
+ */\r
+uint8_t TPITarget_ReceiveByte(void)\r
+{\r
+#if defined(TPI_VIA_HARDWARE_USART)\r
+       /* Switch to Rx mode if currently in Tx mode */\r
+       if (IsSending)\r
+       {\r
+               while (!(UCSR1A & (1 << TXC1)));\r
+               UCSR1A |=  (1 << TXC1);\r
+\r
+               UCSR1B &= ~(1 << TXEN1);\r
+               UCSR1B |=  (1 << RXEN1);\r
+\r
+               DDRD   &= ~(1 << 3);\r
+               PORTD  &= ~(1 << 3);\r
+               \r
+               IsSending = false;\r
+       }\r
+\r
+       /* Wait until a byte has been received before reading */\r
+       while (!(UCSR1A & (1 << RXC1)));\r
+       return UDR1;\r
+#else\r
+       /* Switch to Rx mode if currently in Tx mode */\r
+       if (IsSending)\r
+       {\r
+               while (SoftUSART_BitCount);\r
+\r
+               BITBANG_TPIDATA_DDR  &= ~BITBANG_TPIDATA_MASK;\r
+               BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;\r
+\r
+               IsSending = false;\r
+       }\r
+\r
+       /* Wait until a byte has been received before reading */\r
+       SoftUSART_BitCount = BITS_IN_TPI_FRAME;\r
+       while (SoftUSART_BitCount);\r
+       \r
+       /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */\r
+       return (uint8_t)SoftUSART_Data;\r
+#endif\r
+}\r
+\r
+/** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */\r
+void TPITarget_SendBreak(void)\r
+{\r
+#if defined(TPI_VIA_HARDWARE_USART)\r
+       /* Switch to Tx mode if currently in Rx mode */\r
+       if (!(IsSending))\r
+       {\r
+               PORTD  |=  (1 << 3);\r
+               DDRD   |=  (1 << 3);\r
+\r
+               UCSR1B &= ~(1 << RXEN1);\r
+               UCSR1B |=  (1 << TXEN1);\r
+               \r
+               IsSending = true;\r
+       }\r
+\r
+       /* Need to do nothing for a full frame to send a BREAK */\r
+       for (uint8_t i = 0; i < BITS_IN_TPI_FRAME; i++)\r
+       {\r
+               /* Wait for a full cycle of the clock */\r
+               while (PIND & (1 << 5));\r
+               while (!(PIND & (1 << 5)));\r
+       }\r
+#else\r
+       /* Switch to Tx mode if currently in Rx mode */\r
+       if (!(IsSending))\r
+       {\r
+               BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
+               BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;\r
+\r
+               IsSending = true;\r
+       }\r
+       \r
+       while (SoftUSART_BitCount);\r
+\r
+       /* Need to do nothing for a full frame to send a BREAK */\r
+       SoftUSART_Data     = 0x0FFF;\r
+       SoftUSART_BitCount = BITS_IN_TPI_FRAME;\r
+#endif\r
+}\r
+\r
+/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC\r
+ *  calculation.\r
+ *\r
+ *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
+ */\r
+bool TPITarget_WaitWhileNVMBusBusy(void)\r
+{\r
+       TCNT0 = 0;\r
+       TIFR0 = (1 << OCF1A);\r
+                       \r
+       uint8_t TimeoutMS = TPI_NVM_TIMEOUT_MS;\r
+       \r
+       /* Poll the STATUS register to check to see if NVM access has been enabled */\r
+       while (TimeoutMS)\r
+       {\r
+               /* Send the LDCS command to read the TPI STATUS register to see the NVM bus is active */\r
+               TPITarget_SendByte(TPI_CMD_SLDCS | TPI_STATUS_REG);\r
+               if (TPITarget_ReceiveByte() & TPI_STATUS_NVM)\r
+                 return true;\r
+\r
+               if (TIFR0 & (1 << OCF1A))\r
+               {\r
+                       TIFR0 = (1 << OCF1A);\r
+                       TimeoutMS--;\r
+               }\r
+       }\r
+       \r
+       return false;\r
+}\r
+\r
+#endif\r
diff --git a/Projects/AVRISP/Lib/TPI/TPITarget.h b/Projects/AVRISP/Lib/TPI/TPITarget.h
new file mode 100644 (file)
index 0000000..596bdce
--- /dev/null
@@ -0,0 +1,101 @@
+/*\r
+             LUFA Library\r
+     Copyright (C) Dean Camera, 2009.\r
+              \r
+  dean [at] fourwalledcubicle [dot] com\r
+      www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+  Permission to use, copy, modify, and distribute this software\r
+  and its documentation for any purpose and without fee is hereby\r
+  granted, provided that the above copyright notice appear in all\r
+  copies and that both that the copyright notice and this\r
+  permission notice and warranty disclaimer appear in supporting\r
+  documentation, and that the name of the author not be used in\r
+  advertising or publicity pertaining to distribution of the\r
+  software without specific, written prior permission.\r
+\r
+  The author disclaim all warranties with regard to this\r
+  software, including all implied warranties of merchantability\r
+  and fitness.  In no event shall the author be liable for any\r
+  special, indirect or consequential damages or any damages\r
+  whatsoever resulting from loss of use, data or profits, whether\r
+  in an action of contract, negligence or other tortious action,\r
+  arising out of or in connection with the use or performance of\r
+  this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ *  Header file for TPITarget.c.\r
+ */\r
+\r
+#ifndef _TPI_TARGET_\r
+#define _TPI_TARGET_\r
+\r
+       /* Includes: */\r
+               #include <avr/io.h>\r
+               #include <avr/interrupt.h>\r
+               #include <stdbool.h>\r
+               \r
+               #include <LUFA/Common/Common.h>\r
+       \r
+       /* Preprocessor Checks: */\r
+               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
+                       #undef ENABLE_ISP_PROTOCOL\r
+                       #undef ENABLE_TPI_PROTOCOL\r
+                       \r
+                       #if !defined(ENABLE_PDI_PROTOCOL)\r
+                               #define ENABLE_PDI_PROTOCOL\r
+                       #endif\r
+               #endif\r
+\r
+       /* Defines: */\r
+               #define BITBANG_TPIDATA_PORT     PORTB\r
+               #define BITBANG_TPIDATA_DDR      DDRB\r
+               #define BITBANG_TPIDATA_PIN      PINB\r
+               #define BITBANG_TPIDATA_MASK     (1 << 3)\r
+                       \r
+               #define BITBANG_TPICLOCK_PORT    PORTB\r
+               #define BITBANG_TPICLOCK_DDR     DDRB\r
+               #define BITBANG_TPICLOCK_PIN     PINB\r
+               #define BITBANG_TPICLOCK_MASK    (1 << 1)\r
+               \r
+               /** Total number of bits in a single USART frame */\r
+               #define BITS_IN_TPI_FRAME        12\r
+               \r
+               /** Timeout in milliseconds of a PDI busy-wait command */\r
+               #define TPI_NVM_TIMEOUT_MS       100\r
+\r
+               #define TPI_CMD_SLD              0x20\r
+               #define TPI_CMD_SST              0x60\r
+               #define TPI_CMD_SSTPR            0x68\r
+               #define TPI_CMD_SIN              0x10\r
+               #define TPI_CMD_SOUT             0x90\r
+               #define TPI_CMD_SLDCS            0x80\r
+               #define TPI_CMD_SSTCS            0xC0\r
+               #define TPI_CMD_SKEY             0xE0\r
+\r
+               #define TPI_STATUS_REG           0x00\r
+               #define TPI_CTRL_REG             0x02\r
+               #define TPI_ID_REG               0x0F\r
+               \r
+               #define TPI_STATUS_NVM           (1 << 1)\r
+\r
+               #define TPI_NVMENABLE_KEY        (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}\r
+\r
+               #define TPI_POINTER_INDIRECT     0\r
+               #define TPI_POINTER_INDIRECT_PI  (1 << 2)\r
+                               \r
+       /* Function Prototypes: */\r
+               void    TPITarget_EnableTargetTPI(void);\r
+               void    TPITarget_DisableTargetTPI(void);\r
+               void    TPITarget_SendByte(const uint8_t Byte);\r
+               uint8_t TPITarget_ReceiveByte(void);\r
+               void    TPITarget_SendBreak(void);\r
+               bool    TPITarget_WaitWhileNVMBusBusy(void);\r
+\r
+#endif\r
diff --git a/Projects/AVRISP/Lib/TPIProtocol.c b/Projects/AVRISP/Lib/TPIProtocol.c
deleted file mode 100644 (file)
index a95e94b..0000000
+++ /dev/null
@@ -1,44 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  TPI Protocol handler, to process V2 Protocol wrapped TPI commands used in Atmel programmer devices.\r
- */\r
-\r
-#define  INCLUDE_FROM_TPIPROTOCOL_C\r
-#include "TPIProtocol.h"\r
-\r
-#if defined(ENABLE_TPI_PROTOCOL) || defined(__DOXYGEN__)\r
-#warning TPI Programming Protocol is currently incomplete and is not suitable for general use.\r
-\r
-// TODO\r
-\r
-#endif\r
diff --git a/Projects/AVRISP/Lib/TPIProtocol.h b/Projects/AVRISP/Lib/TPIProtocol.h
deleted file mode 100644 (file)
index 2b6849c..0000000
+++ /dev/null
@@ -1,58 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  Header file for TPIProtocol.c.\r
- */\r
-\r
-#ifndef _TPI_PROTOCOL_\r
-#define _TPI_PROTOCOL_\r
-\r
-       /* Includes: */\r
-               #include <avr/io.h>\r
-               #include <util/delay.h>\r
-               #include <stdio.h>\r
-       \r
-               #include "V2Protocol.h"\r
-               #include "TPITarget.h"\r
-               #include "TINYNVM.h"\r
-\r
-       /* Preprocessor Checks: */\r
-               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
-                       #undef ENABLE_ISP_PROTOCOL\r
-                       #undef ENABLE_TPI_PROTOCOL\r
-                       \r
-                       #if !defined(ENABLE_PDI_PROTOCOL)\r
-                               #define ENABLE_PDI_PROTOCOL\r
-                       #endif\r
-               #endif\r
-               \r
-#endif\r
diff --git a/Projects/AVRISP/Lib/TPITarget.c b/Projects/AVRISP/Lib/TPITarget.c
deleted file mode 100644 (file)
index 464d403..0000000
+++ /dev/null
@@ -1,338 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  Target-related functions for the TPI Protocol decoder.\r
- */\r
-\r
-#define  INCLUDE_FROM_TPITARGET_C\r
-#include "TPITarget.h"\r
-\r
-#if defined(ENABLE_TPI_PROTOCOL) || defined(__DOXYGEN__)\r
-\r
-/** Flag to indicate if the USART is currently in Tx or Rx mode. */\r
-volatile bool               IsSending;\r
-\r
-#if !defined(TPI_VIA_HARDWARE_USART)\r
-/** Software USART raw frame bits for transmission/reception. */\r
-volatile uint16_t           SoftUSART_Data;\r
-\r
-/** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */\r
-#define SoftUSART_BitCount  GPIOR2\r
-\r
-\r
-/** ISR to manage the software USART when bit-banged USART mode is selected. */\r
-ISR(TIMER1_CAPT_vect, ISR_BLOCK)\r
-{\r
-       /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
-       BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;\r
-\r
-       /* If not sending or receiving, just exit */\r
-       if (!(SoftUSART_BitCount))\r
-         return;\r
-\r
-       /* Check to see if we are at a rising or falling edge of the clock */\r
-       if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)\r
-       {\r
-               /* If at rising clock edge and we are in send mode, abort */\r
-               if (IsSending)\r
-                 return;\r
-                 \r
-               /* Wait for the start bit when receiving */\r
-               if ((SoftUSART_BitCount == BITS_IN_TPI_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))\r
-                 return;\r
-       \r
-               /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
-                * be discarded leaving the data to be byte-aligned for quick access */\r
-               if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)\r
-                 SoftUSART_Data |= (1 << (BITS_IN_TPI_FRAME - 1));\r
-\r
-               SoftUSART_Data >>= 1;\r
-               SoftUSART_BitCount--;\r
-       }\r
-       else\r
-       {\r
-               /* If at falling clock edge and we are in receive mode, abort */\r
-               if (!IsSending)\r
-                 return;\r
-\r
-               /* Set the data line to the next bit value */\r
-               if (SoftUSART_Data & 0x01)\r
-                 BITBANG_TPIDATA_PORT |=  BITBANG_TPIDATA_MASK;\r
-               else\r
-                 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;                  \r
-\r
-               SoftUSART_Data >>= 1;\r
-               SoftUSART_BitCount--;\r
-       }\r
-}\r
-#endif\r
-\r
-/** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */\r
-void TPITarget_EnableTargetTPI(void)\r
-{\r
-       /* Set /RESET line low for at least 90ns to enable TPI functionality */\r
-       RESET_LINE_DDR  |= RESET_LINE_MASK;\r
-       RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
-       asm volatile ("NOP"::);\r
-       asm volatile ("NOP"::);\r
-\r
-#if defined(TPI_VIA_HARDWARE_USART)\r
-       /* Set Tx and XCK as outputs, Rx as input */\r
-       DDRD |=  (1 << 5) | (1 << 3);\r
-       DDRD &= ~(1 << 2);\r
-               \r
-       /* Set up the synchronous USART for XMEGA communications - \r
-          8 data bits, even parity, 2 stop bits */\r
-       UBRR1  = (F_CPU / 1000000UL);\r
-       UCSR1B = (1 << TXEN1);\r
-       UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
-\r
-       /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
-       TPITarget_SendBreak();\r
-       TPITarget_SendBreak();\r
-#else\r
-       /* Set DATA and CLOCK lines to outputs */\r
-       BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;\r
-       BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;\r
-       \r
-       /* Set DATA line high for idle state */\r
-       BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
-\r
-       /* Fire timer capture ISR every 100 cycles to manage the software USART */\r
-       OCR1A   = 80;\r
-       TCCR1B  = (1 << WGM13) | (1 << WGM12) | (1 << CS10);\r
-       TIMSK1  = (1 << ICIE1);\r
-       \r
-       /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
-       TPITarget_SendBreak();\r
-       TPITarget_SendBreak();\r
-#endif\r
-}\r
-\r
-/** Disables the target's TPI interface, exits programming mode and starts the target's application. */\r
-void TPITarget_DisableTargetTPI(void)\r
-{\r
-#if defined(TPI_VIA_HARDWARE_USART)\r
-       /* Turn off receiver and transmitter of the USART, clear settings */\r
-       UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
-       UCSR1B  = 0;\r
-       UCSR1C  = 0;\r
-\r
-       /* Set all USART lines as input, tristate */\r
-       DDRD  &= ~((1 << 5) | (1 << 3));\r
-       PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
-#else\r
-       /* Set DATA and CLOCK lines to inputs */\r
-       BITBANG_TPIDATA_DDR   &= ~BITBANG_TPIDATA_MASK;\r
-       BITBANG_TPICLOCK_DDR  &= ~BITBANG_TPICLOCK_MASK;\r
-       \r
-       /* Tristate DATA and CLOCK lines */\r
-       BITBANG_TPIDATA_PORT  &= ~BITBANG_TPIDATA_MASK;\r
-       BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;\r
-#endif\r
-\r
-       /* Tristate target /RESET line */\r
-       RESET_LINE_DDR  &= ~RESET_LINE_MASK;\r
-       RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
-}\r
-\r
-/** Sends a byte via the USART.\r
- *\r
- *  \param[in] Byte  Byte to send through the USART\r
- */\r
-void TPITarget_SendByte(const uint8_t Byte)\r
-{\r
-#if defined(TPI_VIA_HARDWARE_USART)\r
-       /* Switch to Tx mode if currently in Rx mode */\r
-       if (!(IsSending))\r
-       {\r
-               PORTD  |=  (1 << 3);\r
-               DDRD   |=  (1 << 3);\r
-\r
-               UCSR1B |=  (1 << TXEN1);\r
-               UCSR1B &= ~(1 << RXEN1);\r
-               \r
-               IsSending = true;\r
-       }\r
-       \r
-       /* Wait until there is space in the hardware Tx buffer before writing */\r
-       while (!(UCSR1A & (1 << UDRE1)));\r
-       UCSR1A |= (1 << TXC1);\r
-       UDR1    = Byte;\r
-#else\r
-       /* Switch to Tx mode if currently in Rx mode */\r
-       if (!(IsSending))\r
-       {\r
-               BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
-               BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;\r
-\r
-               IsSending = true;\r
-       }\r
-\r
-       /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */\r
-       uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));\r
-\r
-       /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */\r
-       uint8_t ParityData    = Byte;\r
-       while (ParityData)\r
-       {\r
-               NewUSARTData ^= (1 << 9);\r
-               ParityData   &= (ParityData - 1);\r
-       }\r
-\r
-       /* Wait until transmitter is idle before writing new data */\r
-       while (SoftUSART_BitCount);\r
-\r
-       /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
-       SoftUSART_Data     = NewUSARTData;\r
-       SoftUSART_BitCount = BITS_IN_TPI_FRAME;\r
-#endif\r
-}\r
-\r
-/** Receives a byte via the software USART, blocking until data is received.\r
- *\r
- *  \return Received byte from the USART\r
- */\r
-uint8_t TPITarget_ReceiveByte(void)\r
-{\r
-#if defined(TPI_VIA_HARDWARE_USART)\r
-       /* Switch to Rx mode if currently in Tx mode */\r
-       if (IsSending)\r
-       {\r
-               while (!(UCSR1A & (1 << TXC1)));\r
-               UCSR1A |=  (1 << TXC1);\r
-\r
-               UCSR1B &= ~(1 << TXEN1);\r
-               UCSR1B |=  (1 << RXEN1);\r
-\r
-               DDRD   &= ~(1 << 3);\r
-               PORTD  &= ~(1 << 3);\r
-               \r
-               IsSending = false;\r
-       }\r
-\r
-       /* Wait until a byte has been received before reading */\r
-       while (!(UCSR1A & (1 << RXC1)));\r
-       return UDR1;\r
-#else\r
-       /* Switch to Rx mode if currently in Tx mode */\r
-       if (IsSending)\r
-       {\r
-               while (SoftUSART_BitCount);\r
-\r
-               BITBANG_TPIDATA_DDR  &= ~BITBANG_TPIDATA_MASK;\r
-               BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;\r
-\r
-               IsSending = false;\r
-       }\r
-\r
-       /* Wait until a byte has been received before reading */\r
-       SoftUSART_BitCount = BITS_IN_TPI_FRAME;\r
-       while (SoftUSART_BitCount);\r
-       \r
-       /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */\r
-       return (uint8_t)SoftUSART_Data;\r
-#endif\r
-}\r
-\r
-/** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */\r
-void TPITarget_SendBreak(void)\r
-{\r
-#if defined(TPI_VIA_HARDWARE_USART)\r
-       /* Switch to Tx mode if currently in Rx mode */\r
-       if (!(IsSending))\r
-       {\r
-               PORTD  |=  (1 << 3);\r
-               DDRD   |=  (1 << 3);\r
-\r
-               UCSR1B &= ~(1 << RXEN1);\r
-               UCSR1B |=  (1 << TXEN1);\r
-               \r
-               IsSending = true;\r
-       }\r
-\r
-       /* Need to do nothing for a full frame to send a BREAK */\r
-       for (uint8_t i = 0; i < BITS_IN_TPI_FRAME; i++)\r
-       {\r
-               /* Wait for a full cycle of the clock */\r
-               while (PIND & (1 << 5));\r
-               while (!(PIND & (1 << 5)));\r
-       }\r
-#else\r
-       /* Switch to Tx mode if currently in Rx mode */\r
-       if (!(IsSending))\r
-       {\r
-               BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
-               BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;\r
-\r
-               IsSending = true;\r
-       }\r
-       \r
-       while (SoftUSART_BitCount);\r
-\r
-       /* Need to do nothing for a full frame to send a BREAK */\r
-       SoftUSART_Data     = 0x0FFF;\r
-       SoftUSART_BitCount = BITS_IN_TPI_FRAME;\r
-#endif\r
-}\r
-\r
-/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC\r
- *  calculation.\r
- *\r
- *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
- */\r
-bool TPITarget_WaitWhileNVMBusBusy(void)\r
-{\r
-       TCNT0 = 0;\r
-       TIFR0 = (1 << OCF1A);\r
-                       \r
-       uint8_t TimeoutMS = TPI_NVM_TIMEOUT_MS;\r
-       \r
-       /* Poll the STATUS register to check to see if NVM access has been enabled */\r
-       while (TimeoutMS)\r
-       {\r
-               /* Send the LDCS command to read the TPI STATUS register to see the NVM bus is active */\r
-               TPITarget_SendByte(TPI_CMD_SLDCS | TPI_STATUS_REG);\r
-               if (TPITarget_ReceiveByte() & TPI_STATUS_NVM)\r
-                 return true;\r
-\r
-               if (TIFR0 & (1 << OCF1A))\r
-               {\r
-                       TIFR0 = (1 << OCF1A);\r
-                       TimeoutMS--;\r
-               }\r
-       }\r
-       \r
-       return false;\r
-}\r
-\r
-#endif\r
diff --git a/Projects/AVRISP/Lib/TPITarget.h b/Projects/AVRISP/Lib/TPITarget.h
deleted file mode 100644 (file)
index 596bdce..0000000
+++ /dev/null
@@ -1,101 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  Header file for TPITarget.c.\r
- */\r
-\r
-#ifndef _TPI_TARGET_\r
-#define _TPI_TARGET_\r
-\r
-       /* Includes: */\r
-               #include <avr/io.h>\r
-               #include <avr/interrupt.h>\r
-               #include <stdbool.h>\r
-               \r
-               #include <LUFA/Common/Common.h>\r
-       \r
-       /* Preprocessor Checks: */\r
-               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
-                       #undef ENABLE_ISP_PROTOCOL\r
-                       #undef ENABLE_TPI_PROTOCOL\r
-                       \r
-                       #if !defined(ENABLE_PDI_PROTOCOL)\r
-                               #define ENABLE_PDI_PROTOCOL\r
-                       #endif\r
-               #endif\r
-\r
-       /* Defines: */\r
-               #define BITBANG_TPIDATA_PORT     PORTB\r
-               #define BITBANG_TPIDATA_DDR      DDRB\r
-               #define BITBANG_TPIDATA_PIN      PINB\r
-               #define BITBANG_TPIDATA_MASK     (1 << 3)\r
-                       \r
-               #define BITBANG_TPICLOCK_PORT    PORTB\r
-               #define BITBANG_TPICLOCK_DDR     DDRB\r
-               #define BITBANG_TPICLOCK_PIN     PINB\r
-               #define BITBANG_TPICLOCK_MASK    (1 << 1)\r
-               \r
-               /** Total number of bits in a single USART frame */\r
-               #define BITS_IN_TPI_FRAME        12\r
-               \r
-               /** Timeout in milliseconds of a PDI busy-wait command */\r
-               #define TPI_NVM_TIMEOUT_MS       100\r
-\r
-               #define TPI_CMD_SLD              0x20\r
-               #define TPI_CMD_SST              0x60\r
-               #define TPI_CMD_SSTPR            0x68\r
-               #define TPI_CMD_SIN              0x10\r
-               #define TPI_CMD_SOUT             0x90\r
-               #define TPI_CMD_SLDCS            0x80\r
-               #define TPI_CMD_SSTCS            0xC0\r
-               #define TPI_CMD_SKEY             0xE0\r
-\r
-               #define TPI_STATUS_REG           0x00\r
-               #define TPI_CTRL_REG             0x02\r
-               #define TPI_ID_REG               0x0F\r
-               \r
-               #define TPI_STATUS_NVM           (1 << 1)\r
-\r
-               #define TPI_NVMENABLE_KEY        (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}\r
-\r
-               #define TPI_POINTER_INDIRECT     0\r
-               #define TPI_POINTER_INDIRECT_PI  (1 << 2)\r
-                               \r
-       /* Function Prototypes: */\r
-               void    TPITarget_EnableTargetTPI(void);\r
-               void    TPITarget_DisableTargetTPI(void);\r
-               void    TPITarget_SendByte(const uint8_t Byte);\r
-               uint8_t TPITarget_ReceiveByte(void);\r
-               void    TPITarget_SendBreak(void);\r
-               bool    TPITarget_WaitWhileNVMBusBusy(void);\r
-\r
-#endif\r
diff --git a/Projects/AVRISP/Lib/XMEGANVM.c b/Projects/AVRISP/Lib/XMEGANVM.c
deleted file mode 100644 (file)
index ed8719c..0000000
+++ /dev/null
@@ -1,332 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  Target-related functions for the XMEGA target's NVM module.\r
- */\r
-\r
-#define  INCLUDE_FROM_XMEGA_NVM_C\r
-#include "XMEGANVM.h"\r
-\r
-#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)\r
-\r
-/** Sends the given NVM register address to the target.\r
- *\r
- *  \param[in] Register  NVM register whose absolute address is to be sent\r
- */\r
-void XMEGANVM_SendNVMRegAddress(const uint8_t Register)\r
-{\r
-       /* Determine the absolute register address from the NVM base memory address and the NVM register address */\r
-       uint32_t Address = XPROG_Param_NVMBase | Register;\r
-\r
-       /* Send the calculated 32-bit address to the target, LSB first */\r
-       XMEGANVM_SendAddress(Address);\r
-}\r
-\r
-/** Sends the given 32-bit absolute address to the target.\r
- *\r
- *  \param[in] AbsoluteAddress  Absolute address to send to the target\r
- */\r
-void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)\r
-{\r
-       /* Send the given 32-bit address to the target, LSB first */\r
-       PDITarget_SendByte(AbsoluteAddress &  0xFF);\r
-       PDITarget_SendByte(AbsoluteAddress >> 8);\r
-       PDITarget_SendByte(AbsoluteAddress >> 16);\r
-       PDITarget_SendByte(AbsoluteAddress >> 24);\r
-}\r
-\r
-/** Waits while the target's NVM controller is busy performing an operation, exiting if the\r
- *  timeout period expires.\r
- *\r
- *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
- */\r
-bool XMEGANVM_WaitWhileNVMControllerBusy(void)\r
-{\r
-       TCNT0 = 0;\r
-       TIFR0 = (1 << OCF1A);\r
-                       \r
-       uint8_t TimeoutMS = XMEGA_NVM_BUSY_TIMEOUT_MS;\r
-       \r
-       /* Poll the NVM STATUS register while the NVM controller is busy */\r
-       while (TimeoutMS)\r
-       {\r
-               /* Send a LDS command to read the NVM STATUS register to check the BUSY flag */\r
-               PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
-               XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_STATUS);\r
-               \r
-               /* Check to see if the BUSY flag is still set */\r
-               if (!(PDITarget_ReceiveByte() & (1 << 7)))\r
-                 return true;\r
-\r
-               if (TIFR0 & (1 << OCF1A))\r
-               {\r
-                       TIFR0 = (1 << OCF1A);\r
-                       TimeoutMS--;\r
-               }\r
-       }\r
-       \r
-       return false;\r
-}\r
-\r
-/** Retrieves the CRC value of the given memory space.\r
- *\r
- *  \param[in]  CRCCommand  NVM CRC command to issue to the target\r
- *  \param[out] CRCDest     CRC Destination when read from the target\r
- *\r
- *  \return Boolean true if the command sequence complete successfully\r
- */\r
-bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)\r
-{\r
-       /* Wait until the NVM controller is no longer busy */\r
-       if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
-         return false;\r
-         \r
-       /* Set the NVM command to the correct CRC read command */\r
-       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
-       PDITarget_SendByte(CRCCommand);\r
-\r
-       /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */\r
-       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);\r
-       PDITarget_SendByte(1 << 0);\r
-\r
-       /* Wait until the NVM bus is ready again */\r
-       if (!(PDITarget_WaitWhileNVMBusBusy()))\r
-         return false;\r
-\r
-       /* Wait until the NVM controller is no longer busy */\r
-       if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
-         return false;\r
-       \r
-       *CRCDest = 0;\r
-       \r
-       /* Read the first generated CRC byte value */\r
-       PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
-       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0);\r
-       *CRCDest  = PDITarget_ReceiveByte();\r
-\r
-       /* Read the second generated CRC byte value */\r
-       PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
-       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT1);\r
-       *CRCDest |= ((uint16_t)PDITarget_ReceiveByte() << 8);\r
-\r
-       /* Read the third generated CRC byte value */\r
-       PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
-       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT2);\r
-       *CRCDest |= ((uint32_t)PDITarget_ReceiveByte() << 16);\r
-       \r
-       return true;\r
-}\r
-\r
-/** Reads memory from the target's memory spaces.\r
- *\r
- *  \param[in]  ReadAddress  Start address to read from within the target's address space\r
- *  \param[out] ReadBuffer   Buffer to store read data into\r
- *  \param[in]  ReadSize     Number of bytes to read\r
- *\r
- *  \return Boolean true if the command sequence complete successfully\r
- */\r
-bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize)\r
-{\r
-       /* Wait until the NVM controller is no longer busy */\r
-       if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
-         return false;\r
-       \r
-       /* Send the READNVM command to the NVM controller for reading of an arbitrary location */\r
-       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
-       PDITarget_SendByte(XMEGA_NVM_CMD_READNVM);\r
-\r
-       /* Load the PDI pointer register with the start address we want to read from */\r
-       PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);\r
-       XMEGANVM_SendAddress(ReadAddress);\r
-\r
-       /* Send the REPEAT command with the specified number of bytes to read */\r
-       PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);\r
-       PDITarget_SendByte(ReadSize - 1);\r
-               \r
-       /* Send a LD command with indirect access and postincrement to read out the bytes */\r
-       PDITarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
-       for (uint16_t i = 0; i < ReadSize; i++)\r
-         *(ReadBuffer++) = PDITarget_ReceiveByte();\r
-       \r
-       return true;\r
-}\r
-\r
-/** Writes byte addressed memory to the target's memory spaces.\r
- *\r
- *  \param[in]  WriteCommand  Command to send to the device to write each memory byte\r
- *  \param[in]  WriteAddress  Start address to write to within the target's address space\r
- *  \param[in]  WriteBuffer   Buffer to source data from\r
- *\r
- *  \return Boolean true if the command sequence complete successfully\r
- */\r
-bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer)\r
-{\r
-       /* Wait until the NVM controller is no longer busy */\r
-       if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
-         return false;\r
-\r
-       /* Send the memory write command to the target */\r
-       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
-       PDITarget_SendByte(WriteCommand);\r
-       \r
-       /* Send new memory byte to the memory to the target */\r
-       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-       XMEGANVM_SendAddress(WriteAddress);\r
-       PDITarget_SendByte(*(WriteBuffer++));\r
-       \r
-       return true;\r
-}\r
-\r
-/** Writes page addressed memory to the target's memory spaces.\r
- *\r
- *  \param[in]  WriteBuffCommand  Command to send to the device to write a byte to the memory page buffer\r
- *  \param[in]  EraseBuffCommand  Command to send to the device to erase the memory page buffer\r
- *  \param[in]  WritePageCommand  Command to send to the device to write the page buffer to the destination memory\r
- *  \param[in]  PageMode          Bitfield indicating what operations need to be executed on the specified page\r
- *  \param[in]  WriteAddress      Start address to write the page data to within the target's address space\r
- *  \param[in]  WriteBuffer       Buffer to source data from\r
- *  \param[in]  WriteSize         Number of bytes to write\r
- *\r
- *  \return Boolean true if the command sequence complete successfully\r
- */\r
-bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,\r
-                               const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,\r
-                               const uint8_t* WriteBuffer, const uint16_t WriteSize)\r
-{\r
-       if (PageMode & XPRG_PAGEMODE_ERASE)\r
-       {\r
-               /* Wait until the NVM controller is no longer busy */\r
-               if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
-                 return false;\r
-\r
-               /* Send the memory buffer erase command to the target */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
-               PDITarget_SendByte(EraseBuffCommand);\r
-\r
-               /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);\r
-               PDITarget_SendByte(1 << 0);\r
-       }\r
-\r
-       if (WriteSize)\r
-       {\r
-               /* Wait until the NVM controller is no longer busy */\r
-               if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
-                 return false;\r
-\r
-               /* Send the memory buffer write command to the target */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
-               PDITarget_SendByte(WriteBuffCommand);\r
-\r
-               /* Load the PDI pointer register with the start address we want to write to */\r
-               PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);\r
-               XMEGANVM_SendAddress(WriteAddress);\r
-\r
-               /* Send the REPEAT command with the specified number of bytes to write */\r
-               PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);\r
-               PDITarget_SendByte(WriteSize - 1);\r
-                       \r
-               /* Send a ST command with indirect access and postincrement to write the bytes */\r
-               PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
-               for (uint16_t i = 0; i < WriteSize; i++)\r
-                 PDITarget_SendByte(*(WriteBuffer++));\r
-       }\r
-       \r
-       if (PageMode & XPRG_PAGEMODE_WRITE)\r
-       {\r
-               /* Wait until the NVM controller is no longer busy */\r
-               if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
-                 return false;\r
-\r
-               /* Send the memory write command to the target */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
-               PDITarget_SendByte(WritePageCommand);\r
-               \r
-               /* Send the address of the first page location to write the memory page */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               XMEGANVM_SendAddress(WriteAddress);\r
-               PDITarget_SendByte(0x00);\r
-       }\r
-\r
-       return true;\r
-}\r
-\r
-/** Erases a specific memory space of the target.\r
- *\r
- *  \param[in] EraseCommand  NVM erase command to send to the device\r
- *  \param[in] Address  Address inside the memory space to erase\r
- *\r
- *  \return Boolean true if the command sequence complete successfully\r
- */\r
-bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)\r
-{\r
-       /* Wait until the NVM controller is no longer busy */\r
-       if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
-         return false;\r
-         \r
-       /* Send the memory erase command to the target */\r
-       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-       XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
-       PDITarget_SendByte(EraseCommand);\r
-       \r
-       /* Chip erase is handled separately, since it's procedure is different to other erase types */\r
-       if (EraseCommand == XMEGA_NVM_CMD_CHIPERASE)\r
-       {\r
-               /* Set CMDEX bit in NVM CTRLA register to start the chip erase */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);\r
-               PDITarget_SendByte(1 << 0);             \r
-       }\r
-       else\r
-       {\r
-               /* Other erase modes just need us to address a byte within the target memory space */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               XMEGANVM_SendAddress(Address);  \r
-               PDITarget_SendByte(0x00);\r
-       }\r
-       \r
-       /* Wait until the NVM bus is ready again */\r
-       if (!(PDITarget_WaitWhileNVMBusBusy()))\r
-         return false;\r
-         \r
-       return true;\r
-}\r
-\r
-#endif\r
diff --git a/Projects/AVRISP/Lib/XMEGANVM.h b/Projects/AVRISP/Lib/XMEGANVM.h
deleted file mode 100644 (file)
index c31c7e8..0000000
+++ /dev/null
@@ -1,121 +0,0 @@
-/*\r
-             LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
-              \r
-  dean [at] fourwalledcubicle [dot] com\r
-      www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
-  Permission to use, copy, modify, and distribute this software\r
-  and its documentation for any purpose and without fee is hereby\r
-  granted, provided that the above copyright notice appear in all\r
-  copies and that both that the copyright notice and this\r
-  permission notice and warranty disclaimer appear in supporting\r
-  documentation, and that the name of the author not be used in\r
-  advertising or publicity pertaining to distribution of the\r
-  software without specific, written prior permission.\r
-\r
-  The author disclaim all warranties with regard to this\r
-  software, including all implied warranties of merchantability\r
-  and fitness.  In no event shall the author be liable for any\r
-  special, indirect or consequential damages or any damages\r
-  whatsoever resulting from loss of use, data or profits, whether\r
-  in an action of contract, negligence or other tortious action,\r
-  arising out of or in connection with the use or performance of\r
-  this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- *  Header file for XMEGANVM.c.\r
- */\r
-\r
-#ifndef _XMEGA_NVM__\r
-#define _XMEGA_NVM_\r
-\r
-       /* Includes: */\r
-               #include <avr/io.h>\r
-               #include <avr/interrupt.h>\r
-               #include <stdbool.h>\r
-               \r
-               #include <LUFA/Common/Common.h>\r
-               \r
-               #include "PDIProtocol.h"\r
-               #include "PDITarget.h"\r
-       \r
-       /* Preprocessor Checks: */\r
-               #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
-                       #undef ENABLE_ISP_PROTOCOL\r
-                       #undef ENABLE_TPI_PROTOCOL\r
-                       \r
-                       #if !defined(ENABLE_PDI_PROTOCOL)\r
-                               #define ENABLE_PDI_PROTOCOL\r
-                       #endif\r
-               #endif\r
-\r
-       /* Defines: */\r
-               #define XMEGA_NVM_BUSY_TIMEOUT_MS            200\r
-               \r
-               #define XMEGA_NVM_REG_ADDR0                  0x00\r
-               #define XMEGA_NVM_REG_ADDR1                  0x01\r
-               #define XMEGA_NVM_REG_ADDR2                  0x02\r
-               #define XMEGA_NVM_REG_DAT0                   0x04\r
-               #define XMEGA_NVM_REG_DAT1                   0x05\r
-               #define XMEGA_NVM_REG_DAT2                   0x06\r
-               #define XMEGA_NVM_REG_CMD                    0x0A\r
-               #define XMEGA_NVM_REG_CTRLA                  0x0B\r
-               #define XMEGA_NVM_REG_CTRLB                  0x0C\r
-               #define XMEGA_NVM_REG_INTCTRL                0x0D\r
-               #define XMEGA_NVM_REG_STATUS                 0x0F\r
-               #define XMEGA_NVM_REG_LOCKBITS               0x10\r
-               \r
-               #define XMEGA_NVM_CMD_NOOP                   0x00\r
-               #define XMEGA_NVM_CMD_CHIPERASE              0x40\r
-               #define XMEGA_NVM_CMD_READNVM                0x43\r
-               #define XMEGA_NVM_CMD_LOADFLASHPAGEBUFF      0x23\r
-               #define XMEGA_NVM_CMD_ERASEFLASHPAGEBUFF     0x26\r
-               #define XMEGA_NVM_CMD_ERASEFLASHPAGE         0x2B\r
-               #define XMEGA_NVM_CMD_WRITEFLASHPAGE         0x2E\r
-               #define XMEGA_NVM_CMD_ERASEWRITEFLASH        0x2F\r
-               #define XMEGA_NVM_CMD_FLASHCRC               0x78\r
-               #define XMEGA_NVM_CMD_ERASEAPPSEC            0x20\r
-               #define XMEGA_NVM_CMD_ERASEAPPSECPAGE        0x22\r
-               #define XMEGA_NVM_CMD_WRITEAPPSECPAGE        0x24\r
-               #define XMEGA_NVM_CMD_ERASEWRITEAPPSECPAGE   0x25\r
-               #define XMEGA_NVM_CMD_APPCRC                 0x38\r
-               #define XMEGA_NVM_CMD_ERASEBOOTSEC           0x68\r
-               #define XMEGA_NVM_CMD_ERASEBOOTSECPAGE       0x2A\r
-               #define XMEGA_NVM_CMD_WRITEBOOTSECPAGE       0x2C\r
-               #define XMEGA_NVM_CMD_ERASEWRITEBOOTSECPAGE  0x2D\r
-               #define XMEGA_NVM_CMD_BOOTCRC                0x39\r
-               #define XMEGA_NVM_CMD_READUSERSIG            0x03\r
-               #define XMEGA_NVM_CMD_ERASEUSERSIG           0x18\r
-               #define XMEGA_NVM_CMD_WRITEUSERSIG           0x1A\r
-               #define XMEGA_NVM_CMD_READCALIBRATION        0x02\r
-               #define XMEGA_NVM_CMD_READFUSE               0x07\r
-               #define XMEGA_NVM_CMD_WRITEFUSE              0x4C\r
-               #define XMEGA_NVM_CMD_WRITELOCK              0x08\r
-               #define XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF     0x33\r
-               #define XMEGA_NVM_CMD_ERASEEEPROMPAGEBUFF    0x36\r
-               #define XMEGA_NVM_CMD_ERASEEEPROM            0x30\r
-               #define XMEGA_NVM_CMD_ERASEEEPROMPAGE        0x32\r
-               #define XMEGA_NVM_CMD_WRITEEEPROMPAGE        0x34\r
-               #define XMEGA_NVM_CMD_ERASEWRITEEEPROMPAGE   0x35\r
-               #define XMEGA_NVM_CMD_READEEPROM             0x06\r
-\r
-       /* Function Prototypes: */\r
-               void XMEGANVM_SendNVMRegAddress(const uint8_t Register);\r
-               void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress);\r
-               bool XMEGANVM_WaitWhileNVMControllerBusy(void);\r
-               bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest);\r
-               bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize);\r
-               bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer);\r
-               bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,\r
-                                             const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,\r
-                                             const uint8_t* WriteBuffer, const uint16_t WriteSize);\r
-               bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address);\r
-\r
-#endif\r