+/*\r
+ LUFA Library\r
+ Copyright (C) Dean Camera, 2009.\r
+ \r
+ dean [at] fourwalledcubicle [dot] com\r
+ www.fourwalledcubicle.com\r
+*/\r
+\r
+/*\r
+ Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+\r
+ Permission to use, copy, modify, and distribute this software\r
+ and its documentation for any purpose and without fee is hereby\r
+ granted, provided that the above copyright notice appear in all\r
+ copies and that both that the copyright notice and this\r
+ permission notice and warranty disclaimer appear in supporting\r
+ documentation, and that the name of the author not be used in\r
+ advertising or publicity pertaining to distribution of the\r
+ software without specific, written prior permission.\r
+\r
+ The author disclaim all warranties with regard to this\r
+ software, including all implied warranties of merchantability\r
+ and fitness. In no event shall the author be liable for any\r
+ special, indirect or consequential damages or any damages\r
+ whatsoever resulting from loss of use, data or profits, whether\r
+ in an action of contract, negligence or other tortious action,\r
+ arising out of or in connection with the use or performance of\r
+ this software.\r
+*/\r
+\r
+/** \file\r
+ *\r
+ * Target-related functions for the target's NVM module.\r
+ */\r
+\r
+#define INCLUDE_FROM_NVMTARGET_C\r
+#include "NVMTarget.h"\r
+\r
+#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)\r
+\r
+void NVMTarget_SendNVMRegAddress(uint8_t Register)\r
+{\r
+ uint32_t Address = XPROG_Param_NVMBase | Register;\r
+\r
+ PDITarget_SendByte(Address >> 24);\r
+ PDITarget_SendByte(Address >> 26);\r
+ PDITarget_SendByte(Address >> 8);\r
+ PDITarget_SendByte(Address & 0xFF);\r
+}\r
+\r
+bool NVMTarget_WaitWhileNVMBusBusy(void)\r
+{\r
+ uint8_t AttemptsRemaining = 255;\r
+\r
+ /* Poll the STATUS register to check to see if NVM access has been enabled */\r
+ while (AttemptsRemaining--)\r
+ {\r
+ PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);\r
+ if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)\r
+ return true;\r
+ }\r
+ \r
+ return false;\r
+}\r
+\r
+void NVMTarget_WaitWhileNVMControllerBusy(void)\r
+{\r
+ /* Poll the NVM STATUS register while the NVM controller is busy */\r
+ for (;;)\r
+ {\r
+ PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_1BYTE << 2));\r
+ NVMTarget_SendNVMRegAddress(NVM_REG_STATUS);\r
+ \r
+ if (!(PDITarget_ReceiveByte() & (1 << 7)))\r
+ return;\r
+ }\r
+}\r
+\r
+uint32_t NVMTarget_GetMemoryCRC(uint8_t MemoryCommand)\r
+{\r
+ uint32_t MemoryCRC;\r
+\r
+ /* Set the NVM command to the correct CRC read command */\r
+ PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_1BYTE << 2));\r
+ NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
+ PDITarget_SendByte(MemoryCommand);\r
+\r
+ /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */\r
+ PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_1BYTE << 2));\r
+ NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);\r
+ PDITarget_SendByte(1 << 0);\r
+\r
+ /* Wait until the NVM bus and controller is no longer busy */\r
+ NVMTarget_WaitWhileNVMBusBusy();\r
+ NVMTarget_WaitWhileNVMControllerBusy();\r
+ \r
+ /* Read the three byte generated CRC value */\r
+ PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_3BYTES << 2));\r
+ NVMTarget_SendNVMRegAddress(NVM_REG_DAT0);\r
+ MemoryCRC = PDITarget_ReceiveByte();\r
+ MemoryCRC |= ((uint16_t)PDITarget_ReceiveByte() << 8);\r
+ MemoryCRC |= ((uint32_t)PDITarget_ReceiveByte() << 16);\r
+ \r
+ return MemoryCRC;\r
+}\r
+\r
+#endif\r