Remove missed timer 0 init code in the ISP protocol handler in the AVRISP project...

diff --git a/Projects/AVRISP/Lib/ISP/ISPTarget.c b/Projects/AVRISP/Lib/ISP/ISPTarget.c
index a3a8b22..29cb18e 100644 (file)
--- a/Projects/AVRISP/Lib/ISP/ISPTarget.c
+++ b/Projects/AVRISP/Lib/ISP/ISPTarget.c
@@ -122,9 +122,6 @@ uint8_t ISPTarget_WaitForProgComplete(const uint8_t ProgrammingMode, const uint1
                        break;\r
                case PROG_MODE_WORD_VALUE_MASK:\r
                case PROG_MODE_PAGED_VALUE_MASK:\r
                        break;\r
                case PROG_MODE_WORD_VALUE_MASK:\r
                case PROG_MODE_PAGED_VALUE_MASK:\r

-                       TCNT0 = 0;\r
-                       TIFR0 = (1 << OCF1A);\r
-                       \r

                        do\r
                        {\r
                                SPI_SendByte(ReadMemCommand);\r
                        do\r
                        {\r
                                SPI_SendByte(ReadMemCommand);\r

diff --git a/Projects/AVRISP/Lib/V2Protocol.h b/Projects/AVRISP/Lib/V2Protocol.h
index 76b08b0..3535c6e 100644 (file)
--- a/Projects/AVRISP/Lib/V2Protocol.h
+++ b/Projects/AVRISP/Lib/V2Protocol.h
@@ -57,13 +57,13 @@
 
        /* Macros: */\r
                /** Programmer ID string, returned to the host during the CMD_SIGN_ON command processing */
 
        /* Macros: */\r
                /** Programmer ID string, returned to the host during the CMD_SIGN_ON command processing */

-               #define PROGRAMMER_ID     "AVRISP_MK2"\r
+               #define PROGRAMMER_ID       "AVRISP_MK2"\r

                \r
                /** Timeout period for each issued command from the host before it is aborted */\r
                \r
                /** Timeout period for each issued command from the host before it is aborted */\r

-               #define COMMAND_TIMEOUT_MS 200\r
+               #define COMMAND_TIMEOUT_MS   200\r

                \r
                /** Command timeout counter register, GPIOR for speed */\r
                \r
                /** Command timeout counter register, GPIOR for speed */\r

-               #define TimeoutMSRemaining GPIOR1\r
+               #define TimeoutMSRemaining   GPIOR0\r

 \r
        /* External Variables: */\r
                extern uint32_t CurrentAddress;\r
 \r
        /* External Variables: */\r
                extern uint32_t CurrentAddress;\r

diff --git a/Projects/AVRISP/Lib/XPROG/XPROGTarget.c b/Projects/AVRISP/Lib/XPROG/XPROGTarget.c
index 59c85f3..7908c65 100644 (file)
--- a/Projects/AVRISP/Lib/XPROG/XPROGTarget.c
+++ b/Projects/AVRISP/Lib/XPROG/XPROGTarget.c
@@ -49,31 +49,31 @@ volatile uint16_t           SoftUSART_Data;
 #define SoftUSART_BitCount  GPIOR2\r
 \r
 \r
 #define SoftUSART_BitCount  GPIOR2\r
 \r
 \r

-/** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */\r
-ISR(TIMER1_CAPT_vect, ISR_BLOCK)\r
+/** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */\r
+ISR(TIMER1_COMPA_vect, ISR_BLOCK)\r

 {\r
        /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
 {\r
        /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r

-       BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;\r
+       BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;\r

 \r
        /* If not sending or receiving, just exit */\r
        if (!(SoftUSART_BitCount))\r
          return;\r
 \r
        /* Check to see if we are at a rising or falling edge of the clock */\r
 \r
        /* If not sending or receiving, just exit */\r
        if (!(SoftUSART_BitCount))\r
          return;\r
 \r
        /* Check to see if we are at a rising or falling edge of the clock */\r

-       if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)\r
+       if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)\r

        {\r
                /* If at rising clock edge and we are in send mode, abort */\r
                if (IsSending)\r
                  return;\r
                  \r
                /* Wait for the start bit when receiving */\r
        {\r
                /* If at rising clock edge and we are in send mode, abort */\r
                if (IsSending)\r
                  return;\r
                  \r
                /* Wait for the start bit when receiving */\r

-               if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))\r
+               if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r

                  return;\r
        \r
                /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
                 * be discarded leaving the data to be byte-aligned for quick access */\r
                  return;\r
        \r
                /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
                 * be discarded leaving the data to be byte-aligned for quick access */\r

-               if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)\r
-                 SoftUSART_Data |= (1 << (BITS_IN_USART_FRAME - 1));\r
+               if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
+                 ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));\r

 \r
                SoftUSART_Data >>= 1;\r
                SoftUSART_BitCount--;\r
 \r
                SoftUSART_Data >>= 1;\r
                SoftUSART_BitCount--;\r


@@ -85,41 +85,41 @@ ISR(TIMER1_CAPT_vect, ISR_BLOCK)
                  return;\r
 \r
                /* Set the data line to the next bit value */\r
                  return;\r
 \r
                /* Set the data line to the next bit value */\r

-               if (SoftUSART_Data & 0x01)\r
-                 BITBANG_TPIDATA_PORT |=  BITBANG_TPIDATA_MASK;\r
+               if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)\r
+                 BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;\r

                else\r
                else\r

-                 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;                  \r
+                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;                  \r

 \r
                SoftUSART_Data >>= 1;\r
                SoftUSART_BitCount--;\r
        }\r
 }\r
 \r
 \r
                SoftUSART_Data >>= 1;\r
                SoftUSART_BitCount--;\r
        }\r
 }\r
 \r

-/** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */\r
-ISR(TIMER1_COMPA_vect, ISR_BLOCK)\r
+/** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */\r
+ISR(TIMER1_COMPB_vect, ISR_BLOCK)\r

 {\r
        /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
 {\r
        /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r

-       BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;\r
+       BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;\r

 \r
        /* If not sending or receiving, just exit */\r
        if (!(SoftUSART_BitCount))\r
          return;\r
 \r
        /* Check to see if we are at a rising or falling edge of the clock */\r
 \r
        /* If not sending or receiving, just exit */\r
        if (!(SoftUSART_BitCount))\r
          return;\r
 \r
        /* Check to see if we are at a rising or falling edge of the clock */\r

-       if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)\r
+       if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)\r

        {\r
                /* If at rising clock edge and we are in send mode, abort */\r
                if (IsSending)\r
                  return;\r
                  \r
                /* Wait for the start bit when receiving */\r
        {\r
                /* If at rising clock edge and we are in send mode, abort */\r
                if (IsSending)\r
                  return;\r
                  \r
                /* Wait for the start bit when receiving */\r

-               if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r
+               if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))\r

                  return;\r
        \r
                /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
                 * be discarded leaving the data to be byte-aligned for quick access */\r
                  return;\r
        \r
                /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
                 * be discarded leaving the data to be byte-aligned for quick access */\r

-               if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
-                 SoftUSART_Data |= (1 << (BITS_IN_USART_FRAME - 1));\r
+               if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)\r
+                ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));\r

 \r
                SoftUSART_Data >>= 1;\r
                SoftUSART_BitCount--;\r
 \r
                SoftUSART_Data >>= 1;\r
                SoftUSART_BitCount--;\r


@@ -131,10 +131,10 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
                  return;\r
 \r
                /* Set the data line to the next bit value */\r
                  return;\r
 \r
                /* Set the data line to the next bit value */\r

-               if (SoftUSART_Data & 0x01)\r
-                 BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;\r
+               if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)\r
+                 BITBANG_TPIDATA_PORT |=  BITBANG_TPIDATA_MASK;\r

                else\r
                else\r

-                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;                  \r
+                 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;                  \r

 \r
                SoftUSART_Data >>= 1;\r
                SoftUSART_BitCount--;\r
 \r
                SoftUSART_Data >>= 1;\r
                SoftUSART_BitCount--;\r


@@ -142,41 +142,42 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
 }\r
 #endif\r
 \r
 }\r
 #endif\r
 \r

-/** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */\r
-void XPROGTarget_EnableTargetTPI(void)\r
+/** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */\r
+void XPROGTarget_EnableTargetPDI(void)\r

 {\r
 {\r

-       /* Set /RESET line low for at least 90ns to enable TPI functionality */\r
-       RESET_LINE_DDR  |= RESET_LINE_MASK;\r
-       RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
-       asm volatile ("NOP"::);\r
-       asm volatile ("NOP"::);\r
-\r

 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Set Tx and XCK as outputs, Rx as input */\r
        DDRD |=  (1 << 5) | (1 << 3);\r
        DDRD &= ~(1 << 2);\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Set Tx and XCK as outputs, Rx as input */\r
        DDRD |=  (1 << 5) | (1 << 3);\r
        DDRD &= ~(1 << 2);\r

-               \r
+       \r
+       /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
+       PORTD |= (1 << 3);\r
+       asm volatile ("NOP"::);\r
+       asm volatile ("NOP"::);\r
+       \r

        /* Set up the synchronous USART for XMEGA communications - \r
           8 data bits, even parity, 2 stop bits */\r
        UBRR1  = (F_CPU / 1000000UL);\r
        UCSR1B = (1 << TXEN1);\r
        UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
 \r
        /* Set up the synchronous USART for XMEGA communications - \r
           8 data bits, even parity, 2 stop bits */\r
        UBRR1  = (F_CPU / 1000000UL);\r
        UCSR1B = (1 << TXEN1);\r
        UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
 \r

-       /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
+       /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */\r

        XPROGTarget_SendBreak();\r
        XPROGTarget_SendBreak();\r
 #else\r
        /* Set DATA and CLOCK lines to outputs */\r
        XPROGTarget_SendBreak();\r
        XPROGTarget_SendBreak();\r
 #else\r
        /* Set DATA and CLOCK lines to outputs */\r

-       BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;\r
-       BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;\r
+       BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;\r
+       BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;\r

        \r
        \r

-       /* Set DATA line high for idle state */\r
-       BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
+       /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
+       BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+       asm volatile ("NOP"::);\r
+       asm volatile ("NOP"::);\r

 \r
 \r

-       /* Fire timer capture ISR every 100 cycles to manage the software USART */\r
-       OCR1A   = 100;\r
-       TCCR1B  = (1 << WGM13) | (1 << WGM12) | (1 << CS10);\r
-       TIMSK1  = (1 << ICIE1);\r
+       /* Fire timer compare channel A ISR every 90 cycles to manage the software USART */\r
+       OCR1A   = 90;\r
+       TCCR1B  = (1 << WGM12) | (1 << CS10);\r
+       TIMSK1  = (1 << OCIE1A);\r

        \r
        /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
        XPROGTarget_SendBreak();\r
        \r
        /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
        XPROGTarget_SendBreak();\r


@@ -184,42 +185,41 @@ void XPROGTarget_EnableTargetTPI(void)
 #endif\r
 }\r
 \r
 #endif\r
 }\r
 \r

-/** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */\r
-void XPROGTarget_EnableTargetPDI(void)\r
+/** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */\r
+void XPROGTarget_EnableTargetTPI(void)\r

 {\r
 {\r

+       /* Set /RESET line low for at least 90ns to enable TPI functionality */\r
+       RESET_LINE_DDR  |= RESET_LINE_MASK;\r
+       RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
+       asm volatile ("NOP"::);\r
+       asm volatile ("NOP"::);\r
+\r

 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Set Tx and XCK as outputs, Rx as input */\r
        DDRD |=  (1 << 5) | (1 << 3);\r
        DDRD &= ~(1 << 2);\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Set Tx and XCK as outputs, Rx as input */\r
        DDRD |=  (1 << 5) | (1 << 3);\r
        DDRD &= ~(1 << 2);\r

-       \r
-       /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
-       PORTD |= (1 << 3);\r
-       asm volatile ("NOP"::);\r
-       asm volatile ("NOP"::);\r
-       \r
+               \r

        /* Set up the synchronous USART for XMEGA communications - \r
           8 data bits, even parity, 2 stop bits */\r
        UBRR1  = (F_CPU / 1000000UL);\r
        UCSR1B = (1 << TXEN1);\r
        UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
 \r
        /* Set up the synchronous USART for XMEGA communications - \r
           8 data bits, even parity, 2 stop bits */\r
        UBRR1  = (F_CPU / 1000000UL);\r
        UCSR1B = (1 << TXEN1);\r
        UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
 \r

-       /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */\r
+       /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r

        XPROGTarget_SendBreak();\r
        XPROGTarget_SendBreak();\r
 #else\r
        /* Set DATA and CLOCK lines to outputs */\r
        XPROGTarget_SendBreak();\r
        XPROGTarget_SendBreak();\r
 #else\r
        /* Set DATA and CLOCK lines to outputs */\r

-       BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;\r
-       BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;\r
+       BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;\r
+       BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;\r

        \r
        \r

-       /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
-       BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
-       asm volatile ("NOP"::);\r
-       asm volatile ("NOP"::);\r
+       /* Set DATA line high for idle state */\r
+       BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r

 \r
 \r

-       /* Fire timer compare ISR every 100 cycles to manage the software USART */\r
-       OCR1A   = 100;\r
+       /* Fire timer capture channel B ISR every 90 cycles to manage the software USART */\r
+       OCR1B   = 9;\r

        TCCR1B  = (1 << WGM12) | (1 << CS10);\r
        TCCR1B  = (1 << WGM12) | (1 << CS10);\r

-       TIMSK1  = (1 << OCIE1A);\r
+       TIMSK1  = (1 << OCIE1B);\r

        \r
        /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
        XPROGTarget_SendBreak();\r
        \r
        /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
        XPROGTarget_SendBreak();\r


@@ -227,8 +227,8 @@ void XPROGTarget_EnableTargetPDI(void)
 #endif\r
 }\r
 \r
 #endif\r
 }\r
 \r

-/** Disables the target's TPI interface, exits programming mode and starts the target's application. */\r
-void XPROGTarget_DisableTargetTPI(void)\r
+/** Disables the target's PDI interface, exits programming mode and starts the target's application. */\r
+void XPROGTarget_DisableTargetPDI(void)\r

 {\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Turn off receiver and transmitter of the USART, clear settings */\r
 {\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Turn off receiver and transmitter of the USART, clear settings */\r


@@ -241,21 +241,17 @@ void XPROGTarget_DisableTargetTPI(void)
        PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
 #else\r
        /* Set DATA and CLOCK lines to inputs */\r
        PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
 #else\r
        /* Set DATA and CLOCK lines to inputs */\r

-       BITBANG_TPIDATA_DDR   &= ~BITBANG_TPIDATA_MASK;\r
-       BITBANG_TPICLOCK_DDR  &= ~BITBANG_TPICLOCK_MASK;\r
+       BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;\r
+       BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;\r

        \r
        /* Tristate DATA and CLOCK lines */\r
        \r
        /* Tristate DATA and CLOCK lines */\r

-       BITBANG_TPIDATA_PORT  &= ~BITBANG_TPIDATA_MASK;\r
-       BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;\r
+       BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;\r
+       BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;\r

 #endif\r
 #endif\r

-\r
-       /* Tristate target /RESET line */\r
-       RESET_LINE_DDR  &= ~RESET_LINE_MASK;\r
-       RESET_LINE_PORT &= ~RESET_LINE_MASK;\r

 }\r
 \r
 }\r
 \r

-/** Disables the target's PDI interface, exits programming mode and starts the target's application. */\r
-void XPROGTarget_DisableTargetPDI(void)\r
+/** Disables the target's TPI interface, exits programming mode and starts the target's application. */\r
+void XPROGTarget_DisableTargetTPI(void)\r

 {\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Turn off receiver and transmitter of the USART, clear settings */\r
 {\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Turn off receiver and transmitter of the USART, clear settings */\r


@@ -268,13 +264,17 @@ void XPROGTarget_DisableTargetPDI(void)
        PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
 #else\r
        /* Set DATA and CLOCK lines to inputs */\r
        PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
 #else\r
        /* Set DATA and CLOCK lines to inputs */\r

-       BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;\r
-       BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;\r
+       BITBANG_TPIDATA_DDR   &= ~BITBANG_TPIDATA_MASK;\r
+       BITBANG_TPICLOCK_DDR  &= ~BITBANG_TPICLOCK_MASK;\r

        \r
        /* Tristate DATA and CLOCK lines */\r
        \r
        /* Tristate DATA and CLOCK lines */\r

-       BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;\r
-       BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;\r
+       BITBANG_TPIDATA_PORT  &= ~BITBANG_TPIDATA_MASK;\r
+       BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;\r

 #endif\r
 #endif\r

+\r
+       /* Tristate target /RESET line */\r
+       RESET_LINE_DDR  &= ~RESET_LINE_MASK;\r
+       RESET_LINE_PORT &= ~RESET_LINE_MASK;\r

 }\r
 \r
 /** Sends a byte via the USART.\r
 }\r
 \r
 /** Sends a byte via the USART.\r

diff --git a/Projects/AVRISP/Lib/XPROG/XPROGTarget.h b/Projects/AVRISP/Lib/XPROG/XPROGTarget.h
index 4460216..7aca20b 100644 (file)
--- a/Projects/AVRISP/Lib/XPROG/XPROGTarget.h
+++ b/Projects/AVRISP/Lib/XPROG/XPROGTarget.h
@@ -56,7 +56,29 @@
 \r
        /* Defines: */\r
                #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
 \r
        /* Defines: */\r
                #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r

-                       #define XPROG_VIA_HARDWARE_USART\r
+//                     #define XPROG_VIA_HARDWARE_USART\r
+\r
+                       #define BITBANG_PDIDATA_PORT     PORTD\r
+                       #define BITBANG_PDIDATA_DDR      DDRD\r
+                       #define BITBANG_PDIDATA_PIN      PIND\r
+                       #define BITBANG_PDIDATA_MASK     (1 << 3)\r
+                       \r
+                       #define BITBANG_PDICLOCK_PORT    PORTD\r
+                       #define BITBANG_PDICLOCK_DDR     DDRD\r
+                       #define BITBANG_PDICLOCK_PIN     PIND\r
+                       #define BITBANG_PDICLOCK_MASK    (1 << 5)\r
+\r
+                       #define BITBANG_TPIDATA_PORT     PORTB\r
+                       #define BITBANG_TPIDATA_DDR      DDRB\r
+                       #define BITBANG_TPIDATA_PIN      PINB\r
+                       #define BITBANG_TPIDATA_MASK     (1 << 3)\r
+                               \r
+                       #define BITBANG_TPICLOCK_PORT    PORTB\r
+                       #define BITBANG_TPICLOCK_DDR     DDRB\r
+                       #define BITBANG_TPICLOCK_PIN     PINB\r
+                       #define BITBANG_TPICLOCK_MASK    (1 << 1)\r
+\r
+\r

                #else\r
                        #define BITBANG_PDIDATA_PORT     PORTB\r
                        #define BITBANG_PDIDATA_DDR      DDRB\r
                #else\r
                        #define BITBANG_PDIDATA_PORT     PORTB\r
                        #define BITBANG_PDIDATA_DDR      DDRB\r


@@ -130,10 +152,10 @@
                #define TPI_POINTER_INDIRECT_PI  (1 << 2)\r
                \r
        /* Function Prototypes: */\r
                #define TPI_POINTER_INDIRECT_PI  (1 << 2)\r
                \r
        /* Function Prototypes: */\r

-               void    XPROGTarget_EnableTargetTPI(void);\r

                void    XPROGTarget_EnableTargetPDI(void);\r
                void    XPROGTarget_EnableTargetPDI(void);\r

-               void    XPROGTarget_DisableTargetTPI(void);\r
+               void    XPROGTarget_EnableTargetTPI(void);\r

                void    XPROGTarget_DisableTargetPDI(void);\r
                void    XPROGTarget_DisableTargetPDI(void);\r

+               void    XPROGTarget_DisableTargetTPI(void);\r

                void    XPROGTarget_SendByte(const uint8_t Byte);\r
                uint8_t XPROGTarget_ReceiveByte(void);\r
                void    XPROGTarget_SendBreak(void);\r
                void    XPROGTarget_SendByte(const uint8_t Byte);\r
                uint8_t XPROGTarget_ReceiveByte(void);\r
                void    XPROGTarget_SendBreak(void);\r

diff --git a/Projects/AVRISP/makefile b/Projects/AVRISP/makefile
index 823535f..f5bb5b7 100644 (file)
--- a/Projects/AVRISP/makefile
+++ b/Projects/AVRISP/makefile
@@ -60,7 +60,7 @@
 \r
 \r
 # MCU name\r
 \r
 \r
 # MCU name\r

-MCU = at90usb162\r
+MCU = at90usb1287\r

 \r
 \r
 # Target board (see library "Board Types" documentation, USER or blank for projects not requiring\r
 \r
 \r
 # Target board (see library "Board Types" documentation, USER or blank for projects not requiring\r