AVRISP programmer project now has a more robust timeout system, allowing for a doubli...

[pub/USBasp.git] / Projects / AVRISP-MKII / Lib / XPROG / TINYNVM.c

diff --git a/Projects/AVRISP-MKII/Lib/XPROG/TINYNVM.c b/Projects/AVRISP-MKII/Lib/XPROG/TINYNVM.c
index 47a265a..428469d 100644 (file)
--- a/Projects/AVRISP-MKII/Lib/XPROG/TINYNVM.c
+++ b/Projects/AVRISP-MKII/Lib/XPROG/TINYNVM.c
@@ -37,7 +37,6 @@
 #include "TINYNVM.h"\r
 \r
 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)\r
 #include "TINYNVM.h"\r
 \r
 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)\r

-#warning TPI Protocol support is currently incomplete and is not suitable for general use.\r

 \r
 /** Sends the given pointer address to the target's TPI pointer register */\r
 static void TINYNVM_SendPointerAddress(const uint16_t AbsoluteAddress)\r
 \r
 /** Sends the given pointer address to the target's TPI pointer register */\r
 static void TINYNVM_SendPointerAddress(const uint16_t AbsoluteAddress)\r


@@ -66,7 +65,7 @@ static void TINYNVM_SendReadNVMRegister(const uint8_t Address)
  */\r
 static void TINYNVM_SendWriteNVMRegister(const uint8_t Address)\r
 {\r
  */\r
 static void TINYNVM_SendWriteNVMRegister(const uint8_t Address)\r
 {\r

-       /* The TPI command for writing to the I/O space uses wierd addressing, where the I/O address's upper\r
+       /* The TPI command for writing to the I/O space uses weird addressing, where the I/O address's upper\r

         * two bits of the 6-bit address are shifted left once */\r
        XPROGTarget_SendByte(TPI_CMD_SOUT | ((Address & 0x30) << 1) | (Address & 0x0F));\r
 }\r
         * two bits of the 6-bit address are shifted left once */\r
        XPROGTarget_SendByte(TPI_CMD_SOUT | ((Address & 0x30) << 1) | (Address & 0x0F));\r
 }\r


@@ -78,14 +77,22 @@ static void TINYNVM_SendWriteNVMRegister(const uint8_t Address)
 bool TINYNVM_WaitWhileNVMBusBusy(void)\r
 {\r
        /* Poll the STATUS register to check to see if NVM access has been enabled */\r
 bool TINYNVM_WaitWhileNVMBusBusy(void)\r
 {\r
        /* Poll the STATUS register to check to see if NVM access has been enabled */\r

+       uint8_t TimeoutMSRemaining = 100;\r

        while (TimeoutMSRemaining)\r
        {\r
                /* Send the SLDCS command to read the TPI STATUS register to see the NVM bus is active */\r
                XPROGTarget_SendByte(TPI_CMD_SLDCS | TPI_STATUS_REG);\r
                if (XPROGTarget_ReceiveByte() & TPI_STATUS_NVM)\r
                  return true;\r
        while (TimeoutMSRemaining)\r
        {\r
                /* Send the SLDCS command to read the TPI STATUS register to see the NVM bus is active */\r
                XPROGTarget_SendByte(TPI_CMD_SLDCS | TPI_STATUS_REG);\r
                if (XPROGTarget_ReceiveByte() & TPI_STATUS_NVM)\r
                  return true;\r

+\r
+               /* Manage software timeout */\r
+               if (TIFR0 & (1 << OCF0A))\r
+               {\r
+                       TIFR0 |= (1 << OCF0A);\r
+                       TimeoutMSRemaining--;\r
+               }\r

        }\r
        }\r

-       \r
+\r

        return false;\r
 }\r
 \r
        return false;\r
 }\r
 \r


@@ -97,6 +104,7 @@ bool TINYNVM_WaitWhileNVMBusBusy(void)
 bool TINYNVM_WaitWhileNVMControllerBusy(void)\r
 {\r
        /* Poll the STATUS register to check to see if NVM access has been enabled */\r
 bool TINYNVM_WaitWhileNVMControllerBusy(void)\r
 {\r
        /* Poll the STATUS register to check to see if NVM access has been enabled */\r

+       uint8_t TimeoutMSRemaining = 100;\r

        while (TimeoutMSRemaining)\r
        {\r
                /* Send the SIN command to read the TPI STATUS register to see the NVM bus is busy */\r
        while (TimeoutMSRemaining)\r
        {\r
                /* Send the SIN command to read the TPI STATUS register to see the NVM bus is busy */\r


@@ -105,8 +113,15 @@ bool TINYNVM_WaitWhileNVMControllerBusy(void)
                /* Check to see if the BUSY flag is still set */\r
                if (!(XPROGTarget_ReceiveByte() & (1 << 7)))\r
                  return true;\r
                /* Check to see if the BUSY flag is still set */\r
                if (!(XPROGTarget_ReceiveByte() & (1 << 7)))\r
                  return true;\r

+\r
+               /* Manage software timeout */\r
+               if (TIFR0 & (1 << OCF0A))\r
+               {\r
+                       TIFR0 |= (1 << OCF0A);\r
+                       TimeoutMSRemaining--;\r
+               }\r

        }\r
        }\r

-       \r
+\r

        return false;\r
 }\r
 \r
        return false;\r
 }\r
 \r


@@ -143,13 +158,13 @@ bool TINYNVM_ReadMemory(const uint16_t ReadAddress, uint8_t* ReadBuffer, uint16_
 \r
 /** Writes word addressed memory to the target's memory spaces.\r
  *\r
 \r
 /** Writes word addressed memory to the target's memory spaces.\r
  *\r

- *  \param[in]  WriteAddress  Start address to write to within the target's address space\r
- *  \param[in]  WriteBuffer   Buffer to source data from\r
- *  \param[in]  WriteLength   Total number of bytes to write to the device (must be an integer multiple of 2)\r
+ *  \param[in] WriteAddress  Start address to write to within the target's address space\r
+ *  \param[in] WriteBuffer   Buffer to source data from\r
+ *  \param[in] WriteLength   Total number of bytes to write to the device (must be an integer multiple of 2)\r

  *\r
  *  \return Boolean true if the command sequence complete successfully\r
  */\r
  *\r
  *  \return Boolean true if the command sequence complete successfully\r
  */\r

-bool TINYNVM_WriteMemory(const uint16_t WriteAddress, const uint8_t* WriteBuffer, uint16_t WriteLength)\r
+bool TINYNVM_WriteMemory(const uint16_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteLength)\r

 {\r
        /* Wait until the NVM controller is no longer busy */\r
        if (!(TINYNVM_WaitWhileNVMControllerBusy()))\r
 {\r
        /* Wait until the NVM controller is no longer busy */\r
        if (!(TINYNVM_WaitWhileNVMControllerBusy()))\r


@@ -189,20 +204,28 @@ bool TINYNVM_WriteMemory(const uint16_t WriteAddress, const uint8_t* WriteBuffer
 \r
 /** Erases the target's memory space.\r
  *\r
 \r
 /** Erases the target's memory space.\r
  *\r

+ *  \param[in] EraseCommand  NVM erase command to send to the device\r
+ *  \param[in] Address       Address inside the memory space to erase\r
+ *\r

  *  \return Boolean true if the command sequence complete successfully\r
  */\r
  *  \return Boolean true if the command sequence complete successfully\r
  */\r

-bool TINYNVM_EraseMemory(void)\r
+bool TINYNVM_EraseMemory(const uint8_t EraseCommand, const uint16_t Address)\r

 {\r
        /* Wait until the NVM controller is no longer busy */\r
        if (!(TINYNVM_WaitWhileNVMControllerBusy()))\r
          return false;\r
 \r
 {\r
        /* Wait until the NVM controller is no longer busy */\r
        if (!(TINYNVM_WaitWhileNVMControllerBusy()))\r
          return false;\r
 \r

-       /* Set the NVM control register to the CHIP ERASE command to erase the target */\r
+       /* Set the NVM control register to the target memory erase command */\r

        TINYNVM_SendWriteNVMRegister(XPROG_Param_NVMCMDRegAddr);\r
        TINYNVM_SendWriteNVMRegister(XPROG_Param_NVMCMDRegAddr);\r

-       XPROGTarget_SendByte(TINY_NVM_CMD_CHIPERASE);   \r
+       XPROGTarget_SendByte(EraseCommand);\r
+\r
+       /* Write to a high byte location within the target address space to start the erase process */\r
+       TINYNVM_SendPointerAddress(Address | 0x0001);\r
+       XPROGTarget_SendByte(TPI_CMD_SST | TPI_POINTER_INDIRECT);\r
+       XPROGTarget_SendByte(0x00);\r

 \r
 \r

-       /* Wait until the NVM bus is ready again */\r
-       if (!(TINYNVM_WaitWhileNVMBusBusy()))\r
+       /* Wait until the NVM controller is no longer busy */\r
+       if (!(TINYNVM_WaitWhileNVMControllerBusy()))\r

          return false;\r
        \r
        return true;\r
          return false;\r
        \r
        return true;\r