Fixed ISR definition conflict in the XPLAIN bridge between the software UART and...

[pub/USBasp.git] / Projects / XPLAINBridge / Lib / SoftUART.c

diff --git a/Projects/XPLAINBridge/Lib/SoftUART.c b/Projects/XPLAINBridge/Lib/SoftUART.c
index 4ec8dcd..12fdf96 100644 (file)
--- a/Projects/XPLAINBridge/Lib/SoftUART.c
+++ b/Projects/XPLAINBridge/Lib/SoftUART.c
@@ -51,7 +51,7 @@ static uint8_t RX_BitsRemaining;
 /** Temporary data variable to hold the byte being received as it is shifted in */
 static uint8_t RX_Data;
 
-/** Initializes the software UART, ready for data transmission and reception into the global ring buffers. */
+/** Initialises the software UART, ready for data transmission and reception into the global ring buffers. */
 void SoftUART_Init(void)
 {
        /* Set TX pin to output high, enable RX pull-up */
@@ -63,14 +63,15 @@ void SoftUART_Init(void)
        EICRA  = (1 << ISC01);
        EIMSK  = (1 << INT0);
 
-       /* Set reception timer compare period and enable compare ISR */
-       OCR1A  = BIT_TIME;
-       TIMSK1 = (1 << OCIE1A);
+       /* Set the transmission and reception timer compare values for the default baud rate */
+       SoftUART_SetBaud(9600);
 
-       /* Set transmission timer compare period, enable compare ISR and start the timer */
-       OCR3A  = BIT_TIME;
-       TIMSK3 = (1 << OCIE3A);
-       TCCR3B = ((1 << CS30) | (1 << WGM32));
+       /* Setup reception timer compare ISR */
+       TIMSK1 = (1 << ICIE1);
+
+       /* Setup transmission timer compare ISR and start the timer */
+       TIMSK3 = (1 << ICIE3);
+       TCCR3B = ((1 << CS30) | (1 << WGM33) | (1 << WGM32));
 }
 
 /** ISR to detect the start of a bit being sent to the software UART. */
@@ -89,12 +90,12 @@ ISR(INT0_vect, ISR_BLOCK)
                EIMSK = 0;
 
                /* Start the reception timer */
-               TCCR1B = ((1 << CS10) | (1 << WGM12));
+               TCCR1B = ((1 << CS10) | (1 << WGM13) | (1 << WGM12));
        }
 }
 
 /** ISR to manage the reception of bits to the software UART. */
-ISR(TIMER1_COMPA_vect, ISR_BLOCK)
+ISR(TIMER1_CAPT_vect, ISR_BLOCK)
 {
        /* Cache the current RX pin value for later checking */
        uint8_t SRX_Cached = (SRXPIN & (1 << SRX));
@@ -119,12 +120,12 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
 
                /* Reception complete, store the received byte if stop bit valid */
                if (SRX_Cached)
-                 RingBuffer_Insert(&UARTtoUSB_Buffer, RX_Data);        
+                 RingBuffer_Insert(&XMEGAtoUSB_Buffer, RX_Data);       
        }
 }
 
 /** ISR to manage the transmission of bits via the software UART. */
-ISR(TIMER3_COMPA_vect, ISR_BLOCK)
+ISR(TIMER3_CAPT_vect, ISR_BLOCK)
 {
        /* Check if transmission has finished */
        if (TX_BitsRemaining)
@@ -139,13 +140,13 @@ ISR(TIMER3_COMPA_vect, ISR_BLOCK)
                TX_Data >>= 1;
                TX_BitsRemaining--;
        }
-       else if (USBtoUART_Buffer.Count && !(RX_BitsRemaining))
+       else if (!(RX_BitsRemaining) && !(RingBuffer_IsEmpty(&USBtoXMEGA_Buffer)))
        {
                /* Start bit - TX line low */
                STXPORT &= ~(1 << STX);
 
                /* Transmission complete, get the next byte to send (if available) */
-               TX_Data          = ~RingBuffer_Remove(&USBtoUART_Buffer);
+               TX_Data          = ~RingBuffer_Remove(&USBtoXMEGA_Buffer);
                TX_BitsRemaining = 9;
        }
 }