Complete initial working revision of PDI programming in the AVRISP project (XMEGAs...

[pub/USBasp.git] / Projects / AVRISP / Lib / NVMTarget.c

diff --git a/Projects/AVRISP/Lib/NVMTarget.c b/Projects/AVRISP/Lib/NVMTarget.c
index b6922d5..9402b2b 100644 (file)
--- a/Projects/AVRISP/Lib/NVMTarget.c
+++ b/Projects/AVRISP/Lib/NVMTarget.c
@@ -96,7 +96,7 @@ bool NVMTarget_WaitWhileNVMControllerBusy(void)
  *  \param[in]  CRCCommand  NVM CRC command to issue to the target\r
  *  \param[out] CRCDest     CRC Destination when read from the target\r
  *\r
- *  \return Boolean true if the command sequence complete sucessfully\r
+ *  \return Boolean true if the command sequence complete successfully\r
  */\r
 bool NVMTarget_GetMemoryCRC(uint8_t CRCCommand, uint32_t* CRCDest)\r
 {\r
@@ -148,7 +148,7 @@ bool NVMTarget_GetMemoryCRC(uint8_t CRCCommand, uint32_t* CRCDest)
  *  \param[out] ReadBuffer   Buffer to store read data into\r
  *  \param[in]  ReadSize     Number of bytes to read\r
  *\r
- *  \return Boolean true if the command sequence complete sucessfully\r
+ *  \return Boolean true if the command sequence complete successfully\r
  */\r
 bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)\r
 {\r
@@ -156,7 +156,7 @@ bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t Re
        if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
          return false;\r
        \r
-       /* Send the READNVM command to the NVM controller for reading of an aribtrary location */\r
+       /* Send the READNVM command to the NVM controller for reading of an arbitrary location */\r
        PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
        NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
        PDITarget_SendByte(NVM_CMD_READNVM);\r
@@ -166,9 +166,8 @@ bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t Re
        NVMTarget_SendAddress(ReadAddress);\r
 \r
        /* Send the REPEAT command with the specified number of bytes to read */\r
-       PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_2BYTES);\r
-       PDITarget_SendByte(ReadSize &  0xFF);\r
-       PDITarget_SendByte(ReadSize >> 8);\r
+       PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);\r
+       PDITarget_SendByte(ReadSize - 1);\r
                \r
        /* Send a LD command with indirect access and postincrement to read out the bytes */\r
        PDITarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
@@ -185,26 +184,23 @@ bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t Re
  *  \param[in]  WriteBuffer   Buffer to source data from\r
  *  \param[in]  WriteSize     Number of bytes to write\r
  *\r
- *  \return Boolean true if the command sequence complete sucessfully\r
+ *  \return Boolean true if the command sequence complete successfully\r
  */\r
-bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize)\r
+bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer)\r
 {\r
-       for (uint16_t i = 0; i < WriteSize; i++)\r
-       {\r
-               /* Wait until the NVM controller is no longer busy */\r
-               if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
-                 return false;\r
+       /* Wait until the NVM controller is no longer busy */\r
+       if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
+         return false;\r
 \r
-               /* Send the memory write command to the target */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
-               PDITarget_SendByte(WriteCommand);\r
+       /* Send the memory write command to the target */\r
+       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+       NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
+       PDITarget_SendByte(WriteCommand);\r
        \r
-               /* Send each new memory byte to the memory to the target */\r
-               PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
-               NVMTarget_SendAddress(WriteAddress++);\r
-               PDITarget_SendByte(*(WriteBuffer++));\r
-       }\r
+       /* Send new memory byte to the memory to the target */\r
+       PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
+       NVMTarget_SendAddress(WriteAddress++);\r
+       PDITarget_SendByte(*(WriteBuffer++));\r
        \r
        return true;\r
 }\r
@@ -219,7 +215,7 @@ bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint
  *  \param[in]  WriteBuffer       Buffer to source data from\r
  *  \param[in]  WriteSize         Number of bytes to write\r
  *\r
- *  \return Boolean true if the command sequence complete sucessfully\r
+ *  \return Boolean true if the command sequence complete successfully\r
  */\r
 bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffCommand, uint8_t WritePageCommand,\r
                                uint8_t PageMode, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize)\r
@@ -257,22 +253,13 @@ bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffComman
                NVMTarget_SendAddress(WriteAddress);\r
 \r
                /* Send the REPEAT command with the specified number of bytes to write */\r
-               PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_2BYTES);\r
-               PDITarget_SendByte(WriteSize &  0xFF);\r
-               PDITarget_SendByte(WriteSize >> 8);\r
+               PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);\r
+               PDITarget_SendByte(WriteSize - 1);\r
                        \r
                /* Send a ST command with indirect access and postincrement to write the bytes */\r
                PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
                for (uint16_t i = 0; i < WriteSize; i++)\r
                  PDITarget_SendByte(*(WriteBuffer++));\r
-\r
-               // TEMP\r
-               PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
-               NVMTarget_SendNVMRegAddress(NVM_REG_STATUS);\r
-               GPIOR0 = PDITarget_ReceiveByte();\r
-               if (!(GPIOR0 & (1 << 0)))\r
-                 JTAG_DEBUG_POINT();\r
-               // END TEMP\r
        }\r
        \r
        if (PageMode & XPRG_PAGEMODE_WRITE)\r
@@ -300,7 +287,7 @@ bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffComman
  *  \param[in] EraseCommand  NVM erase command to send to the device\r
  *  \param[in] Address  Address inside the memory space to erase\r
  *\r
- *  \return Boolean true if the command sequence complete sucessfully\r
+ *  \return Boolean true if the command sequence complete successfully\r
  */\r
 bool NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address)\r
 {\r
@@ -313,7 +300,7 @@ bool NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address)
        NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
        PDITarget_SendByte(EraseCommand);\r
        \r
-       /* Chip erase is handled seperately, since it's procedure is different to other erase types */\r
+       /* Chip erase is handled separately, since it's procedure is different to other erase types */\r
        if (EraseCommand == NVM_CMD_CHIPERASE)\r
        {\r
                /* Set CMDEX bit in NVM CTRLA register to start the chip erase */\r