ISR(TIMER1_COMPA_vect, ISR_BLOCK)\r
{\r
/* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
- BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;\r
+ BITBANG_PDICLOCK_PIN = BITBANG_PDICLOCK_MASK;\r
\r
/* If not sending or receiving, just exit */\r
if (!(SoftUSART_BitCount))\r
return;\r
\r
+ /* Check to see if we are at a rising or falling edge of the clock */\r
if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)\r
{\r
/* If at rising clock edge and we are in send mode, abort */\r
ISR(TIMER1_CAPT_vect, ISR_BLOCK)\r
{\r
/* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
- BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;\r
+ BITBANG_TPICLOCK_PIN = BITBANG_TPICLOCK_MASK;\r
\r
/* If not sending or receiving, just exit */\r
if (!(SoftUSART_BitCount))\r