/*\r
LUFA Library\r
- Copyright (C) Dean Camera, 2009.\r
+ Copyright (C) Dean Camera, 2010.\r
\r
dean [at] fourwalledcubicle [dot] com\r
www.fourwalledcubicle.com\r
*/\r
\r
/*\r
- Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+ Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
\r
Permission to use, copy, modify, distribute, and sell this \r
software and its documentation for any purpose is hereby granted\r
#include "TINYNVM.h"\r
\r
#if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)\r
-#warning TPI Protocol support is currently incomplete and is not suitable for general use.\r
\r
/** Sends the given pointer address to the target's TPI pointer register */\r
-void TINYNVM_SendPointerAddress(const uint16_t AbsoluteAddress)\r
+static void TINYNVM_SendPointerAddress(const uint16_t AbsoluteAddress)\r
{\r
/* Send the given 16-bit address to the target, LSB first */\r
XPROGTarget_SendByte(TPI_CMD_SSTPR | 0);\r
XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[1]);\r
}\r
\r
+/** Sends a SIN command to the target with the specified I/O address, ready for the data byte to be written.\r
+ *\r
+ * \param[in] Address 6-bit I/O address to write to in the target's I/O memory space\r
+ */\r
+static void TINYNVM_SendReadNVMRegister(const uint8_t Address)\r
+{\r
+ /* The TPI command for reading from the I/O space uses strange addressing, where the I/O address's upper\r
+ * two bits of the 6-bit address are shifted left once */\r
+ XPROGTarget_SendByte(TPI_CMD_SIN | ((Address & 0x30) << 1) | (Address & 0x0F));\r
+}\r
+\r
+/** Sends a SOUT command to the target with the specified I/O address, ready for the data byte to be read.\r
+ *\r
+ * \param[in] Address 6-bit I/O address to read from in the target's I/O memory space\r
+ */\r
+static void TINYNVM_SendWriteNVMRegister(const uint8_t Address)\r
+{\r
+ /* The TPI command for writing to the I/O space uses weird addressing, where the I/O address's upper\r
+ * two bits of the 6-bit address are shifted left once */\r
+ XPROGTarget_SendByte(TPI_CMD_SOUT | ((Address & 0x30) << 1) | (Address & 0x0F));\r
+}\r
+\r
/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read.\r
*\r
* \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
bool TINYNVM_WaitWhileNVMBusBusy(void)\r
{\r
/* Poll the STATUS register to check to see if NVM access has been enabled */\r
+ uint8_t TimeoutMSRemaining = 100;\r
while (TimeoutMSRemaining)\r
{\r
/* Send the SLDCS command to read the TPI STATUS register to see the NVM bus is active */\r
XPROGTarget_SendByte(TPI_CMD_SLDCS | TPI_STATUS_REG);\r
if (XPROGTarget_ReceiveByte() & TPI_STATUS_NVM)\r
return true;\r
+\r
+ /* Manage software timeout */\r
+ if (TIFR0 & (1 << OCF0A))\r
+ {\r
+ TIFR0 |= (1 << OCF0A);\r
+ TimeoutMSRemaining--;\r
+ }\r
}\r
- \r
+\r
return false;\r
}\r
\r
bool TINYNVM_WaitWhileNVMControllerBusy(void)\r
{\r
/* Poll the STATUS register to check to see if NVM access has been enabled */\r
+ uint8_t TimeoutMSRemaining = 100;\r
while (TimeoutMSRemaining)\r
{\r
- /* Send the SIN command to read the TPI STATUS register to see the NVM bus is active */\r
- XPROGTarget_SendByte(TPI_CMD_SIN | XPROG_Param_NVMCSRRegAddr);\r
- if (XPROGTarget_ReceiveByte() & (1 << 7))\r
+ /* Send the SIN command to read the TPI STATUS register to see the NVM bus is busy */\r
+ TINYNVM_SendReadNVMRegister(XPROG_Param_NVMCSRRegAddr);\r
+\r
+ /* Check to see if the BUSY flag is still set */\r
+ if (!(XPROGTarget_ReceiveByte() & (1 << 7)))\r
return true;\r
+\r
+ /* Manage software timeout */\r
+ if (TIFR0 & (1 << OCF0A))\r
+ {\r
+ TIFR0 |= (1 << OCF0A);\r
+ TimeoutMSRemaining--;\r
+ }\r
}\r
- \r
+\r
return false;\r
}\r
\r
*\r
* \return Boolean true if the command sequence complete successfully\r
*/\r
-bool TINYNVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)\r
+bool TINYNVM_ReadMemory(const uint16_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)\r
{\r
/* Wait until the NVM controller is no longer busy */\r
if (!(TINYNVM_WaitWhileNVMControllerBusy()))\r
return false;\r
\r
/* Set the NVM control register to the NO OP command for memory reading */\r
- XPROGTarget_SendByte(TPI_CMD_SOUT | XPROG_Param_NVMCMDRegAddr);\r
+ TINYNVM_SendWriteNVMRegister(XPROG_Param_NVMCMDRegAddr);\r
XPROGTarget_SendByte(TINY_NVM_CMD_NOOP);\r
\r
/* Send the address of the location to read from */\r
return true;\r
}\r
\r
-/** Writes byte addressed memory to the target's memory spaces.\r
+/** Writes word addressed memory to the target's memory spaces.\r
*\r
- * \param[in] WriteAddress Start address to write to within the target's address space\r
- * \param[in] WriteBuffer Buffer to source data from\r
- * \param[in] WriteLength Total number of bytes to write to the device\r
+ * \param[in] WriteAddress Start address to write to within the target's address space\r
+ * \param[in] WriteBuffer Buffer to source data from\r
+ * \param[in] WriteLength Total number of bytes to write to the device (must be an integer multiple of 2)\r
*\r
* \return Boolean true if the command sequence complete successfully\r
*/\r
-bool TINYNVM_WriteMemory(const uint32_t WriteAddress, const uint8_t* WriteBuffer, uint16_t WriteLength)\r
+bool TINYNVM_WriteMemory(const uint16_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteLength)\r
{\r
/* Wait until the NVM controller is no longer busy */\r
if (!(TINYNVM_WaitWhileNVMControllerBusy()))\r
return false;\r
+ \r
+ /* Must have an integer number of words to write - if extra byte, word-align via a dummy high byte */\r
+ if (WriteLength & 0x01)\r
+ WriteBuffer[WriteLength++] = 0xFF;\r
\r
/* Set the NVM control register to the WORD WRITE command for memory reading */\r
- XPROGTarget_SendByte(TPI_CMD_SOUT | XPROG_Param_NVMCMDRegAddr);\r
+ TINYNVM_SendWriteNVMRegister(XPROG_Param_NVMCMDRegAddr);\r
XPROGTarget_SendByte(TINY_NVM_CMD_WORDWRITE);\r
\r
/* Send the address of the location to write to */\r
TINYNVM_SendPointerAddress(WriteAddress);\r
\r
- while (WriteLength--)\r
+ while (WriteLength)\r
{\r
- /* Write the byte of data to the target */\r
+ /* Wait until the NVM controller is no longer busy */\r
+ if (!(TINYNVM_WaitWhileNVMControllerBusy()))\r
+ return false;\r
+\r
+ /* Write the low byte of data to the target */\r
+ XPROGTarget_SendByte(TPI_CMD_SST | TPI_POINTER_INDIRECT_PI);\r
+ XPROGTarget_SendByte(*(WriteBuffer++));\r
+ \r
+ /* Write the high byte of data to the target */\r
XPROGTarget_SendByte(TPI_CMD_SST | TPI_POINTER_INDIRECT_PI);\r
XPROGTarget_SendByte(*(WriteBuffer++));\r
+\r
+ /* Need to decrement the write length twice, since we read out a whole word */\r
+ WriteLength -= 2;\r
}\r
\r
return true;\r
\r
/** Erases the target's memory space.\r
*\r
+ * \param[in] EraseCommand NVM erase command to send to the device\r
+ * \param[in] Address Address inside the memory space to erase\r
+ *\r
* \return Boolean true if the command sequence complete successfully\r
*/\r
-bool TINYNVM_EraseMemory(void)\r
+bool TINYNVM_EraseMemory(const uint8_t EraseCommand, const uint16_t Address)\r
{\r
/* Wait until the NVM controller is no longer busy */\r
if (!(TINYNVM_WaitWhileNVMControllerBusy()))\r
return false;\r
\r
- /* Set the NVM control register to the CHIP ERASE command to erase the target */\r
- XPROGTarget_SendByte(TPI_CMD_SOUT | XPROG_Param_NVMCMDRegAddr);\r
- XPROGTarget_SendByte(TINY_NVM_CMD_CHIPERASE); \r
+ /* Set the NVM control register to the target memory erase command */\r
+ TINYNVM_SendWriteNVMRegister(XPROG_Param_NVMCMDRegAddr);\r
+ XPROGTarget_SendByte(EraseCommand);\r
\r
- /* Wait until the NVM bus is ready again */\r
- if (!(TINYNVM_WaitWhileNVMBusBusy()))\r
+ /* Write to a high byte location within the target address space to start the erase process */\r
+ TINYNVM_SendPointerAddress(Address | 0x0001);\r
+ XPROGTarget_SendByte(TPI_CMD_SST | TPI_POINTER_INDIRECT);\r
+ XPROGTarget_SendByte(0x00);\r
+\r
+ /* Wait until the NVM controller is no longer busy */\r
+ if (!(TINYNVM_WaitWhileNVMControllerBusy()))\r
return false;\r
\r
return true;\r
projects / pub / USBasp.git / blobdiff