Fixed AVRISP-MKII clone project not starting the target's program automatically after...
[pub/USBasp.git] / Projects / AVRISP-MKII / Lib / ISP / ISPTarget.c
1 /*
2 LUFA Library
3 Copyright (C) Dean Camera, 2010.
4
5 dean [at] fourwalledcubicle [dot] com
6 www.lufa-lib.org
7 */
8
9 /*
10 Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)
11
12 Permission to use, copy, modify, distribute, and sell this
13 software and its documentation for any purpose is hereby granted
14 without fee, provided that the above copyright notice appear in
15 all copies and that both that the copyright notice and this
16 permission notice and warranty disclaimer appear in supporting
17 documentation, and that the name of the author not be used in
18 advertising or publicity pertaining to distribution of the
19 software without specific, written prior permission.
20
21 The author disclaim all warranties with regard to this
22 software, including all implied warranties of merchantability
23 and fitness. In no event shall the author be liable for any
24 special, indirect or consequential damages or any damages
25 whatsoever resulting from loss of use, data or profits, whether
26 in an action of contract, negligence or other tortious action,
27 arising out of or in connection with the use or performance of
28 this software.
29 */
30
31 /** \file
32 *
33 * Target-related functions for the ISP Protocol decoder.
34 */
35
36 #include "ISPTarget.h"
37
38 #if defined(ENABLE_ISP_PROTOCOL) || defined(__DOXYGEN__)
39
40 /** List of hardware SPI prescaler masks for possible AVRStudio ISP programming speeds.
41 *
42 * \hideinitializer
43 */
44 static uint8_t SPIMaskFromSCKDuration[] PROGMEM =
45 {
46 #if (F_CPU == 8000000)
47 SPI_SPEED_FCPU_DIV_2, // AVRStudio = 8MHz SPI, Actual = 4MHz SPI
48 SPI_SPEED_FCPU_DIV_2, // AVRStudio = 4MHz SPI, Actual = 4MHz SPI
49 SPI_SPEED_FCPU_DIV_4, // AVRStudio = 2MHz SPI, Actual = 2MHz SPI
50 SPI_SPEED_FCPU_DIV_8, // AVRStudio = 1MHz SPI, Actual = 1MHz SPI
51 SPI_SPEED_FCPU_DIV_16, // AVRStudio = 500KHz SPI, Actual = 500KHz SPI
52 SPI_SPEED_FCPU_DIV_32, // AVRStudio = 250KHz SPI, Actual = 250KHz SPI
53 SPI_SPEED_FCPU_DIV_64, // AVRStudio = 125KHz SPI, Actual = 125KHz SPI
54 #elif (F_CPU == 16000000)
55 SPI_SPEED_FCPU_DIV_2, // AVRStudio = 8MHz SPI, Actual = 8MHz SPI
56 SPI_SPEED_FCPU_DIV_4, // AVRStudio = 4MHz SPI, Actual = 4MHz SPI
57 SPI_SPEED_FCPU_DIV_8, // AVRStudio = 2MHz SPI, Actual = 2MHz SPI
58 SPI_SPEED_FCPU_DIV_16, // AVRStudio = 1MHz SPI, Actual = 1MHz SPI
59 SPI_SPEED_FCPU_DIV_32, // AVRStudio = 500KHz SPI, Actual = 500KHz SPI
60 SPI_SPEED_FCPU_DIV_64, // AVRStudio = 250KHz SPI, Actual = 250KHz SPI
61 SPI_SPEED_FCPU_DIV_128 // AVRStudio = 125KHz SPI, Actual = 125KHz SPI
62 #else
63 #error No SPI prescaler masks for chosen F_CPU speed.
64 #endif
65 };
66
67 /** Lookup table to convert the slower ISP speeds into a compare value for the software SPI driver.
68 *
69 * \hideinitializer
70 */
71 static uint16_t TimerCompareFromSCKDuration[] PROGMEM =
72 {
73 TIMER_COMP(96386), TIMER_COMP(89888), TIMER_COMP(84211), TIMER_COMP(79208), TIMER_COMP(74767),
74 TIMER_COMP(70797), TIMER_COMP(67227), TIMER_COMP(64000), TIMER_COMP(61069), TIMER_COMP(58395),
75 TIMER_COMP(55945), TIMER_COMP(51613), TIMER_COMP(49690), TIMER_COMP(47905), TIMER_COMP(46243),
76 TIMER_COMP(43244), TIMER_COMP(41885), TIMER_COMP(39409), TIMER_COMP(38278), TIMER_COMP(36200),
77 TIMER_COMP(34335), TIMER_COMP(32654), TIMER_COMP(31129), TIMER_COMP(29740), TIMER_COMP(28470),
78 TIMER_COMP(27304), TIMER_COMP(25724), TIMER_COMP(24768), TIMER_COMP(23461), TIMER_COMP(22285),
79 TIMER_COMP(21221), TIMER_COMP(20254), TIMER_COMP(19371), TIMER_COMP(18562), TIMER_COMP(17583),
80 TIMER_COMP(16914), TIMER_COMP(16097), TIMER_COMP(15356), TIMER_COMP(14520), TIMER_COMP(13914),
81 TIMER_COMP(13224), TIMER_COMP(12599), TIMER_COMP(12031), TIMER_COMP(11511), TIMER_COMP(10944),
82 TIMER_COMP(10431), TIMER_COMP(9963), TIMER_COMP(9468), TIMER_COMP(9081), TIMER_COMP(8612),
83 TIMER_COMP(8239), TIMER_COMP(7851), TIMER_COMP(7498), TIMER_COMP(7137), TIMER_COMP(6809),
84 TIMER_COMP(6478), TIMER_COMP(6178), TIMER_COMP(5879), TIMER_COMP(5607), TIMER_COMP(5359),
85 TIMER_COMP(5093), TIMER_COMP(4870), TIMER_COMP(4633), TIMER_COMP(4418), TIMER_COMP(4209),
86 TIMER_COMP(4019), TIMER_COMP(3823), TIMER_COMP(3645), TIMER_COMP(3474), TIMER_COMP(3310),
87 TIMER_COMP(3161), TIMER_COMP(3011), TIMER_COMP(2869), TIMER_COMP(2734), TIMER_COMP(2611),
88 TIMER_COMP(2484), TIMER_COMP(2369), TIMER_COMP(2257), TIMER_COMP(2152), TIMER_COMP(2052),
89 TIMER_COMP(1956), TIMER_COMP(1866), TIMER_COMP(1779), TIMER_COMP(1695), TIMER_COMP(1615),
90 TIMER_COMP(1539), TIMER_COMP(1468), TIMER_COMP(1398), TIMER_COMP(1333), TIMER_COMP(1271),
91 TIMER_COMP(1212), TIMER_COMP(1155), TIMER_COMP(1101), TIMER_COMP(1049), TIMER_COMP(1000),
92 TIMER_COMP(953), TIMER_COMP(909), TIMER_COMP(866), TIMER_COMP(826), TIMER_COMP(787),
93 TIMER_COMP(750), TIMER_COMP(715), TIMER_COMP(682), TIMER_COMP(650), TIMER_COMP(619),
94 TIMER_COMP(590), TIMER_COMP(563), TIMER_COMP(536), TIMER_COMP(511), TIMER_COMP(487),
95 TIMER_COMP(465), TIMER_COMP(443), TIMER_COMP(422), TIMER_COMP(402), TIMER_COMP(384),
96 TIMER_COMP(366), TIMER_COMP(349), TIMER_COMP(332), TIMER_COMP(317), TIMER_COMP(302),
97 TIMER_COMP(288), TIMER_COMP(274), TIMER_COMP(261), TIMER_COMP(249), TIMER_COMP(238),
98 TIMER_COMP(226), TIMER_COMP(216), TIMER_COMP(206), TIMER_COMP(196), TIMER_COMP(187),
99 TIMER_COMP(178), TIMER_COMP(170), TIMER_COMP(162), TIMER_COMP(154), TIMER_COMP(147),
100 TIMER_COMP(140), TIMER_COMP(134), TIMER_COMP(128), TIMER_COMP(122), TIMER_COMP(116),
101 TIMER_COMP(111), TIMER_COMP(105), TIMER_COMP(100), TIMER_COMP(95.4), TIMER_COMP(90.9),
102 TIMER_COMP(86.6), TIMER_COMP(82.6), TIMER_COMP(78.7), TIMER_COMP(75.0), TIMER_COMP(71.5),
103 TIMER_COMP(68.2), TIMER_COMP(65.0), TIMER_COMP(61.9), TIMER_COMP(59.0), TIMER_COMP(56.3),
104 TIMER_COMP(53.6), TIMER_COMP(51.1)
105 };
106
107 /** Currently selected SPI driver, either hardware (for fast ISP speeds) or software (for slower ISP speeds). */
108 bool HardwareSPIMode = true;
109
110 /** Software SPI data register for sending and receiving */
111 volatile uint8_t SoftSPI_Data;
112
113 /** Number of bits left to transfer in the software SPI driver */
114 volatile uint8_t SoftSPI_BitsRemaining;
115
116
117 /** ISR to handle software SPI transmission and reception */
118 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
119 {
120 if (!(PINB & (1 << 1)))
121 {
122 if (SoftSPI_Data & (1 << 7))
123 PORTB |= (1 << 2);
124 else
125 PORTB &= ~(1 << 2);
126 }
127 else
128 {
129 SoftSPI_Data <<= 1;
130
131 if (!(SoftSPI_BitsRemaining--))
132 TCCR1B = 0;
133
134 if (PINB & (1 << 3))
135 SoftSPI_Data |= (1 << 0);
136 }
137
138 /* Fast toggle of PORTB.1 via the PIN register (see datasheet) */
139 PINB |= (1 << 1);
140 }
141
142 /** Initialises the appropriate SPI driver (hardware or software, depending on the selected ISP speed) ready for
143 * communication with the attached target.
144 */
145 void ISPTarget_EnableTargetISP(void)
146 {
147 uint8_t SCKDuration = V2Params_GetParameterValue(PARAM_SCK_DURATION);
148
149 if (SCKDuration < sizeof(SPIMaskFromSCKDuration))
150 {
151 HardwareSPIMode = true;
152
153 SPI_Init(pgm_read_byte(&SPIMaskFromSCKDuration[SCKDuration]) | SPI_ORDER_MSB_FIRST |
154 SPI_SCK_LEAD_RISING | SPI_SAMPLE_LEADING | SPI_MODE_MASTER);
155 }
156 else
157 {
158 HardwareSPIMode = false;
159
160 DDRB |= ((1 << 1) | (1 << 2));
161 PORTB |= ((1 << 0) | (1 << 3));
162
163 ISPTarget_ConfigureSoftwareISP(SCKDuration);
164 }
165 }
166
167 /** Shuts down the current selected SPI driver (hardware or software, depending on the selected ISP speed) so that no
168 * further communications can occur until the driver is re-initialized.
169 */
170 void ISPTarget_DisableTargetISP(void)
171 {
172 if (HardwareSPIMode)
173 {
174 SPI_ShutDown();
175 }
176 else
177 {
178 DDRB &= ~((1 << 1) | (1 << 2));
179 PORTB &= ~((1 << 0) | (1 << 3));
180
181 ISPTarget_ConfigureRescueClock();
182 }
183 }
184
185 /** Configures the AVR to produce a .5MHz rescue clock out of the OCR1A pin of the AVR, so
186 * that it can be fed into the XTAL1 pin of an AVR whose fuses have been misconfigured for
187 * an external clock rather than a crystal. When used, the ISP speed must be 125KHz for this
188 * functionality to work correctly.
189 */
190 void ISPTarget_ConfigureRescueClock(void)
191 {
192 #if defined(XCK_RESCUE_CLOCK_ENABLE)
193 /* Configure XCK as an output for the specified AVR model */
194 DDRD |= (1 << 5);
195
196 /* Start USART to generate a 4MHz clock on the XCK pin */
197 UBRR1 = ((F_CPU / 2 / ISP_RESCUE_CLOCK_SPEED) - 1);
198 UCSR1B = (1 << TXEN1);
199 UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
200 #else
201 /* Configure OCR1A as an output for the specified AVR model */
202 #if defined(USB_SERIES_2_AVR)
203 DDRC |= (1 << 6);
204 #else
205 DDRB |= (1 << 5);
206 #endif
207
208 /* Start Timer 1 to generate a 4MHz clock on the OCR1A pin */
209 TIMSK1 = 0;
210 TCNT1 = 0;
211 OCR1A = ((F_CPU / 2 / ISP_RESCUE_CLOCK_SPEED) - 1);
212 TCCR1A = (1 << COM1A0);
213 TCCR1B = ((1 << WGM12) | (1 << CS10));
214 #endif
215 }
216
217 /** Configures the AVR's timer ready to produce software ISP for the slower ISP speeds that
218 * cannot be obtained when using the AVR's hardware SPI module.
219 *
220 * \param[in] SCKDuration Duration of the desired software ISP SCK clock
221 */
222 void ISPTarget_ConfigureSoftwareISP(const uint8_t SCKDuration)
223 {
224 /* Configure Timer 1 for software ISP using the specified SCK duration */
225 TIMSK1 = (1 << OCIE1A);
226 TCNT1 = 0;
227 OCR1A = pgm_read_word(&TimerCompareFromSCKDuration[SCKDuration - sizeof(SPIMaskFromSCKDuration)]);
228 TCCR1A = 0;
229 TCCR1B = 0;
230 }
231
232 /** Sends and receives a single byte of data to and from the attached target via software SPI.
233 *
234 * \param[in] Byte Byte of data to send to the attached target
235 *
236 * \return Received byte of data from the attached target
237 */
238 uint8_t ISPTarget_TransferSoftSPIByte(const uint8_t Byte)
239 {
240 SoftSPI_Data = Byte;
241 SoftSPI_BitsRemaining = 8;
242
243 if (SoftSPI_Data & 0x01)
244 PORTB |= (1 << 2);
245 else
246 PORTB &= ~(1 << 2);
247
248 TCNT1 = 0;
249 TCCR1B = ((1 << WGM12) | (1 << CS11));
250 while (SoftSPI_BitsRemaining && TimeoutTicksRemaining);
251 TCCR1B = 0;
252
253 return SoftSPI_Data;
254 }
255
256 /** Asserts or deasserts the target's reset line, using the correct polarity as set by the host using a SET PARAM command.
257 * When not asserted, the line is tristated so as not to interfere with normal device operation.
258 *
259 * \param[in] ResetTarget Boolean true when the target should be held in reset, false otherwise
260 */
261 void ISPTarget_ChangeTargetResetLine(const bool ResetTarget)
262 {
263 if (ResetTarget)
264 {
265 AUX_LINE_DDR |= AUX_LINE_MASK;
266
267 if (!(V2Params_GetParameterValue(PARAM_RESET_POLARITY)))
268 AUX_LINE_PORT |= AUX_LINE_MASK;
269 else
270 AUX_LINE_PORT &= ~AUX_LINE_MASK;
271 }
272 else
273 {
274 AUX_LINE_DDR &= ~AUX_LINE_MASK;
275 AUX_LINE_PORT &= ~AUX_LINE_MASK;
276 }
277 }
278
279 /** Waits until the target has completed the last operation, by continuously polling the device's
280 * BUSY flag until it is cleared, or until the command timeout period has expired.
281 *
282 * \return V2 Protocol status \ref STATUS_CMD_OK if the no timeout occurred, \ref STATUS_RDY_BSY_TOUT otherwise
283 */
284 uint8_t ISPTarget_WaitWhileTargetBusy(void)
285 {
286 do
287 {
288 ISPTarget_SendByte(0xF0);
289 ISPTarget_SendByte(0x00);
290 ISPTarget_SendByte(0x00);
291 }
292 while ((ISPTarget_ReceiveByte() & 0x01) && TimeoutTicksRemaining);
293
294 return TimeoutTicksRemaining ? STATUS_CMD_OK : STATUS_RDY_BSY_TOUT;
295 }
296
297 /** Sends a low-level LOAD EXTENDED ADDRESS command to the target, for addressing of memory beyond the
298 * 64KB boundary. This sends the command with the correct address as indicated by the current address
299 * pointer variable set by the host when a SET ADDRESS command is issued.
300 */
301 void ISPTarget_LoadExtendedAddress(void)
302 {
303 ISPTarget_SendByte(LOAD_EXTENDED_ADDRESS_CMD);
304 ISPTarget_SendByte(0x00);
305 ISPTarget_SendByte((CurrentAddress & 0x00FF0000) >> 16);
306 ISPTarget_SendByte(0x00);
307 }
308
309 /** Waits until the last issued target memory programming command has completed, via the check mode given and using
310 * the given parameters.
311 *
312 * \param[in] ProgrammingMode Programming mode used and completion check to use, a mask of PROG_MODE_* constants
313 * \param[in] PollAddress Memory address to poll for completion if polling check mode used
314 * \param[in] PollValue Poll value to check against if polling check mode used
315 * \param[in] DelayMS Milliseconds to delay before returning if delay check mode used
316 * \param[in] ReadMemCommand Device low-level READ MEMORY command to send if value check mode used
317 *
318 * \return V2 Protocol status \ref STATUS_CMD_OK if the no timeout occurred, \ref STATUS_RDY_BSY_TOUT or
319 * \ref STATUS_CMD_TOUT otherwise
320 */
321 uint8_t ISPTarget_WaitForProgComplete(const uint8_t ProgrammingMode,
322 const uint16_t PollAddress,
323 const uint8_t PollValue,
324 const uint8_t DelayMS,
325 const uint8_t ReadMemCommand)
326 {
327 uint8_t ProgrammingStatus = STATUS_CMD_OK;
328
329 /* Determine method of Programming Complete check */
330 switch (ProgrammingMode & ~(PROG_MODE_PAGED_WRITES_MASK | PROG_MODE_COMMIT_PAGE_MASK))
331 {
332 case PROG_MODE_WORD_TIMEDELAY_MASK:
333 case PROG_MODE_PAGED_TIMEDELAY_MASK:
334 ISPProtocol_DelayMS(DelayMS);
335 break;
336 case PROG_MODE_WORD_VALUE_MASK:
337 case PROG_MODE_PAGED_VALUE_MASK:
338 do
339 {
340 ISPTarget_SendByte(ReadMemCommand);
341 ISPTarget_SendByte(PollAddress >> 8);
342 ISPTarget_SendByte(PollAddress & 0xFF);
343 }
344 while ((ISPTarget_TransferByte(0x00) == PollValue) && TimeoutTicksRemaining);
345
346 if (!(TimeoutTicksRemaining))
347 ProgrammingStatus = STATUS_CMD_TOUT;
348
349 break;
350 case PROG_MODE_WORD_READYBUSY_MASK:
351 case PROG_MODE_PAGED_READYBUSY_MASK:
352 ProgrammingStatus = ISPTarget_WaitWhileTargetBusy();
353 break;
354 }
355
356 return ProgrammingStatus;
357 }
358
359 #endif
360