Projects/AVRISP/Lib/NVMTarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2009.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, and distribute this software
  13   and its documentation for any purpose and without fee is hereby
  14   granted, provided that the above copyright notice appear in all
  15   copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 /** \file
  32  *
  33  *  Target-related functions for the target's NVM module.
  34  */
  35
  36 #define  INCLUDE_FROM_NVMTARGET_C
  37 #include "NVMTarget.h"
  38
  39 #if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
  40
  41 /** Sends the given NVM register address to the target.
  42  *
  43  *  \param[in] Register  NVM register whose absolute address is to be sent
  44  */
  45 void NVMTarget_SendNVMRegAddress(uint8_t Register)
  46 {
  47         /* Determine the absolute register address from the NVM base memory address and the NVM register address */
  48         uint32_t Address = XPROG_Param_NVMBase | Register;
  49
  50         /* Send the calculated 32-bit address to the target, LSB first */
  51         PDITarget_SendByte(Address &  0xFF);
  52         PDITarget_SendByte(Address >> 8);
  53         PDITarget_SendByte(Address >> 16);
  54         PDITarget_SendByte(Address >> 24);
  55 }
  56
  57 /** Sends the given 32-bit absolute address to the target.
  58  *
  59  *  \param[in] AbsoluteAddress  Absolute address to send to the target
  60  */
  61 void NVMTarget_SendAddress(uint32_t AbsoluteAddress)
  62 {
  63         /* Send the given 32-bit address to the target, LSB first */
  64         PDITarget_SendByte(AbsoluteAddress &  0xFF);
  65         PDITarget_SendByte(AbsoluteAddress >> 8);
  66         PDITarget_SendByte(AbsoluteAddress >> 16);
  67         PDITarget_SendByte(AbsoluteAddress >> 24);
  68 }
  69
  70 /** Waits while the target's NVM controller is busy performing an operation, exiting if the
  71  *  timeout period expires.
  72  *
  73  *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
  74  */
  75 bool NVMTarget_WaitWhileNVMControllerBusy(void)
  76 {
  77         TCNT0 = 0;
  78
  79         /* Poll the NVM STATUS register while the NVM controller is busy */
  80         while (TCNT0 < NVM_BUSY_TIMEOUT_MS)
  81         {
  82                 /* Send a LDS command to read the NVM STATUS register to check the BUSY flag */
  83                 PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
  84                 NVMTarget_SendNVMRegAddress(NVM_REG_STATUS);
  85
  86                 /* Check to see if the BUSY flag is still set */
  87                 if (!(PDITarget_ReceiveByte() & (1 << 7)))
  88                   return true;
  89         }
  90
  91         return false;
  92 }
  93
  94 /** Retrieves the CRC value of the given memory space.
  95  *
  96  *  \param[in] CRCCommand  NVM CRC command to issue to the target
  97  *
  98  *  \return 24-bit CRC value for the given address space
  99  */
 100 uint32_t NVMTarget_GetMemoryCRC(uint8_t CRCCommand)
 101 {
 102         uint32_t MemoryCRC;
 103
 104         NVMTarget_WaitWhileNVMControllerBusy();
 105
 106         /* Set the NVM command to the correct CRC read command */
 107         PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
 108         NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
 109         PDITarget_SendByte(CRCCommand);
 110
 111         /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
 112         PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
 113         NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);
 114         PDITarget_SendByte(1 << 0);
 115
 116         /* Wait until the NVM bus and controller is no longer busy */
 117         PDITarget_WaitWhileNVMBusBusy();
 118         NVMTarget_WaitWhileNVMControllerBusy();
 119
 120         /* Read the first generated CRC byte value */
 121         PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
 122         NVMTarget_SendNVMRegAddress(NVM_REG_DAT0);
 123         MemoryCRC  = PDITarget_ReceiveByte();
 124
 125         /* Read the second generated CRC byte value */
 126         PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
 127         NVMTarget_SendNVMRegAddress(NVM_REG_DAT1);
 128         MemoryCRC |= ((uint16_t)PDITarget_ReceiveByte() << 8);
 129
 130         /* Read the third generated CRC byte value */
 131         PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
 132         NVMTarget_SendNVMRegAddress(NVM_REG_DAT2);
 133         MemoryCRC |= ((uint32_t)PDITarget_ReceiveByte() << 16);
 134
 135         return MemoryCRC;
 136 }
 137
 138 /** Reads memory from the target's memory spaces.
 139  *
 140  *  \param[in]  ReadAddress  Start address to read from within the target's address space
 141  *  \param[out] ReadBuffer   Buffer to store read data into
 142  *  \param[in]  ReadSize     Number of bytes to read
 143  */
 144 void NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)
 145 {
 146         NVMTarget_WaitWhileNVMControllerBusy();
 147
 148         /* Send the READNVM command to the NVM controller for reading of an aribtrary location */
 149         PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
 150         NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
 151         PDITarget_SendByte(NVM_CMD_READNVM);
 152
 153         /* Send the address of the first location to read from - this also primes the internal address
 154          * counters so that we can use the REPEAT command later to save on overhead for multiple bytes */
 155         PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
 156         NVMTarget_SendAddress(ReadAddress);
 157         *(ReadBuffer++) = PDITarget_ReceiveByte();
 158
 159         /* Check to see if we are reading more than a single byte */
 160         if (ReadSize > 1)
 161         {
 162                 /* Decrement the ReadSize counter as we have already read once byte of memory */
 163                 ReadSize--;
 164
 165                 /* Send the REPEAT command with the specified number of bytes remaining to read */
 166                 PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_2BYTES);
 167                 PDITarget_SendByte(ReadSize &  0xFF);
 168                 PDITarget_SendByte(ReadSize >> 8);
 169
 170                 /* Send a LD command with indirect access and postincrement to read out the remaining bytes */
 171                 PDITarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
 172                 for (uint16_t i = 1; i < ReadSize; i++)
 173                   *(ReadBuffer++) = PDITarget_ReceiveByte();
 174         }
 175 }
 176
 177 /** Erases a specific memory space of the target.
 178  *
 179  *  \param[in] EraseCommand  NVM erase command to send to the device
 180  *  \param[in] Address  Address inside the memory space to erase
 181  */
 182 void NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address)
 183 {
 184         NVMTarget_WaitWhileNVMControllerBusy();
 185
 186         PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
 187         NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
 188         PDITarget_SendByte(EraseCommand);
 189
 190         /* Chip erase is handled seperately, since it's procedure is different to other erase types */
 191         if (EraseCommand == NVM_CMD_CHIPERASE)
 192         {
 193                 /* Set CMDEX bit in NVM CTRLA register to start the chip erase */
 194                 PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
 195                 NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);
 196                 PDITarget_SendByte(1 << 0);
 197         }
 198         else
 199         {
 200                 /* Other erase modes just need us to address a byte within the target memory space */
 201                 PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
 202                 NVMTarget_SendAddress(Address);
 203                 PDITarget_SendByte(0x00);
 204         }
 205
 206         /* Wait until both the NVM bus and NVM controller are ready again */
 207         PDITarget_WaitWhileNVMBusBusy();
 208         NVMTarget_WaitWhileNVMControllerBusy();
 209 }
 210
 211 #endif