Added new SCSI_ASENSE_NOT_READY_TO_READY_CHANGE constant to the Mass Storage class...
[pub/USBasp.git] / LUFA / Drivers / Peripheral / AVRU4U6U7 / ADC.h
1 /*
2 LUFA Library
3 Copyright (C) Dean Camera, 2010.
4
5 dean [at] fourwalledcubicle [dot] com
6 www.fourwalledcubicle.com
7 */
8
9 /*
10 Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)
11
12 Permission to use, copy, modify, distribute, and sell this
13 software and its documentation for any purpose is hereby granted
14 without fee, provided that the above copyright notice appear in
15 all copies and that both that the copyright notice and this
16 permission notice and warranty disclaimer appear in supporting
17 documentation, and that the name of the author not be used in
18 advertising or publicity pertaining to distribution of the
19 software without specific, written prior permission.
20
21 The author disclaim all warranties with regard to this
22 software, including all implied warranties of merchantability
23 and fitness. In no event shall the author be liable for any
24 special, indirect or consequential damages or any damages
25 whatsoever resulting from loss of use, data or profits, whether
26 in an action of contract, negligence or other tortious action,
27 arising out of or in connection with the use or performance of
28 this software.
29 */
30
31 /** \file
32 * \brief ADC peripheral driver for the U7, U6 and U4 USB AVRs.
33 *
34 * ADC driver for the AT90USB1287, AT90USB1286, AT90USB647, AT90USB646, ATMEGA16U4 and ATMEGA32U4 AVRs.
35 *
36 * \note This file should not be included directly. It is automatically included as needed by the ADC driver
37 * dispatch header located in LUFA/Drivers/Peripheral/ADC.h.
38 */
39
40 /** \ingroup Group_ADC
41 * @defgroup Group_ADC_AVRU4U6U7 Series U4, U6 and U7 Model ADC Driver
42 *
43 * ADC driver for the AT90USB1287, AT90USB1286, AT90USB647, AT90USB646, ATMEGA16U4 and ATMEGA32U4 AVRs.
44 *
45 * \note This file should not be included directly. It is automatically included as needed by the ADC driver
46 * dispatch header located in LUFA/Drivers/Peripheral/ADC.h.
47 *
48 * @{
49 */
50
51 #ifndef __ADC_AVRU4U6U7_H__
52 #define __ADC_AVRU4U6U7_H__
53
54 /* Includes: */
55 #include "../../../Common/Common.h"
56
57 #include <avr/io.h>
58 #include <stdbool.h>
59
60 /* Enable C linkage for C++ Compilers: */
61 #if defined(__cplusplus)
62 extern "C" {
63 #endif
64
65 /* Preprocessor Checks: */
66 #if !defined(__INCLUDE_FROM_ADC_H)
67 #error Do not include this file directly. Include LUFA/Drivers/Peripheral/ADC.h instead.
68 #endif
69
70 /* Public Interface - May be used in end-application: */
71 /* Macros: */
72 /** Reference mask, for using the voltage present at the AVR's AREF pin for the ADC reference. */
73 #define ADC_REFERENCE_AREF 0
74
75 /** Reference mask, for using the voltage present at the AVR's AVCC pin for the ADC reference. */
76 #define ADC_REFERENCE_AVCC (1 << REFS0)
77
78 /** Reference mask, for using the internally generated 2.56V reference voltage as the ADC reference. */
79 #define ADC_REFERENCE_INT2560MV ((1 << REFS1) | (1 << REFS0))
80
81 /** Left-adjusts the 10-bit ADC result, so that the upper 8 bits of the value returned by the
82 * ADC_GetResult() macro contain the 8 most significant bits of the result. */
83 #define ADC_LEFT_ADJUSTED (1 << ADLAR)
84
85 /** Right-adjusts the 10-bit ADC result, so that the lower 8 bits of the value returned by the
86 * ADC_GetResult() macro contain the 8 least significant bits of the result. */
87 #define ADC_RIGHT_ADJUSTED (0 << ADLAR)
88
89 /** Sets the ADC mode to free running, so that conversions take place continuously as fast as the ADC
90 * is capable of at the given input clock speed. */
91 #define ADC_FREE_RUNNING (1 << ADATE)
92
93 /** Sets the ADC mode to single conversion, so that only a single conversion will take place before
94 * the ADC returns to idle. */
95 #define ADC_SINGLE_CONVERSION (0 << ADATE)
96
97 /** Sets the ADC input clock to prescale by a factor of 2 the AVR's system clock. */
98 #define ADC_PRESCALE_2 (1 << ADPS0)
99
100 /** Sets the ADC input clock to prescale by a factor of 4 the AVR's system clock. */
101 #define ADC_PRESCALE_4 (1 << ADPS1)
102
103 /** Sets the ADC input clock to prescale by a factor of 8 the AVR's system clock. */
104 #define ADC_PRESCALE_8 ((1 << ADPS0) | (1 << ADPS1))
105
106 /** Sets the ADC input clock to prescale by a factor of 16 the AVR's system clock. */
107 #define ADC_PRESCALE_16 (1 << ADPS2)
108
109 /** Sets the ADC input clock to prescale by a factor of 32 the AVR's system clock. */
110 #define ADC_PRESCALE_32 ((1 << ADPS2) | (1 << ADPS0))
111
112 /** Sets the ADC input clock to prescale by a factor of 64 the AVR's system clock. */
113 #define ADC_PRESCALE_64 ((1 << ADPS2) | (1 << ADPS1))
114
115 /** Sets the ADC input clock to prescale by a factor of 128 the AVR's system clock. */
116 #define ADC_PRESCALE_128 ((1 << ADPS2) | (1 << ADPS1) | (1 << ADPS0))
117
118 //@{
119 /** MUX mask define for the ADC0 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading. */
120 #define ADC_CHANNEL0 (0x00 << MUX0)
121
122 /** MUX mask define for the ADC1 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading. */
123 #define ADC_CHANNEL1 (0x01 << MUX0)
124
125 #if !(defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__) || defined(__DOXYGEN__))
126 /** MUX mask define for the ADC2 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading.
127 *
128 * \note Not available on all AVR models.
129 */
130 #define ADC_CHANNEL2 (0x02 << MUX0)
131
132 /** MUX mask define for the ADC3 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading.
133 *
134 * \note Not available on all AVR models.
135 */
136 #define ADC_CHANNEL3 (0x03 << MUX0)
137 #endif
138
139 /** MUX mask define for the ADC4 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading. */
140 #define ADC_CHANNEL4 (0x04 << MUX0)
141
142 /** MUX mask define for the ADC5 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading. */
143 #define ADC_CHANNEL5 (0x05 << MUX0)
144
145 /** MUX mask define for the ADC6 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading. */
146 #define ADC_CHANNEL6 (0x06 << MUX0)
147
148 /** MUX mask define for the ADC7 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading. */
149 #define ADC_CHANNEL7 (0x07 << MUX0)
150
151 /** MUX mask define for the internal 1.1V bandgap channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading. */
152 #define ADC_1100MV_BANDGAP (0x1E << MUX0)
153
154 #if (defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__) || defined(__DOXYGEN__))
155 /** MUX mask define for the ADC8 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading.
156 *
157 * \note Not available on all AVR models.
158 */
159 #define ADC_CHANNEL8 ((1 << 8) | (0x00 << MUX0))
160
161 /** MUX mask define for the ADC9 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading.
162 *
163 * \note Not available on all AVR models.
164 */
165 #define ADC_CHANNEL9 ((1 << 8) | (0x01 << MUX0))
166
167 /** MUX mask define for the ADC10 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading.
168 *
169 * \note Not available on all AVR models.
170 */
171 #define ADC_CHANNEL10 ((1 << 8) | (0x02 << MUX0))
172
173 /** MUX mask define for the ADC11 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading.
174 *
175 * \note Not available on all AVR models.
176 */
177 #define ADC_CHANNEL11 ((1 << 8) | (0x03 << MUX0))
178
179 /** MUX mask define for the ADC12 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading.
180 *
181 * \note Not available on all AVR models.
182 */
183 #define ADC_CHANNEL12 ((1 << 8) | (0x04 << MUX0))
184
185 /** MUX mask define for the ADC13 channel of the ADC. See \ref ADC_StartReading and \ref ADC_GetChannelReading.
186 *
187 * \note Not available on all AVR models.
188 */
189 #define ADC_CHANNEL13 ((1 << 8) | (0x05 << MUX0))
190
191 /** MUX mask define for the internal temperature sensor channel of the ADC. See \ref ADC_StartReading and
192 * \ref ADC_GetChannelReading.
193 *
194 * \note Not available on all AVR models.
195 */
196 #define ADC_INT_TEMP_SENS ((1 << 8) | (0x07 << MUX0))
197 #endif
198 //@}
199
200 /* Inline Functions: */
201 /** Configures the given ADC channel, ready for ADC conversions. This function sets the
202 * associated port pin as an input and disables the digital portion of the I/O to reduce
203 * power consumption.
204 *
205 * \note This must only be called for ADC channels with are connected to a physical port
206 * pin of the AVR, denoted by its special alternative function ADCx.
207 * \n\n
208 *
209 * \note The channel number must be specified as an integer, and NOT a ADC_CHANNELx mask.
210 *
211 * \param[in] Channel ADC channel number to set up for conversions.
212 */
213 static inline void ADC_SetupChannel(const uint8_t Channel)
214 {
215 #if (defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB646__) || \
216 defined(__AVR_AT90USB1287__) || defined(__AVR_AT90USB647__) || \
217 defined(__AVR_ATmega32U6__))
218 DDRF &= ~(1 << Channel);
219 DIDR0 |= (1 << Channel);
220 #elif (defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__))
221 if (Channel < 8)
222 {
223 DDRF &= ~(1 << Channel);
224 DIDR0 |= (1 << Channel);
225 }
226 else if (Channel == 8)
227 {
228 DDRD &= ~(1 << 4);
229 DIDR2 |= (1 << 0);
230 }
231 else if (Channel < 11)
232 {
233 DDRD &= ~(1 << (Channel - 3));
234 DIDR2 |= (1 << (Channel - 8));
235 }
236 else
237 {
238 DDRB &= ~(1 << (Channel - 7));
239 DIDR2 |= (1 << (Channel - 8));
240 }
241 #endif
242 }
243
244 /** De-configures the given ADC channel, re-enabling digital I/O mode instead of analog. This
245 * function sets the associated port pin as an input and re-enabled the digital portion of
246 * the I/O.
247 *
248 * \note This must only be called for ADC channels with are connected to a physical port
249 * pin of the AVR, denoted by its special alternative function ADCx.
250 * \n\n
251 *
252 * \note The channel number must be specified as an integer, and NOT a ADC_CHANNELx mask.
253 *
254 * \param[in] Channel ADC channel number to set up for conversions.
255 */
256 static inline void ADC_DisableChannel(const uint8_t Channel)
257 {
258 #if (defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB646__) || \
259 defined(__AVR_AT90USB1287__) || defined(__AVR_AT90USB647__) || \
260 defined(__AVR_ATmega32U6__))
261 DDRF &= ~(1 << Channel);
262 DIDR0 &= ~(1 << Channel);
263 #elif (defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__))
264 if (Channel < 8)
265 {
266 DDRF &= ~(1 << Channel);
267 DIDR0 &= ~(1 << Channel);
268 }
269 else if (Channel == 8)
270 {
271 DDRD &= ~(1 << 4);
272 DIDR2 &= ~(1 << 0);
273 }
274 else if (Channel < 11)
275 {
276 DDRD &= ~(1 << (Channel - 3));
277 DIDR2 &= ~(1 << (Channel - 8));
278 }
279 else
280 {
281 DDRB &= ~(1 << (Channel - 7));
282 DIDR2 &= ~(1 << (Channel - 8));
283 }
284 #endif
285 }
286
287 /** Starts the reading of the given channel, but does not wait until the conversion has completed.
288 * Once executed, the conversion status can be determined via the \ref ADC_IsReadingComplete() macro and
289 * the result read via the \ref ADC_GetResult() macro.
290 *
291 * If the ADC has been initialized in free running mode, calling this function once will begin the repeated
292 * conversions. If the ADC is in single conversion mode (or the channel to convert from is to be changed),
293 * this function must be called each time a conversion is to take place.
294 *
295 * \param[in] MUXMask Mask comprising of an ADC channel mask, reference mask and adjustment mask.
296 */
297 static inline void ADC_StartReading(const uint16_t MUXMask)
298 {
299 ADMUX = MUXMask;
300
301 #if (defined(__AVR_ATmega16U4__) || defined(__AVR_ATmega32U4__) || defined(__DOXYGEN__))
302 if (MUXMask & (1 << 8))
303 ADCSRB |= (1 << MUX5);
304 else
305 ADCSRB &= ~(1 << MUX5);
306 #endif
307
308 ADCSRA |= (1 << ADSC);
309 }
310
311 /** Indicates if the current ADC conversion is completed, or still in progress.
312 *
313 * \return Boolean false if the reading is still taking place, or true if the conversion is
314 * complete and ready to be read out with \ref ADC_GetResult().
315 */
316 static inline bool ADC_IsReadingComplete(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;
317 static inline bool ADC_IsReadingComplete(void)
318 {
319 return ((ADCSRA & (1 << ADIF)) ? true : false);
320 }
321
322 /** Retrieves the conversion value of the last completed ADC conversion and clears the reading
323 * completion flag.
324 *
325 * \return The result of the last ADC conversion as an unsigned value.
326 */
327 static inline uint16_t ADC_GetResult(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;
328 static inline uint16_t ADC_GetResult(void)
329 {
330 ADCSRA |= (1 << ADIF);
331 return ADC;
332 }
333
334 /** Performs a complete single reading from channel, including a polling spin-loop to wait for the
335 * conversion to complete, and the returning of the converted value.
336 *
337 * \note For free running mode, the automated conversions should be initialized with a single call
338 * to \ref ADC_StartReading() to select the channel and begin the automated conversions, and
339 * the results read directly from the \ref ADC_GetResult() instead to reduce overhead.
340 *
341 * \param[in] MUXMask Mask comprising of an ADC channel mask, reference mask and adjustment mask.
342 */
343 static inline uint16_t ADC_GetChannelReading(const uint16_t MUXMask) ATTR_WARN_UNUSED_RESULT;
344 static inline uint16_t ADC_GetChannelReading(const uint16_t MUXMask)
345 {
346 ADC_StartReading(MUXMask);
347
348 while (!(ADC_IsReadingComplete()));
349
350 return ADC_GetResult();
351 }
352
353 /** Initialises the ADC, ready for conversions. This must be called before any other ADC operations.
354 * The "mode" parameter should be a mask comprised of a conversion mode (free running or single) and
355 * prescaler masks.
356 *
357 * \param[in] Mode Mask of ADC settings, including adjustment, prescale, mode and reference.
358 */
359 static inline void ADC_Init(uint8_t Mode) ATTR_ALWAYS_INLINE;
360 static inline void ADC_Init(uint8_t Mode)
361 {
362 ADCSRA = ((1 << ADEN) | Mode);
363 }
364
365 /** Turns off the ADC. If this is called, any further ADC operations will require a call to
366 * \ref ADC_Init() before the ADC can be used again.
367 */
368 static inline void ADC_ShutDown(void) ATTR_ALWAYS_INLINE;
369 static inline void ADC_ShutDown(void)
370 {
371 ADCSRA = 0;
372 }
373
374 /** Indicates if the ADC is currently enabled.
375 *
376 * \return Boolean true if the ADC subsystem is currently enabled, false otherwise.
377 */
378 static inline bool ADC_GetStatus(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;
379 static inline bool ADC_GetStatus(void)
380 {
381 return ((ADCSRA & (1 << ADEN)) ? true : false);
382 }
383
384 /* Disable C linkage for C++ Compilers: */
385 #if defined(__cplusplus)
386 }
387 #endif
388
389 #endif
390
391 /** @} */