Projects/AVRISP/Lib/NVMTarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2009.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, and distribute this software
  13   and its documentation for any purpose and without fee is hereby
  14   granted, provided that the above copyright notice appear in all
  15   copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 /** \file
  32  *
  33  *  Target-related functions for the target's NVM module.
  34  */
  35
  36 #define  INCLUDE_FROM_NVMTARGET_C
  37 #include "NVMTarget.h"
  38
  39 #if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
  40
  41 /** Sends the given NVM register address to the target.
  42  *
  43  *  \param[in] Register  NVM register whose absolute address is to be sent
  44  */
  45 void NVMTarget_SendNVMRegAddress(uint8_t Register)
  46 {
  47         /* Determine the absolute register address from the NVM base memory address and the NVM register address */
  48         uint32_t Address = XPROG_Param_NVMBase | Register;
  49
  50         /* Send the calculated 32-bit address to the target, LSB first */
  51         PDITarget_SendByte(Address &  0xFF);
  52         PDITarget_SendByte(Address >> 8);
  53         PDITarget_SendByte(Address >> 16);
  54         PDITarget_SendByte(Address >> 24);
  55 }
  56
  57 /** Sends the given 32-bit absolute address to the target.
  58  *
  59  *  \param[in] AbsoluteAddress  Absolute address to send to the target
  60  */
  61 void NVMTarget_SendAddress(uint32_t AbsoluteAddress)
  62 {
  63         /* Send the given 32-bit address to the target, LSB first */
  64         PDITarget_SendByte(AbsoluteAddress &  0xFF);
  65         PDITarget_SendByte(AbsoluteAddress >> 8);
  66         PDITarget_SendByte(AbsoluteAddress >> 16);
  67         PDITarget_SendByte(AbsoluteAddress >> 24);
  68 }
  69
  70 /** Waits while the target's NVM controller is busy performing an operation, exiting if the
  71  *  timeout period expires.
  72  *
  73  *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
  74  */
  75 bool NVMTarget_WaitWhileNVMControllerBusy(void)
  76 {
  77         TCNT0 = 0;
  78
  79         /* Poll the NVM STATUS register while the NVM controller is busy */
  80         while (TCNT0 < NVM_BUSY_TIMEOUT_MS)
  81         {
  82                 /* Send a LDS command to read the NVM STATUS register to check the BUSY flag */
  83                 PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
  84                 NVMTarget_SendNVMRegAddress(NVM_REG_STATUS);
  85
  86                 /* Check to see if the BUSY flag is still set */
  87                 if (!(PDITarget_ReceiveByte() & (1 << 7)))
  88                   return true;
  89         }
  90
  91         return false;
  92 }
  93
  94 /** Retrieves the CRC value of the given memory space.
  95  *
  96  *  \param[in]  CRCCommand  NVM CRC command to issue to the target
  97  *  \param[out] CRCDest     CRC Destination when read from the target
  98  *
  99  *  \return Boolean true if the command sequence complete sucessfully
 100  */
 101 bool NVMTarget_GetMemoryCRC(uint8_t CRCCommand, uint32_t* CRCDest)
 102 {
 103         /* Wait until the NVM controller is no longer busy */
 104         if (!(NVMTarget_WaitWhileNVMControllerBusy()))
 105           return false;
 106
 107         /* Set the NVM command to the correct CRC read command */
 108         PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
 109         NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
 110         PDITarget_SendByte(CRCCommand);
 111
 112         /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
 113         PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
 114         NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);
 115         PDITarget_SendByte(1 << 0);
 116
 117         /* Wait until the NVM controller is no longer busy */
 118         if (!(NVMTarget_WaitWhileNVMControllerBusy()))
 119           return false;
 120
 121         *CRCDest = 0;
 122
 123         /* Read the first generated CRC byte value */
 124         PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
 125         NVMTarget_SendNVMRegAddress(NVM_REG_DAT0);
 126         *CRCDest  = PDITarget_ReceiveByte();
 127
 128         /* Read the second generated CRC byte value */
 129         PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
 130         NVMTarget_SendNVMRegAddress(NVM_REG_DAT1);
 131         *CRCDest |= ((uint16_t)PDITarget_ReceiveByte() << 8);
 132
 133         /* Read the third generated CRC byte value */
 134         PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
 135         NVMTarget_SendNVMRegAddress(NVM_REG_DAT2);
 136         *CRCDest |= ((uint32_t)PDITarget_ReceiveByte() << 16);
 137
 138         return true;
 139 }
 140
 141 /** Reads memory from the target's memory spaces.
 142  *
 143  *  \param[in]  ReadAddress  Start address to read from within the target's address space
 144  *  \param[out] ReadBuffer   Buffer to store read data into
 145  *  \param[in]  ReadSize     Number of bytes to read
 146  *
 147  *  \return Boolean true if the command sequence complete sucessfully
 148  */
 149 bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)
 150 {
 151         /* Wait until the NVM controller is no longer busy */
 152         if (!(NVMTarget_WaitWhileNVMControllerBusy()))
 153           return false;
 154
 155         /* Send the READNVM command to the NVM controller for reading of an aribtrary location */
 156         PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
 157         NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
 158         PDITarget_SendByte(NVM_CMD_READNVM);
 159
 160         /* Send the address of the first location to read from - this also primes the internal address
 161          * counters so that we can use the REPEAT command later to save on overhead for multiple bytes */
 162         PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
 163         NVMTarget_SendAddress(ReadAddress);
 164         *ReadBuffer = PDITarget_ReceiveByte();
 165
 166         /* Check to see if we are reading more than a single byte */
 167         if (ReadSize > 1)
 168         {
 169                 /* Send the REPEAT command with the specified number of bytes remaining to read */
 170                 PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_2BYTES);
 171                 PDITarget_SendByte(ReadSize &  0xFF);
 172                 PDITarget_SendByte(ReadSize >> 8);
 173
 174                 /* Send a LD command with indirect access and postincrement to read out the remaining bytes */
 175                 PDITarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
 176                 for (uint16_t i = 0; i < ReadSize; i++)
 177                   *(ReadBuffer++) = PDITarget_ReceiveByte();
 178         }
 179
 180         return true;
 181 }
 182
 183 /** Erases a specific memory space of the target.
 184  *
 185  *  \param[in] EraseCommand  NVM erase command to send to the device
 186  *  \param[in] Address  Address inside the memory space to erase
 187  *
 188  *  \return Boolean true if the command sequence complete sucessfully
 189  */
 190 bool NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address)
 191 {
 192         /* Wait until the NVM controller is no longer busy */
 193         if (!(NVMTarget_WaitWhileNVMControllerBusy()))
 194           return false;
 195
 196         /* Send the memory erase command to the target */
 197         PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
 198         NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
 199         PDITarget_SendByte(EraseCommand);
 200
 201         /* Chip erase is handled seperately, since it's procedure is different to other erase types */
 202         if (EraseCommand == NVM_CMD_CHIPERASE)
 203         {
 204                 /* Set CMDEX bit in NVM CTRLA register to start the chip erase */
 205                 PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
 206                 NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);
 207                 PDITarget_SendByte(1 << 0);
 208         }
 209         else
 210         {
 211                 /* Other erase modes just need us to address a byte within the target memory space */
 212                 PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
 213                 NVMTarget_SendAddress(Address);
 214                 PDITarget_SendByte(0x00);
 215         }
 216
 217         /* Wait until the NVM bus is ready again */
 218         if (!(PDITarget_WaitWhileNVMBusBusy()))
 219           return false;
 220
 221         return true;
 222 }
 223
 224 #endif