Document the PDI programming routines implemented so far in the AVRISP project. Add...
[pub/USBasp.git] / Projects / AVRISP / AVRISP.txt
1 /** \file
2 *
3 * This file contains special DoxyGen information for the generation of the main page and other special
4 * documentation pages. It is not a project source file.
5 */
6
7 /** \mainpage AVRISP MKII Programmer Project
8 *
9 * \section SSec_Compat Demo Compatibility:
10 *
11 * The following list indicates what microcontrollers are compatible with this demo.
12 *
13 * - Series 7 USB AVRs
14 * - Series 6 USB AVRs
15 * - Series 4 USB AVRs
16 * - Series 2 USB AVRs
17 *
18 * \section SSec_Info USB Information:
19 *
20 * The following table gives a rundown of the USB utilization of this demo.
21 *
22 * <table>
23 * <tr>
24 * <td><b>USB Mode:</b></td>
25 * <td>Device</td>
26 * </tr>
27 * <tr>
28 * <td><b>USB Class:</b></td>
29 * <td>Vendor Specific Class</td>
30 * </tr>
31 * <tr>
32 * <td><b>USB Subclass:</b></td>
33 * <td>N/A</td>
34 * </tr>
35 * <tr>
36 * <td><b>Relevant Standards:</b></td>
37 * <td>Atmel AVRISP MKII Protocol Specification</td>
38 * </tr>
39 * <tr>
40 * <td><b>Usable Speeds:</b></td>
41 * <td>Full Speed Mode</td>
42 * </tr>
43 * </table>
44 *
45 * \section SSec_Description Project Description:
46 *
47 * Firmware for an AVRStudio compatible AVRISP-MKII clone programmer. This project will enable the USB AVR series of
48 * microcontrollers to act as a clone of the official Atmel AVRISP-MKII programmer, usable within AVRStudio. In its
49 * most basic form, it allows for the programming of 5V AVRs from within AVRStudio with no special hardware other than
50 * the USB AVR and the parts needed for the USB interface. If the user desires, more advanced circuits incorporating
51 * level conversion can be made to allow for the programming of 3.3V AVR designs.
52 *
53 * This device spoofs Atmel's official AVRISP-MKII device PID so that it remains compatible with Atmel's AVRISP-MKII
54 * drivers. When promted, direct your OS to install Atmel's AVRISP-MKII drivers provided with AVRStudio.
55 *
56 * Note that this design currently has several limitations:
57 * - Minimum target clock speed of 500KHz due to hardware SPI used
58 * - No reversed/shorted target connector detection and notification
59 *
60 * On AVR models with an ADC converter, ACC should be tied to 5V (e.g. VBUS) and the VTARGET_ADC_CHANNEL token should be
61 * set to an appropriate ADC channel number in the project makefile for VTARGET detection to operate correctly. On models
62 * without an ADC converter, VTARGET will report at a fixed 5V level.
63 *
64 * Connections to the device are simple for SPI programming:
65 *
66 * <table>
67 * <tr>
68 * <td><b>Programmer Pin:</b></td>
69 * <td><b>Target Device Pin:</b></td>
70 * <td><b>ISP 6 Pin Layout:</b></td>
71 * </tr>
72 * <tr>
73 * <td>MISO</td>
74 * <td>PDO</td>
75 * <td>1</td>
76 * </tr>
77 * <tr>
78 * <td>ADCx <b><sup>1</sup></b></td>
79 * <td>VTARGET</td>
80 * <td>2</td>
81 * </tr>
82 * <tr>
83 * <td>SCLK</td>
84 * <td>SCLK</td>
85 * <td>3</td>
86 * </tr>
87 * <tr>
88 * <td>MOSI</td>
89 * <td>PDI</td>
90 * <td>4</td>
91 * </tr>
92 * <tr>
93 * <td>PORTx.y <b><sup>2</sup></b></td>
94 * <td>/RESET</td>
95 * <td>5</td>
96 * </tr>
97 * <tr>
98 * <td>GND</td>
99 * <td>GND</td>
100 * <td>6</td>
101 * </tr>
102 * </table>
103 *
104 * <b><sup>1</sup></b> <i>Optional, see \ref SSec_Options section - for USB AVRs with ADC modules only</i> \n
105 * <b><sup>2</sup></b> <i>See \ref SSec_Options section</i>
106 *
107 *
108 * Connections to the device are simple for SPI programming:
109 *
110 * <table>
111 * <tr>
112 * <td><b>Programmer Pin:</b></td>
113 * <td><b>Target Device Pin:</b></td>
114 * <td><b>ISP 6 Pin Layout:</b></td>
115 * </tr>
116 * <tr>
117 * <td>MISO</td>
118 * <td>DATA</td>
119 * <td>1</td>
120 * </tr>
121 * <tr>
122 * <td>ADCx <b><sup>1</sup></b></td>
123 * <td>VTARGET</td>
124 * <td>2</td>
125 * </tr>
126 * <tr>
127 * <td>N/A</td>
128 * <td>N/A</td>
129 * <td>3</td>
130 * </tr>
131 * <tr>
132 * <td>N/A</td>
133 * <td>N/A</td>
134 * <td>4</td>
135 * </tr>
136 * <tr>
137 * <td>PORTx.y <b><sup>2</sup></b></td>
138 * <td>CLOCK</td>
139 * <td>5</td>
140 * </tr>
141 * <tr>
142 * <td>GND</td>
143 * <td>GND</td>
144 * <td>6</td>
145 * </tr>
146 * </table>
147 *
148 * \section SSec_Options Project Options
149 *
150 * The following defines can be found in this demo, which can control the demo behaviour when defined, or changed in value.
151 *
152 * <table>
153 * <tr>
154 * <td><b>Define Name:</b></td>
155 * <td><b>Location:</b></td>
156 * <td><b>Description:</b></td>
157 * </tr>
158 * <tr>
159 * <td>RESET_LINE_PORT</td>
160 * <td>Makefile CDEFS</td>
161 * <td>PORT register for the programmer's target RESET line.</td>
162 * </tr>
163 * <tr>
164 * <td>RESET_LINE_DDR</td>
165 * <td>Makefile CDEFS</td>
166 * <td>DDR register for the programmer's target RESET line.</td>
167 * </tr>
168 * <tr>
169 * <td>RESET_LINE_MASK</td>
170 * <td>Makefile CDEFS</td>
171 * <td>Mask for the programmer's target RESET line on the chosen port. <b>Must not be the AVR's /SS pin</b>, as the
172 * target pins are tri-stated when not in use, and low signals on the /SS pin will force SPI slave mode when the
173 * pin is configured as an input. When in PDI programming mode, this is the target clock pin.</td>
174 * </tr>
175 * <tr>
176 * <td>VTARGET_ADC_CHANNEL</td>
177 * <td>Makefile CDEFS</td>
178 * <td>ADC channel number (on supported AVRs) to use for VTARGET level detection.</td>
179 * </tr>
180 * <tr>
181 * <td>ENABLE_SPI_PROTOCOL</td>
182 * <td>Makefile CDEFS</td>
183 * <td>Define to enable SPI programming protocol support.</td>
184 * </tr>
185 * <tr>
186 * <td>ENABLE_XPROG_PROTOCOL</td>
187 * <td>Makefile CDEFS</td>
188 * <td>Define to enable XMEGA PDI programming protocol support.</td>
189 * </tr>
190 * </table>
191 */