Fix NVM commands so that memory reads and CRC generations now work correctly using...
[pub/USBasp.git] / Projects / AVRISP / Lib / NVMTarget.c
1 /*
2 LUFA Library
3 Copyright (C) Dean Camera, 2009.
4
5 dean [at] fourwalledcubicle [dot] com
6 www.fourwalledcubicle.com
7 */
8
9 /*
10 Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)
11
12 Permission to use, copy, modify, and distribute this software
13 and its documentation for any purpose and without fee is hereby
14 granted, provided that the above copyright notice appear in all
15 copies and that both that the copyright notice and this
16 permission notice and warranty disclaimer appear in supporting
17 documentation, and that the name of the author not be used in
18 advertising or publicity pertaining to distribution of the
19 software without specific, written prior permission.
20
21 The author disclaim all warranties with regard to this
22 software, including all implied warranties of merchantability
23 and fitness. In no event shall the author be liable for any
24 special, indirect or consequential damages or any damages
25 whatsoever resulting from loss of use, data or profits, whether
26 in an action of contract, negligence or other tortious action,
27 arising out of or in connection with the use or performance of
28 this software.
29 */
30
31 /** \file
32 *
33 * Target-related functions for the target's NVM module.
34 */
35
36 #define INCLUDE_FROM_NVMTARGET_C
37 #include "NVMTarget.h"
38
39 #if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
40
41 void NVMTarget_SendNVMRegAddress(uint8_t Register)
42 {
43 uint32_t Address = XPROG_Param_NVMBase | Register;
44
45 PDITarget_SendByte(Address & 0xFF);
46 PDITarget_SendByte(Address >> 8);
47 PDITarget_SendByte(Address >> 16);
48 PDITarget_SendByte(Address >> 24);
49 }
50
51 void NVMTarget_SendAddress(uint32_t AbsoluteAddress)
52 {
53 PDITarget_SendByte(AbsoluteAddress & 0xFF);
54 PDITarget_SendByte(AbsoluteAddress >> 8);
55 PDITarget_SendByte(AbsoluteAddress >> 16);
56 PDITarget_SendByte(AbsoluteAddress >> 24);
57 }
58
59 bool NVMTarget_WaitWhileNVMBusBusy(void)
60 {
61 uint8_t AttemptsRemaining = 255;
62
63 /* Poll the STATUS register to check to see if NVM access has been enabled */
64 while (AttemptsRemaining--)
65 {
66 PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
67 if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)
68 return true;
69 }
70
71 return false;
72 }
73
74 void NVMTarget_WaitWhileNVMControllerBusy(void)
75 {
76 /* Poll the NVM STATUS register while the NVM controller is busy */
77 for (;;)
78 {
79 PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
80 NVMTarget_SendNVMRegAddress(NVM_REG_STATUS);
81
82 if (!(PDITarget_ReceiveByte() & (1 << 7)))
83 return;
84 }
85 }
86
87 uint32_t NVMTarget_GetMemoryCRC(uint8_t MemoryCommand)
88 {
89 uint32_t MemoryCRC;
90
91 NVMTarget_WaitWhileNVMControllerBusy();
92
93 /* Set the NVM command to the correct CRC read command */
94 PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
95 NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
96 PDITarget_SendByte(MemoryCommand);
97
98 /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
99 PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
100 NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);
101 PDITarget_SendByte(1 << 0);
102
103 /* Wait until the NVM bus and controller is no longer busy */
104 NVMTarget_WaitWhileNVMBusBusy();
105 NVMTarget_WaitWhileNVMControllerBusy();
106
107 /* Read the three bytes generated CRC value */
108 PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
109 NVMTarget_SendNVMRegAddress(NVM_REG_DAT0);
110 MemoryCRC = PDITarget_ReceiveByte();
111
112 PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
113 NVMTarget_SendNVMRegAddress(NVM_REG_DAT1);
114 MemoryCRC |= ((uint16_t)PDITarget_ReceiveByte() << 8);
115
116 PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
117 NVMTarget_SendNVMRegAddress(NVM_REG_DAT2);
118 MemoryCRC |= ((uint32_t)PDITarget_ReceiveByte() << 16);
119
120 return MemoryCRC;
121 }
122
123 void NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)
124 {
125 NVMTarget_WaitWhileNVMControllerBusy();
126
127 PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
128 NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
129 PDITarget_SendByte(NVM_CMD_READNVM);
130
131 /* TODO: Optimize via REPEAT and buffer orientated commands */
132 for (uint16_t i = 0; i < ReadSize; i++)
133 {
134 PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
135 NVMTarget_SendAddress(ReadAddress++);
136 *(ReadBuffer++) = PDITarget_ReceiveByte();
137 }
138 }
139
140 #endif