Projects/XPLAINBridge/Lib/SoftUART.c

   1 /*
   2                          LUFA Library
   3          Copyright (C) Dean Camera, 2010.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6           www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2010  David Prentice (david.prentice [at] farming [dot] uk)
  11   Copyright 2010  Peter Danneger
  12   Copyright 2010  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  13
  14   Permission to use, copy, modify, distribute, and sell this
  15   software and its documentation for any purpose is hereby granted
  16   without fee, provided that the above copyright notice appear in
  17   all copies and that both that the copyright notice and this
  18   permission notice and warranty disclaimer appear in supporting
  19   documentation, and that the name of the author not be used in
  20   advertising or publicity pertaining to distribution of the
  21   software without specific, written prior permission.
  22
  23   The author disclaim all warranties with regard to this
  24   software, including all implied warranties of merchantability
  25   and fitness.  In no event shall the author be liable for any
  26   special, indirect or consequential damages or any damages
  27   whatsoever resulting from loss of use, data or profits, whether
  28   in an action of contract, negligence or other tortious action,
  29   arising out of or in connection with the use or performance of
  30   this software.
  31 */
  32
  33 /** \file
  34  *
  35  *  Software UART for both data transmission and reception. This
  36  *  code continuously monitors the ring buffers set up by the main
  37  *  project source file and reads/writes data as it becomes available.
  38  */
  39
  40 #include "SoftUART.h"
  41
  42 static uint8_t TX_BitsRemaining, TX_Data, RX_BitMask, RX_Data;
  43
  44 void SoftUART_Init(void)
  45 {
  46         OCR2B  = TCNT2 + 1;                                             // force first compare
  47         TCCR2A = (1 << COM2B1) | (1 << COM2B0); // T1 mode 0
  48         TCCR2B = (1 << FOC2B)  | (1 << CS21);   // CLK/8, T1 mode 0
  49         TIMSK2 = (1 << OCIE2B);                                 // enable tx and wait for start
  50         EICRA  = (1 << ISC01);                                  // -ve edge
  51         EIMSK  = (1 << INT0);                                   // enable INT0 interrupt
  52
  53         TX_BitsRemaining = 0;                                   // nothing to send
  54         STXPORT |= (1 << STX);                                  // TX output
  55         STXDDR  |= (1 << STX);                                  // TX output
  56         SRXPORT |= (1 << SRX);                                  // pullup on INT0
  57 }
  58
  59 /* ISR to detect the start of a bit being sent from the transmitter. */
  60 ISR(INT0_vect)
  61 {
  62         OCR2A = TCNT2 + (BIT_TIME / 8 * 3 / 2); // scan 1.5 bits after start
  63
  64         RX_Data    = 0;                                                 // clear bit storage
  65         RX_BitMask = (1 << 0);                                  // bit mask
  66
  67         TIFR2 = (1 << OCF2A);                                   // clear pending interrupt
  68
  69         if (!(SRXPIN & (1 << SRX)))                             // still low
  70         {
  71                 TIMSK2 = (1 << OCIE2A) | (1 << OCIE2B); // wait for first bit
  72                 EIMSK &= ~(1 << INT0);
  73         }
  74 }
  75
  76 /* ISR to manage the reception of bits to the transmitter. */
  77 ISR(TIMER2_COMPA_vect)
  78 {
  79         if (RX_BitMask)
  80         {
  81                 if (SRXPIN & (1 << SRX))
  82                   RX_Data |= RX_BitMask;
  83
  84                 RX_BitMask <<= 1;
  85
  86                 OCR2A += BIT_TIME / 8;                          // next bit slice
  87         }
  88         else
  89         {
  90                 RingBuffer_Insert(&UARTtoUSB_Buffer, RX_Data);
  91
  92                 TIMSK2    = (1 << OCIE2B);                      // enable tx and wait for start
  93                 EIMSK    |= (1 << INT0);                        // enable START irq
  94                 EIFR      = (1 << INTF0);                       // clear any pending
  95         }
  96 }
  97
  98 /* ISR to manage the transmission of bits to the receiver. */
  99 ISR(TIMER2_COMPB_vect)
 100 {
 101         OCR2B += BIT_TIME / 8;                                  // next bit slice
 102
 103         if (TX_BitsRemaining)
 104         {
 105                 if (--TX_BitsRemaining != 9)            // no start bit
 106                 {
 107                         if (TX_Data & (1 << 0))                 // test inverted data
 108                           TCCR2A = (1 << COM2B1);
 109                         else
 110                           TCCR2A = (1 << COM2B1) | (1 << COM2B0);
 111
 112                         TX_Data >>= 1;                                  // shift zero in from left
 113                 }
 114                 else
 115                 {
 116                         TCCR2A = (1 << COM2B1);                 // START bit
 117                 }
 118         }
 119         else if (USBtoUART_Buffer.Count)
 120         {
 121                 TX_Data = ~RingBuffer_Remove(&USBtoUART_Buffer);
 122                 TX_BitsRemaining = 10;
 123         }
 124 }