Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2010.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2010  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, distribute, and sell this
  13   software and its documentation for any purpose is hereby granted
  14   without fee, provided that the above copyright notice appear in
  15   all copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 /** \file
  32  *
  33  *  Target-related functions for the PDI Protocol decoder.
  34  */
  35
  36 #define  INCLUDE_FROM_XPROGTARGET_C
  37 #include "XPROGTarget.h"
  38
  39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
  40
  41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
  42 volatile bool               IsSending;
  43
  44 #if !defined(XPROG_VIA_HARDWARE_USART)
  45 /** Software USART raw frame bits for transmission/reception. */
  46 volatile uint16_t           SoftUSART_Data;
  47
  48 /** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
  49 #define SoftUSART_BitCount  GPIOR2
  50
  51
  52 /** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */
  53 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
  54 {
  55         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
  56         BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;
  57
  58         /* If not sending or receiving, just exit */
  59         if (!(SoftUSART_BitCount))
  60           return;
  61
  62         /* Check to see if we are at a rising or falling edge of the clock */
  63         if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)
  64         {
  65                 /* If at rising clock edge and we are in send mode, abort */
  66                 if (IsSending)
  67                   return;
  68
  69                 /* Wait for the start bit when receiving */
  70                 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
  71                   return;
  72
  73                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
  74                  * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */
  75                 if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)
  76                   ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
  77
  78                 SoftUSART_Data >>= 1;
  79                 SoftUSART_BitCount--;
  80         }
  81         else
  82         {
  83                 /* If at falling clock edge and we are in receive mode, abort */
  84                 if (!IsSending)
  85                   return;
  86
  87                 /* Set the data line to the next bit value */
  88                 if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
  89                   BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;
  90                 else
  91                   BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
  92
  93                 SoftUSART_Data >>= 1;
  94                 SoftUSART_BitCount--;
  95         }
  96 }
  97
  98 /** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */
  99 ISR(TIMER1_CAPT_vect, ISR_BLOCK)
 100 {
 101         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
 102         BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;
 103
 104         /* If not sending or receiving, just exit */
 105         if (!(SoftUSART_BitCount))
 106           return;
 107
 108         /* Check to see if we are at a rising or falling edge of the clock */
 109         if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)
 110         {
 111                 /* If at rising clock edge and we are in send mode, abort */
 112                 if (IsSending)
 113                   return;
 114
 115                 /* Wait for the start bit when receiving */
 116                 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))
 117                   return;
 118
 119                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
 120                  * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */
 121                 if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)
 122                  ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
 123
 124                 SoftUSART_Data >>= 1;
 125                 SoftUSART_BitCount--;
 126         }
 127         else
 128         {
 129                 /* If at falling clock edge and we are in receive mode, abort */
 130                 if (!IsSending)
 131                   return;
 132
 133                 /* Set the data line to the next bit value */
 134                 if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
 135                   BITBANG_TPIDATA_PORT |=  BITBANG_TPIDATA_MASK;
 136                 else
 137                   BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
 138
 139                 SoftUSART_Data >>= 1;
 140                 SoftUSART_BitCount--;
 141         }
 142 }
 143 #endif
 144
 145 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
 146 void XPROGTarget_EnableTargetPDI(void)
 147 {
 148         IsSending = false;
 149
 150 #if defined(XPROG_VIA_HARDWARE_USART)
 151         /* Set Tx and XCK as outputs, Rx as input */
 152         DDRD |=  (1 << 5) | (1 << 3);
 153         DDRD &= ~(1 << 2);
 154
 155         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 156         PORTD |= (1 << 3);
 157         _delay_us(1);
 158
 159         /* Set up the synchronous USART for XMEGA communications -
 160            8 data bits, even parity, 2 stop bits */
 161         UBRR1  = (F_CPU / 500000UL);
 162         UCSR1B = (1 << TXEN1);
 163         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 164 #else
 165         /* Set DATA and CLOCK lines to outputs */
 166         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 167         BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
 168
 169         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 170         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 171         _delay_us(1);
 172
 173         /* Fire timer compare channel A ISR to manage the software USART */
 174         OCR1A   = BITS_BETWEEN_USART_CLOCKS;
 175         TCCR1B  = (1 << WGM12) | (1 << CS10);
 176         TIMSK1  = (1 << OCIE1A);
 177 #endif
 178
 179         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
 180         XPROGTarget_SendBreak();
 181         XPROGTarget_SendBreak();
 182 }
 183
 184 /** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
 185 void XPROGTarget_EnableTargetTPI(void)
 186 {
 187         IsSending = false;
 188
 189         /* Set /RESET line low for at least 400ns to enable TPI functionality */
 190         AUX_LINE_DDR  |=  AUX_LINE_MASK;
 191         AUX_LINE_PORT &= ~AUX_LINE_MASK;
 192         _delay_us(1);
 193
 194 #if defined(XPROG_VIA_HARDWARE_USART)
 195         /* Set Tx and XCK as outputs, Rx as input */
 196         DDRD |=  (1 << 5) | (1 << 3);
 197         DDRD &= ~(1 << 2);
 198
 199         /* Set up the synchronous USART for TINY communications -
 200            8 data bits, even parity, 2 stop bits */
 201         UBRR1  = (F_CPU / 500000UL);
 202         UCSR1B = (1 << TXEN1);
 203         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 204 #else
 205         /* Set DATA and CLOCK lines to outputs */
 206         BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;
 207         BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;
 208
 209         /* Set DATA line high for idle state */
 210         BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 211
 212         /* Fire timer capture channel ISR to manage the software USART */
 213         ICR1    = BITS_BETWEEN_USART_CLOCKS;
 214         TCCR1B  = (1 << WGM13) | (1 << WGM12) | (1 << CS10);
 215         TIMSK1  = (1 << ICIE1);
 216 #endif
 217
 218         /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
 219         XPROGTarget_SendBreak();
 220         XPROGTarget_SendBreak();
 221 }
 222
 223 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
 224 void XPROGTarget_DisableTargetPDI(void)
 225 {
 226         /* Switch to Rx mode to ensure that all pending transmissions are complete */
 227         XPROGTarget_SetRxMode();
 228
 229 #if defined(XPROG_VIA_HARDWARE_USART)
 230         /* Set /RESET high for a one millisecond to ensure target device is restarted */
 231         PORTD |= (1 << 5);
 232         _delay_ms(1);
 233
 234         /* Turn off receiver and transmitter of the USART, clear settings */
 235         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 236         UCSR1B  = 0;
 237         UCSR1C  = 0;
 238
 239         /* Set all USART lines as input, tristate */
 240         DDRD  &= ~((1 << 5) | (1 << 3));
 241         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 242 #else
 243         /* Set /RESET high for a one millisecond to ensure target device is restarted */
 244         BITBANG_PDICLOCK_PORT |= BITBANG_PDICLOCK_MASK;
 245         _delay_ms(1);
 246
 247         /* Set DATA and CLOCK lines to inputs */
 248         BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 249         BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
 250
 251         /* Tristate DATA and CLOCK lines */
 252         BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;
 253         BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
 254 #endif
 255 }
 256
 257 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */
 258 void XPROGTarget_DisableTargetTPI(void)
 259 {
 260         /* Switch to Rx mode to ensure that all pending transmissions are complete */
 261         XPROGTarget_SetRxMode();
 262
 263 #if defined(XPROG_VIA_HARDWARE_USART)
 264         /* Turn off receiver and transmitter of the USART, clear settings */
 265         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 266         UCSR1B  = 0;
 267         UCSR1C  = 0;
 268
 269         /* Set all USART lines as input, tristate */
 270         DDRD  &= ~((1 << 5) | (1 << 3));
 271         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 272 #else
 273         /* Set DATA and CLOCK lines to inputs */
 274         BITBANG_TPIDATA_DDR   &= ~BITBANG_TPIDATA_MASK;
 275         BITBANG_TPICLOCK_DDR  &= ~BITBANG_TPICLOCK_MASK;
 276
 277         /* Tristate DATA and CLOCK lines */
 278         BITBANG_TPIDATA_PORT  &= ~BITBANG_TPIDATA_MASK;
 279         BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;
 280 #endif
 281
 282         /* Tristate target /RESET line */
 283         AUX_LINE_DDR  &= ~AUX_LINE_MASK;
 284         AUX_LINE_PORT &= ~AUX_LINE_MASK;
 285 }
 286
 287 /** Sends a byte via the USART.
 288  *
 289  *  \param[in] Byte  Byte to send through the USART
 290  */
 291 void XPROGTarget_SendByte(const uint8_t Byte)
 292 {
 293         /* Switch to Tx mode if currently in Rx mode */
 294         if (!(IsSending))
 295           XPROGTarget_SetTxMode();
 296
 297 #if defined(XPROG_VIA_HARDWARE_USART)
 298         /* Wait until there is space in the hardware Tx buffer before writing */
 299         while (!(UCSR1A & (1 << UDRE1)));
 300         UCSR1A |= (1 << TXC1);
 301         UDR1    = Byte;
 302 #else
 303         /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */
 304         uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));
 305
 306         /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */
 307         uint8_t ParityData = Byte;
 308         while (ParityData)
 309         {
 310                 NewUSARTData ^= (1 << 9);
 311                 ParityData   &= (ParityData - 1);
 312         }
 313
 314         /* Wait until transmitter is idle before writing new data */
 315         while (SoftUSART_BitCount);
 316
 317         /* Data shifted out LSB first, START DATA PARITY STOP STOP */
 318         SoftUSART_Data     = NewUSARTData;
 319         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 320 #endif
 321 }
 322
 323 /** Receives a byte via the software USART, blocking until data is received.
 324  *
 325  *  \return Received byte from the USART
 326  */
 327 uint8_t XPROGTarget_ReceiveByte(void)
 328 {
 329         /* Switch to Rx mode if currently in Tx mode */
 330         if (IsSending)
 331           XPROGTarget_SetRxMode();
 332
 333 #if defined(XPROG_VIA_HARDWARE_USART)
 334         /* Wait until a byte has been received before reading */
 335         while (!(UCSR1A & (1 << RXC1)) && TimeoutMSRemaining);
 336         return UDR1;
 337 #else
 338         /* Wait until a byte has been received before reading */
 339         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 340         while (SoftUSART_BitCount && TimeoutMSRemaining);
 341
 342         /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */
 343         return (uint8_t)SoftUSART_Data;
 344 #endif
 345 }
 346
 347 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
 348 void XPROGTarget_SendBreak(void)
 349 {
 350         /* Switch to Tx mode if currently in Rx mode */
 351         if (!(IsSending))
 352           XPROGTarget_SetTxMode();
 353
 354 #if defined(XPROG_VIA_HARDWARE_USART)
 355         /* Need to do nothing for a full frame to send a BREAK */
 356         for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
 357         {
 358                 /* Wait for a full cycle of the clock */
 359                 while (PIND & (1 << 5));
 360                 while (!(PIND & (1 << 5)));
 361         }
 362 #else
 363         while (SoftUSART_BitCount);
 364
 365         /* Need to do nothing for a full frame to send a BREAK */
 366         SoftUSART_Data     = 0x0FFF;
 367         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 368 #endif
 369 }
 370
 371 static void XPROGTarget_SetTxMode(void)
 372 {
 373 #if defined(XPROG_VIA_HARDWARE_USART)
 374         /* Wait for a full cycle of the clock */
 375         while (PIND & (1 << 5));
 376         while (!(PIND & (1 << 5)));
 377
 378         PORTD  |=  (1 << 3);
 379         DDRD   |=  (1 << 3);
 380
 381         UCSR1B &= ~(1 << RXEN1);
 382         UCSR1B |=  (1 << TXEN1);
 383
 384         IsSending = true;
 385 #else
 386         while (SoftUSART_BitCount);
 387
 388         /* Wait for a full cycle of the clock */
 389         SoftUSART_Data     = 0x0001;
 390         SoftUSART_BitCount = 1;
 391         while (SoftUSART_BitCount);
 392
 393         if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
 394         {
 395                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 396                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 397         }
 398         else
 399         {
 400                 BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 401                 BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;
 402         }
 403 #endif
 404
 405         IsSending = true;
 406 }
 407
 408 static void XPROGTarget_SetRxMode(void)
 409 {
 410 #if defined(XPROG_VIA_HARDWARE_USART)
 411         while (!(UCSR1A & (1 << TXC1)));
 412         UCSR1A |=  (1 << TXC1);
 413
 414         UCSR1B &= ~(1 << TXEN1);
 415         UCSR1B |=  (1 << RXEN1);
 416
 417         DDRD   &= ~(1 << 3);
 418         PORTD  &= ~(1 << 3);
 419 #else
 420         while (SoftUSART_BitCount);
 421
 422         if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
 423         {
 424                 BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 425                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 426         }
 427         else
 428         {
 429                 BITBANG_TPIDATA_DDR  &= ~BITBANG_TPIDATA_MASK;
 430                 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
 431         }
 432
 433         /* Wait until DATA line has been pulled up to idle by the target */
 434         while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK) && TimeoutMSRemaining);
 435 #endif
 436
 437         IsSending = false;
 438 }
 439
 440 #endif