Projects/AVRISP/Lib/XPROG/XPROGTarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2009.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, and distribute this software
  13   and its documentation for any purpose and without fee is hereby
  14   granted, provided that the above copyright notice appear in all
  15   copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 /** \file
  32  *
  33  *  Target-related functions for the PDI Protocol decoder.
  34  */
  35
  36 #define  INCLUDE_FROM_XPROGTARGET_C
  37 #include "XPROGTarget.h"
  38
  39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
  40
  41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
  42 volatile bool               IsSending;
  43
  44 #if !defined(XPROG_VIA_HARDWARE_USART)
  45 /** Software USART raw frame bits for transmission/reception. */
  46 volatile uint16_t           SoftUSART_Data;
  47
  48 /** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
  49 #define SoftUSART_BitCount  GPIOR2
  50
  51
  52 /** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */
  53 ISR(TIMER1_CAPT_vect, ISR_BLOCK)
  54 {
  55         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
  56         BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;
  57
  58         /* If not sending or receiving, just exit */
  59         if (!(SoftUSART_BitCount))
  60           return;
  61
  62         /* Check to see if we are at a rising or falling edge of the clock */
  63         if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)
  64         {
  65                 /* If at rising clock edge and we are in send mode, abort */
  66                 if (IsSending)
  67                   return;
  68
  69                 /* Wait for the start bit when receiving */
  70                 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))
  71                   return;
  72
  73                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
  74                  * be discarded leaving the data to be byte-aligned for quick access */
  75                 if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)
  76                   SoftUSART_Data |= (1 << (BITS_IN_USART_FRAME - 1));
  77
  78                 SoftUSART_Data >>= 1;
  79                 SoftUSART_BitCount--;
  80         }
  81         else
  82         {
  83                 /* If at falling clock edge and we are in receive mode, abort */
  84                 if (!IsSending)
  85                   return;
  86
  87                 /* Set the data line to the next bit value */
  88                 if (SoftUSART_Data & 0x01)
  89                   BITBANG_TPIDATA_PORT |=  BITBANG_TPIDATA_MASK;
  90                 else
  91                   BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
  92
  93                 SoftUSART_Data >>= 1;
  94                 SoftUSART_BitCount--;
  95         }
  96 }
  97
  98 /** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */
  99 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
 100 {
 101         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
 102         BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;
 103
 104         /* If not sending or receiving, just exit */
 105         if (!(SoftUSART_BitCount))
 106           return;
 107
 108         /* Check to see if we are at a rising or falling edge of the clock */
 109         if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)
 110         {
 111                 /* If at rising clock edge and we are in send mode, abort */
 112                 if (IsSending)
 113                   return;
 114
 115                 /* Wait for the start bit when receiving */
 116                 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
 117                   return;
 118
 119                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
 120                  * be discarded leaving the data to be byte-aligned for quick access */
 121                 if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)
 122                   SoftUSART_Data |= (1 << (BITS_IN_USART_FRAME - 1));
 123
 124                 SoftUSART_Data >>= 1;
 125                 SoftUSART_BitCount--;
 126         }
 127         else
 128         {
 129                 /* If at falling clock edge and we are in receive mode, abort */
 130                 if (!IsSending)
 131                   return;
 132
 133                 /* Set the data line to the next bit value */
 134                 if (SoftUSART_Data & 0x01)
 135                   BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;
 136                 else
 137                   BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 138
 139                 SoftUSART_Data >>= 1;
 140                 SoftUSART_BitCount--;
 141         }
 142 }
 143 #endif
 144
 145 /** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
 146 void XPROGTarget_EnableTargetTPI(void)
 147 {
 148         /* Set /RESET line low for at least 90ns to enable TPI functionality */
 149         RESET_LINE_DDR  |= RESET_LINE_MASK;
 150         RESET_LINE_PORT &= ~RESET_LINE_MASK;
 151         asm volatile ("NOP"::);
 152         asm volatile ("NOP"::);
 153
 154 #if defined(XPROG_VIA_HARDWARE_USART)
 155         /* Set Tx and XCK as outputs, Rx as input */
 156         DDRD |=  (1 << 5) | (1 << 3);
 157         DDRD &= ~(1 << 2);
 158
 159         /* Set up the synchronous USART for XMEGA communications -
 160            8 data bits, even parity, 2 stop bits */
 161         UBRR1  = (F_CPU / 1000000UL);
 162         UCSR1B = (1 << TXEN1);
 163         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 164
 165         /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
 166         XPROGTarget_SendBreak();
 167         XPROGTarget_SendBreak();
 168 #else
 169         /* Set DATA and CLOCK lines to outputs */
 170         BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;
 171         BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;
 172
 173         /* Set DATA line high for idle state */
 174         BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 175
 176         /* Fire timer capture ISR every 100 cycles to manage the software USART */
 177         OCR1A   = 80;
 178         TCCR1B  = (1 << WGM13) | (1 << WGM12) | (1 << CS10);
 179         TIMSK1  = (1 << ICIE1);
 180
 181         /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
 182         XPROGTarget_SendBreak();
 183         XPROGTarget_SendBreak();
 184 #endif
 185 }
 186
 187 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
 188 void XPROGTarget_EnableTargetPDI(void)
 189 {
 190 #if defined(XPROG_VIA_HARDWARE_USART)
 191         /* Set Tx and XCK as outputs, Rx as input */
 192         DDRD |=  (1 << 5) | (1 << 3);
 193         DDRD &= ~(1 << 2);
 194
 195         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 196         PORTD |= (1 << 3);
 197         asm volatile ("NOP"::);
 198         asm volatile ("NOP"::);
 199
 200         /* Set up the synchronous USART for XMEGA communications -
 201            8 data bits, even parity, 2 stop bits */
 202         UBRR1  = (F_CPU / 1000000UL);
 203         UCSR1B = (1 << TXEN1);
 204         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 205
 206         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
 207         XPROGTarget_SendBreak();
 208         XPROGTarget_SendBreak();
 209 #else
 210         /* Set DATA and CLOCK lines to outputs */
 211         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 212         BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
 213
 214         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 215         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 216         asm volatile ("NOP"::);
 217         asm volatile ("NOP"::);
 218
 219         /* Fire timer compare ISR every 100 cycles to manage the software USART */
 220         OCR1A   = 80;
 221         TCCR1B  = (1 << WGM12) | (1 << CS10);
 222         TIMSK1  = (1 << OCIE1A);
 223
 224         /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
 225         XPROGTarget_SendBreak();
 226         XPROGTarget_SendBreak();
 227 #endif
 228 }
 229
 230 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */
 231 void XPROGTarget_DisableTargetTPI(void)
 232 {
 233 #if defined(XPROG_VIA_HARDWARE_USART)
 234         /* Turn off receiver and transmitter of the USART, clear settings */
 235         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 236         UCSR1B  = 0;
 237         UCSR1C  = 0;
 238
 239         /* Set all USART lines as input, tristate */
 240         DDRD  &= ~((1 << 5) | (1 << 3));
 241         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 242 #else
 243         /* Set DATA and CLOCK lines to inputs */
 244         BITBANG_TPIDATA_DDR   &= ~BITBANG_TPIDATA_MASK;
 245         BITBANG_TPICLOCK_DDR  &= ~BITBANG_TPICLOCK_MASK;
 246
 247         /* Tristate DATA and CLOCK lines */
 248         BITBANG_TPIDATA_PORT  &= ~BITBANG_TPIDATA_MASK;
 249         BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;
 250 #endif
 251
 252         /* Tristate target /RESET line */
 253         RESET_LINE_DDR  &= ~RESET_LINE_MASK;
 254         RESET_LINE_PORT &= ~RESET_LINE_MASK;
 255 }
 256
 257 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
 258 void XPROGTarget_DisableTargetPDI(void)
 259 {
 260 #if defined(XPROG_VIA_HARDWARE_USART)
 261         /* Turn off receiver and transmitter of the USART, clear settings */
 262         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 263         UCSR1B  = 0;
 264         UCSR1C  = 0;
 265
 266         /* Set all USART lines as input, tristate */
 267         DDRD  &= ~((1 << 5) | (1 << 3));
 268         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 269 #else
 270         /* Set DATA and CLOCK lines to inputs */
 271         BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 272         BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
 273
 274         /* Tristate DATA and CLOCK lines */
 275         BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;
 276         BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
 277 #endif
 278 }
 279
 280 /** Sends a byte via the USART.
 281  *
 282  *  \param[in] Byte  Byte to send through the USART
 283  */
 284 void XPROGTarget_SendByte(const uint8_t Byte)
 285 {
 286 #if defined(XPROG_VIA_HARDWARE_USART)
 287         /* Switch to Tx mode if currently in Rx mode */
 288         if (!(IsSending))
 289         {
 290                 PORTD  |=  (1 << 3);
 291                 DDRD   |=  (1 << 3);
 292
 293                 UCSR1B |=  (1 << TXEN1);
 294                 UCSR1B &= ~(1 << RXEN1);
 295
 296                 IsSending = true;
 297         }
 298
 299         /* Wait until there is space in the hardware Tx buffer before writing */
 300         while (!(UCSR1A & (1 << UDRE1)));
 301         UCSR1A |= (1 << TXC1);
 302         UDR1    = Byte;
 303 #else
 304         /* Switch to Tx mode if currently in Rx mode */
 305         if (!(IsSending))
 306         {
 307                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 308                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 309
 310                 IsSending = true;
 311         }
 312
 313         /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */
 314         uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));
 315
 316         /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */
 317         uint8_t ParityData    = Byte;
 318         while (ParityData)
 319         {
 320                 NewUSARTData ^= (1 << 9);
 321                 ParityData   &= (ParityData - 1);
 322         }
 323
 324         /* Wait until transmitter is idle before writing new data */
 325         while (SoftUSART_BitCount);
 326
 327         /* Data shifted out LSB first, START DATA PARITY STOP STOP */
 328         SoftUSART_Data     = NewUSARTData;
 329         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 330 #endif
 331 }
 332
 333 /** Receives a byte via the software USART, blocking until data is received.
 334  *
 335  *  \return Received byte from the USART
 336  */
 337 uint8_t XPROGTarget_ReceiveByte(void)
 338 {
 339 #if defined(XPROG_VIA_HARDWARE_USART)
 340         /* Switch to Rx mode if currently in Tx mode */
 341         if (IsSending)
 342         {
 343                 while (!(UCSR1A & (1 << TXC1)));
 344                 UCSR1A |=  (1 << TXC1);
 345
 346                 UCSR1B &= ~(1 << TXEN1);
 347                 UCSR1B |=  (1 << RXEN1);
 348
 349                 DDRD   &= ~(1 << 3);
 350                 PORTD  &= ~(1 << 3);
 351
 352                 IsSending = false;
 353         }
 354
 355         /* Wait until a byte has been received before reading */
 356         while (!(UCSR1A & (1 << RXC1)));
 357         return UDR1;
 358 #else
 359         /* Switch to Rx mode if currently in Tx mode */
 360         if (IsSending)
 361         {
 362                 while (SoftUSART_BitCount);
 363
 364                 BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 365                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 366
 367                 IsSending = false;
 368         }
 369
 370         /* Wait until a byte has been received before reading */
 371         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 372         while (SoftUSART_BitCount);
 373
 374         /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */
 375         return (uint8_t)SoftUSART_Data;
 376 #endif
 377 }
 378
 379 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
 380 void XPROGTarget_SendBreak(void)
 381 {
 382 #if defined(XPROG_VIA_HARDWARE_USART)
 383         /* Switch to Tx mode if currently in Rx mode */
 384         if (!(IsSending))
 385         {
 386                 PORTD  |=  (1 << 3);
 387                 DDRD   |=  (1 << 3);
 388
 389                 UCSR1B &= ~(1 << RXEN1);
 390                 UCSR1B |=  (1 << TXEN1);
 391
 392                 IsSending = true;
 393         }
 394
 395         /* Need to do nothing for a full frame to send a BREAK */
 396         for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
 397         {
 398                 /* Wait for a full cycle of the clock */
 399                 while (PIND & (1 << 5));
 400                 while (!(PIND & (1 << 5)));
 401         }
 402 #else
 403         /* Switch to Tx mode if currently in Rx mode */
 404         if (!(IsSending))
 405         {
 406                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 407                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 408
 409                 IsSending = true;
 410         }
 411
 412         while (SoftUSART_BitCount);
 413
 414         /* Need to do nothing for a full frame to send a BREAK */
 415         SoftUSART_Data     = 0x0FFF;
 416         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 417 #endif
 418 }
 419
 420 #endif