Complete combining of PDI and TPI target communication code files, stub out TINY...
[pub/USBasp.git] / Projects / AVRISP / Lib / XPROG / XMEGANVM.c
1 /*
2 LUFA Library
3 Copyright (C) Dean Camera, 2009.
4
5 dean [at] fourwalledcubicle [dot] com
6 www.fourwalledcubicle.com
7 */
8
9 /*
10 Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)
11
12 Permission to use, copy, modify, and distribute this software
13 and its documentation for any purpose and without fee is hereby
14 granted, provided that the above copyright notice appear in all
15 copies and that both that the copyright notice and this
16 permission notice and warranty disclaimer appear in supporting
17 documentation, and that the name of the author not be used in
18 advertising or publicity pertaining to distribution of the
19 software without specific, written prior permission.
20
21 The author disclaim all warranties with regard to this
22 software, including all implied warranties of merchantability
23 and fitness. In no event shall the author be liable for any
24 special, indirect or consequential damages or any damages
25 whatsoever resulting from loss of use, data or profits, whether
26 in an action of contract, negligence or other tortious action,
27 arising out of or in connection with the use or performance of
28 this software.
29 */
30
31 /** \file
32 *
33 * Target-related functions for the XMEGA target's NVM module.
34 */
35
36 #define INCLUDE_FROM_XMEGA_NVM_C
37 #include "XMEGANVM.h"
38
39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
40
41 /** Sends the given NVM register address to the target.
42 *
43 * \param[in] Register NVM register whose absolute address is to be sent
44 */
45 void XMEGANVM_SendNVMRegAddress(const uint8_t Register)
46 {
47 /* Determine the absolute register address from the NVM base memory address and the NVM register address */
48 uint32_t Address = XPROG_Param_NVMBase | Register;
49
50 /* Send the calculated 32-bit address to the target, LSB first */
51 XMEGANVM_SendAddress(Address);
52 }
53
54 /** Sends the given 32-bit absolute address to the target.
55 *
56 * \param[in] AbsoluteAddress Absolute address to send to the target
57 */
58 void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)
59 {
60 /* Send the given 32-bit address to the target, LSB first */
61 XPROGTarget_SendByte(AbsoluteAddress & 0xFF);
62 XPROGTarget_SendByte(AbsoluteAddress >> 8);
63 XPROGTarget_SendByte(AbsoluteAddress >> 16);
64 XPROGTarget_SendByte(AbsoluteAddress >> 24);
65 }
66
67 /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC
68 * calculation.
69 *
70 * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
71 */
72 bool XMEGANVM_WaitWhileNVMBusBusy(void)
73 {
74 TCNT0 = 0;
75 TIFR0 = (1 << OCF1A);
76
77 uint8_t TimeoutMS = XMEGA_NVM_BUSY_TIMEOUT_MS;
78
79 /* Poll the STATUS register to check to see if NVM access has been enabled */
80 while (TimeoutMS)
81 {
82 /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */
83 XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
84 if (XPROGTarget_ReceiveByte() & PDI_STATUS_NVM)
85 return true;
86
87 if (TIFR0 & (1 << OCF1A))
88 {
89 TIFR0 = (1 << OCF1A);
90 TimeoutMS--;
91 }
92 }
93
94 return false;
95 }
96
97 /** Waits while the target's NVM controller is busy performing an operation, exiting if the
98 * timeout period expires.
99 *
100 * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
101 */
102 bool XMEGANVM_WaitWhileNVMControllerBusy(void)
103 {
104 TCNT0 = 0;
105 TIFR0 = (1 << OCF1A);
106
107 uint8_t TimeoutMS = XMEGA_NVM_BUSY_TIMEOUT_MS;
108
109 /* Poll the NVM STATUS register while the NVM controller is busy */
110 while (TimeoutMS)
111 {
112 /* Send a LDS command to read the NVM STATUS register to check the BUSY flag */
113 XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
114 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_STATUS);
115
116 /* Check to see if the BUSY flag is still set */
117 if (!(XPROGTarget_ReceiveByte() & (1 << 7)))
118 return true;
119
120 if (TIFR0 & (1 << OCF1A))
121 {
122 TIFR0 = (1 << OCF1A);
123 TimeoutMS--;
124 }
125 }
126
127 return false;
128 }
129
130 /** Retrieves the CRC value of the given memory space.
131 *
132 * \param[in] CRCCommand NVM CRC command to issue to the target
133 * \param[out] CRCDest CRC Destination when read from the target
134 *
135 * \return Boolean true if the command sequence complete successfully
136 */
137 bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
138 {
139 /* Wait until the NVM controller is no longer busy */
140 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
141 return false;
142
143 /* Set the NVM command to the correct CRC read command */
144 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
145 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
146 XPROGTarget_SendByte(CRCCommand);
147
148 /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
149 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
150 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
151 XPROGTarget_SendByte(1 << 0);
152
153 /* Wait until the NVM bus is ready again */
154 if (!(XMEGANVM_WaitWhileNVMBusBusy()))
155 return false;
156
157 /* Wait until the NVM controller is no longer busy */
158 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
159 return false;
160
161 *CRCDest = 0;
162
163 /* Read the first generated CRC byte value */
164 XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
165 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0);
166 *CRCDest = XPROGTarget_ReceiveByte();
167
168 /* Read the second generated CRC byte value */
169 XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
170 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT1);
171 *CRCDest |= ((uint16_t)XPROGTarget_ReceiveByte() << 8);
172
173 /* Read the third generated CRC byte value */
174 XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
175 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT2);
176 *CRCDest |= ((uint32_t)XPROGTarget_ReceiveByte() << 16);
177
178 return true;
179 }
180
181 /** Reads memory from the target's memory spaces.
182 *
183 * \param[in] ReadAddress Start address to read from within the target's address space
184 * \param[out] ReadBuffer Buffer to store read data into
185 * \param[in] ReadSize Number of bytes to read
186 *
187 * \return Boolean true if the command sequence complete successfully
188 */
189 bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize)
190 {
191 /* Wait until the NVM controller is no longer busy */
192 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
193 return false;
194
195 /* Send the READNVM command to the NVM controller for reading of an arbitrary location */
196 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
197 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
198 XPROGTarget_SendByte(XMEGA_NVM_CMD_READNVM);
199
200 /* Load the PDI pointer register with the start address we want to read from */
201 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
202 XMEGANVM_SendAddress(ReadAddress);
203
204 /* Send the REPEAT command with the specified number of bytes to read */
205 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
206 XPROGTarget_SendByte(ReadSize - 1);
207
208 /* Send a LD command with indirect access and postincrement to read out the bytes */
209 XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
210 for (uint16_t i = 0; i < ReadSize; i++)
211 *(ReadBuffer++) = XPROGTarget_ReceiveByte();
212
213 return true;
214 }
215
216 /** Writes byte addressed memory to the target's memory spaces.
217 *
218 * \param[in] WriteCommand Command to send to the device to write each memory byte
219 * \param[in] WriteAddress Start address to write to within the target's address space
220 * \param[in] WriteBuffer Buffer to source data from
221 *
222 * \return Boolean true if the command sequence complete successfully
223 */
224 bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer)
225 {
226 /* Wait until the NVM controller is no longer busy */
227 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
228 return false;
229
230 /* Send the memory write command to the target */
231 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
232 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
233 XPROGTarget_SendByte(WriteCommand);
234
235 /* Send new memory byte to the memory to the target */
236 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
237 XMEGANVM_SendAddress(WriteAddress);
238 XPROGTarget_SendByte(*(WriteBuffer++));
239
240 return true;
241 }
242
243 /** Writes page addressed memory to the target's memory spaces.
244 *
245 * \param[in] WriteBuffCommand Command to send to the device to write a byte to the memory page buffer
246 * \param[in] EraseBuffCommand Command to send to the device to erase the memory page buffer
247 * \param[in] WritePageCommand Command to send to the device to write the page buffer to the destination memory
248 * \param[in] PageMode Bitfield indicating what operations need to be executed on the specified page
249 * \param[in] WriteAddress Start address to write the page data to within the target's address space
250 * \param[in] WriteBuffer Buffer to source data from
251 * \param[in] WriteSize Number of bytes to write
252 *
253 * \return Boolean true if the command sequence complete successfully
254 */
255 bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,
256 const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,
257 const uint8_t* WriteBuffer, const uint16_t WriteSize)
258 {
259 if (PageMode & XPRG_PAGEMODE_ERASE)
260 {
261 /* Wait until the NVM controller is no longer busy */
262 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
263 return false;
264
265 /* Send the memory buffer erase command to the target */
266 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
267 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
268 XPROGTarget_SendByte(EraseBuffCommand);
269
270 /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
271 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
272 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
273 XPROGTarget_SendByte(1 << 0);
274 }
275
276 if (WriteSize)
277 {
278 /* Wait until the NVM controller is no longer busy */
279 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
280 return false;
281
282 /* Send the memory buffer write command to the target */
283 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
284 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
285 XPROGTarget_SendByte(WriteBuffCommand);
286
287 /* Load the PDI pointer register with the start address we want to write to */
288 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
289 XMEGANVM_SendAddress(WriteAddress);
290
291 /* Send the REPEAT command with the specified number of bytes to write */
292 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
293 XPROGTarget_SendByte(WriteSize - 1);
294
295 /* Send a ST command with indirect access and postincrement to write the bytes */
296 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
297 for (uint16_t i = 0; i < WriteSize; i++)
298 XPROGTarget_SendByte(*(WriteBuffer++));
299 }
300
301 if (PageMode & XPRG_PAGEMODE_WRITE)
302 {
303 /* Wait until the NVM controller is no longer busy */
304 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
305 return false;
306
307 /* Send the memory write command to the target */
308 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
309 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
310 XPROGTarget_SendByte(WritePageCommand);
311
312 /* Send the address of the first page location to write the memory page */
313 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
314 XMEGANVM_SendAddress(WriteAddress);
315 XPROGTarget_SendByte(0x00);
316 }
317
318 return true;
319 }
320
321 /** Erases a specific memory space of the target.
322 *
323 * \param[in] EraseCommand NVM erase command to send to the device
324 * \param[in] Address Address inside the memory space to erase
325 *
326 * \return Boolean true if the command sequence complete successfully
327 */
328 bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)
329 {
330 /* Wait until the NVM controller is no longer busy */
331 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
332 return false;
333
334 /* Send the memory erase command to the target */
335 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
336 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
337 XPROGTarget_SendByte(EraseCommand);
338
339 /* Chip erase is handled separately, since it's procedure is different to other erase types */
340 if (EraseCommand == XMEGA_NVM_CMD_CHIPERASE)
341 {
342 /* Set CMDEX bit in NVM CTRLA register to start the chip erase */
343 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
344 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
345 XPROGTarget_SendByte(1 << 0);
346 }
347 else
348 {
349 /* Other erase modes just need us to address a byte within the target memory space */
350 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
351 XMEGANVM_SendAddress(Address);
352 XPROGTarget_SendByte(0x00);
353 }
354
355 /* Wait until the NVM bus is ready again */
356 if (!(XMEGANVM_WaitWhileNVMBusBusy()))
357 return false;
358
359 return true;
360 }
361
362 #endif