Projects/AVRISP/Lib/PDITarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2009.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, and distribute this software
  13   and its documentation for any purpose and without fee is hereby
  14   granted, provided that the above copyright notice appear in all
  15   copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 /** \file
  32  *
  33  *  Target-related functions for the PDI Protocol decoder.
  34  */
  35
  36 #define  INCLUDE_FROM_PDITARGET_C
  37 #include "PDITarget.h"
  38
  39 #if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
  40
  41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
  42 volatile bool     IsSending;
  43
  44 #if !defined(PDI_VIA_HARDWARE_USART)
  45 /** Software USART raw frame bits for transmission/reception. */
  46 volatile uint16_t SoftUSART_Data;
  47
  48 /** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
  49 #define SoftUSART_BitCount   GPIOR2
  50
  51 /** ISR to manage the software USART when bit-banged USART mode is selected. */
  52 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
  53 {
  54         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
  55         BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;
  56
  57         /* If not sending or receiving, just exit */
  58         if (!(SoftUSART_BitCount))
  59           return;
  60
  61         /* Check to see if we are at a rising or falling edge of the clock */
  62         if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)
  63         {
  64                 /* If at rising clock edge and we are in send mode, abort */
  65                 if (IsSending)
  66                   return;
  67
  68                 /* Wait for the start bit when receiving */
  69                 if ((SoftUSART_BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
  70                   return;
  71
  72                 if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)
  73                   SoftUSART_Data |= (1 << BITS_IN_FRAME);
  74
  75                 SoftUSART_Data >>= 1;
  76                 SoftUSART_BitCount--;
  77         }
  78         else
  79         {
  80                 /* If at falling clock edge and we are in receive mode, abort */
  81                 if (!IsSending)
  82                   return;
  83
  84                 if (SoftUSART_Data & 0x01)
  85                   BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;
  86                 else
  87                   BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
  88
  89                 SoftUSART_Data >>= 1;
  90                 SoftUSART_BitCount--;
  91         }
  92 }
  93 #endif
  94
  95 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
  96 void PDITarget_EnableTargetPDI(void)
  97 {
  98 #if defined(PDI_VIA_HARDWARE_USART)
  99         /* Set Tx and XCK as outputs, Rx as input */
 100         DDRD |=  (1 << 5) | (1 << 3);
 101         DDRD &= ~(1 << 2);
 102
 103         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 104         PORTD |= (1 << 3);
 105         asm volatile ("NOP"::);
 106         asm volatile ("NOP"::);
 107
 108         /* Set up the synchronous USART for XMEGA communications -
 109            8 data bits, even parity, 2 stop bits */
 110         UBRR1  = (F_CPU / 1000000UL);
 111         UCSR1B = (1 << TXEN1);
 112         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 113
 114         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
 115         PDITarget_SendBreak();
 116         PDITarget_SendBreak();
 117 #else
 118         /* Set DATA and CLOCK lines to outputs */
 119         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 120         BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
 121
 122         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 123         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 124         asm volatile ("NOP"::);
 125         asm volatile ("NOP"::);
 126
 127         /* Fire timer compare ISR every 100 cycles to manage the software USART */
 128         OCR1A   = 80;
 129         TCCR1B  = (1 << WGM12) | (1 << CS10);
 130         TIMSK1  = (1 << OCIE1A);
 131
 132         PDITarget_SendBreak();
 133         PDITarget_SendBreak();
 134 #endif
 135 }
 136
 137 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
 138 void PDITarget_DisableTargetPDI(void)
 139 {
 140 #if defined(PDI_VIA_HARDWARE_USART)
 141         /* Turn off receiver and transmitter of the USART, clear settings */
 142         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 143         UCSR1B  = 0;
 144         UCSR1C  = 0;
 145
 146         /* Set all USART lines as input, tristate */
 147         DDRD  &= ~((1 << 5) | (1 << 3));
 148         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 149 #else
 150         /* Set DATA and CLOCK lines to inputs */
 151         BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 152         BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
 153
 154         /* Tristate DATA and CLOCK lines */
 155         BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;
 156         BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
 157
 158         TCCR0B  = 0;
 159 #endif
 160 }
 161
 162 /** Sends a byte via the USART.
 163  *
 164  *  \param[in] Byte  Byte to send through the USART
 165  */
 166 void PDITarget_SendByte(uint8_t Byte)
 167 {
 168 #if defined(PDI_VIA_HARDWARE_USART)
 169         /* Switch to Tx mode if currently in Rx mode */
 170         if (!(IsSending))
 171         {
 172                 PORTD  |=  (1 << 3);
 173                 DDRD   |=  (1 << 3);
 174
 175                 UCSR1B |=  (1 << TXEN1);
 176                 UCSR1B &= ~(1 << RXEN1);
 177
 178                 IsSending = true;
 179         }
 180
 181         /* Wait until there is space in the hardware Tx buffer before writing */
 182         while (!(UCSR1A & (1 << UDRE1)));
 183         UCSR1A |= (1 << TXC1);
 184         UDR1    = Byte;
 185 #else
 186         /* Switch to Tx mode if currently in Rx mode */
 187         if (!(IsSending))
 188         {
 189                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 190                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 191
 192                 IsSending = true;
 193         }
 194
 195         bool    EvenParityBit = false;
 196         uint8_t ParityData    = Byte;
 197
 198         /* Compute Even parity bit */
 199         for (uint8_t i = 0; i < 8; i++)
 200         {
 201                 EvenParityBit ^= ParityData & 0x01;
 202                 ParityData    >>= 1;
 203         }
 204
 205         while (SoftUSART_BitCount);
 206
 207         /* Data shifted out LSB first, START DATA PARITY STOP STOP */
 208         SoftUSART_Data     = ((uint16_t)EvenParityBit << 9) | ((uint16_t)Byte << 1) | (1 << 10) | (1 << 11);
 209         SoftUSART_BitCount = BITS_IN_FRAME;
 210 #endif
 211 }
 212
 213 /** Receives a byte via the software USART, blocking until data is received.
 214  *
 215  *  \return Received byte from the USART
 216  */
 217 uint8_t PDITarget_ReceiveByte(void)
 218 {
 219 #if defined(PDI_VIA_HARDWARE_USART)
 220         /* Switch to Rx mode if currently in Tx mode */
 221         if (IsSending)
 222         {
 223                 while (!(UCSR1A & (1 << TXC1)));
 224                 UCSR1A |=  (1 << TXC1);
 225
 226                 UCSR1B &= ~(1 << TXEN1);
 227                 UCSR1B |=  (1 << RXEN1);
 228
 229                 DDRD   &= ~(1 << 3);
 230                 PORTD  &= ~(1 << 3);
 231
 232                 IsSending = false;
 233         }
 234
 235         /* Wait until a byte has been received before reading */
 236         while (!(UCSR1A & (1 << RXC1)));
 237         return UDR1;
 238 #else
 239         /* Switch to Rx mode if currently in Tx mode */
 240         if (IsSending)
 241         {
 242                 while (SoftUSART_BitCount);
 243
 244                 BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 245                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 246
 247                 IsSending = false;
 248         }
 249
 250         /* Wait until a byte has been received before reading */
 251         SoftUSART_BitCount = BITS_IN_FRAME;
 252         while (SoftUSART_BitCount);
 253
 254         /* Throw away the start, parity and stop bits to leave only the data */
 255         return (uint8_t)(SoftUSART_Data >> 1);
 256 #endif
 257 }
 258
 259 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
 260 void PDITarget_SendBreak(void)
 261 {
 262 #if defined(PDI_VIA_HARDWARE_USART)
 263         /* Switch to Tx mode if currently in Rx mode */
 264         if (!(IsSending))
 265         {
 266                 PORTD  |=  (1 << 3);
 267                 DDRD   |=  (1 << 3);
 268
 269                 UCSR1B &= ~(1 << RXEN1);
 270                 UCSR1B |=  (1 << TXEN1);
 271
 272                 IsSending = true;
 273         }
 274
 275         /* Need to do nothing for a full frame to send a BREAK */
 276         for (uint8_t i = 0; i <= BITS_IN_FRAME; i++)
 277         {
 278                 /* Wait for a full cycle of the clock */
 279                 while (PIND & (1 << 5));
 280                 while (!(PIND & (1 << 5)));
 281         }
 282 #else
 283         /* Switch to Tx mode if currently in Rx mode */
 284         if (!(IsSending))
 285         {
 286                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 287                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 288
 289                 IsSending = true;
 290         }
 291
 292         while (SoftUSART_BitCount);
 293
 294         /* Need to do nothing for a full frame to send a BREAK */
 295         SoftUSART_Data     = 0x0FFF;
 296         SoftUSART_BitCount = BITS_IN_FRAME;
 297 #endif
 298 }
 299
 300 /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC
 301  *  calculation.
 302  *
 303  *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
 304  */
 305 bool PDITarget_WaitWhileNVMBusBusy(void)
 306 {
 307         TCNT0 = 0;
 308
 309         /* Poll the STATUS register to check to see if NVM access has been enabled */
 310         while (TCNT0 < PDI_NVM_TIMEOUT_MS)
 311         {
 312                 /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */
 313                 PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
 314                 if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)
 315                   return true;
 316         }
 317
 318         return false;
 319 }
 320
 321 #endif