Fixed RNDISEthernet demos crashing when calculating checksums for Ethernet/TCP packet...
[pub/USBasp.git] / Projects / AVRISP-MKII / Lib / XPROG / XPROGTarget.c
1 /*
2 LUFA Library
3 Copyright (C) Dean Camera, 2010.
4
5 dean [at] fourwalledcubicle [dot] com
6 www.fourwalledcubicle.com
7 */
8
9 /*
10 Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)
11
12 Permission to use, copy, modify, distribute, and sell this
13 software and its documentation for any purpose is hereby granted
14 without fee, provided that the above copyright notice appear in
15 all copies and that both that the copyright notice and this
16 permission notice and warranty disclaimer appear in supporting
17 documentation, and that the name of the author not be used in
18 advertising or publicity pertaining to distribution of the
19 software without specific, written prior permission.
20
21 The author disclaim all warranties with regard to this
22 software, including all implied warranties of merchantability
23 and fitness. In no event shall the author be liable for any
24 special, indirect or consequential damages or any damages
25 whatsoever resulting from loss of use, data or profits, whether
26 in an action of contract, negligence or other tortious action,
27 arising out of or in connection with the use or performance of
28 this software.
29 */
30
31 /** \file
32 *
33 * Target-related functions for the PDI Protocol decoder.
34 */
35
36 #define INCLUDE_FROM_XPROGTARGET_C
37 #include "XPROGTarget.h"
38
39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
40
41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
42 volatile bool IsSending;
43
44 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
45 void XPROGTarget_EnableTargetPDI(void)
46 {
47 IsSending = false;
48
49 /* Set Tx and XCK as outputs, Rx as input */
50 DDRD |= (1 << 5) | (1 << 3);
51 DDRD &= ~(1 << 2);
52
53 /* Set DATA line high for at least 90ns to disable /RESET functionality */
54 PORTD |= (1 << 3);
55 _delay_us(1);
56
57 /* Set up the synchronous USART for XMEGA communications - 8 data bits, even parity, 2 stop bits */
58 UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);
59 UCSR1B = (1 << TXEN1);
60 UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
61
62 /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
63 XPROGTarget_SendBreak();
64 XPROGTarget_SendBreak();
65 }
66
67 /** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
68 void XPROGTarget_EnableTargetTPI(void)
69 {
70 IsSending = false;
71
72 /* Set /RESET line low for at least 400ns to enable TPI functionality */
73 AUX_LINE_DDR |= AUX_LINE_MASK;
74 AUX_LINE_PORT &= ~AUX_LINE_MASK;
75 _delay_us(1);
76
77 /* Set Tx and XCK as outputs, Rx as input */
78 DDRD |= (1 << 5) | (1 << 3);
79 DDRD &= ~(1 << 2);
80
81 /* Set up the synchronous USART for TINY communications - 8 data bits, even parity, 2 stop bits */
82 UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);
83 UCSR1B = (1 << TXEN1);
84 UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
85
86 /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
87 XPROGTarget_SendBreak();
88 XPROGTarget_SendBreak();
89 }
90
91 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
92 void XPROGTarget_DisableTargetPDI(void)
93 {
94 /* Switch to Rx mode to ensure that all pending transmissions are complete */
95 XPROGTarget_SetRxMode();
96
97 /* Turn off receiver and transmitter of the USART, clear settings */
98 UCSR1A = ((1 << TXC1) | (1 << RXC1));
99 UCSR1B = 0;
100 UCSR1C = 0;
101
102 /* Tristate all pins */
103 DDRD &= ~((1 << 5) | (1 << 3));
104 PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
105 }
106
107 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */
108 void XPROGTarget_DisableTargetTPI(void)
109 {
110 /* Switch to Rx mode to ensure that all pending transmissions are complete */
111 XPROGTarget_SetRxMode();
112
113 /* Turn off receiver and transmitter of the USART, clear settings */
114 UCSR1A |= (1 << TXC1) | (1 << RXC1);
115 UCSR1B = 0;
116 UCSR1C = 0;
117
118 /* Set all USART lines as input, tristate */
119 DDRD &= ~((1 << 5) | (1 << 3));
120 PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
121
122 /* Tristate target /RESET line */
123 AUX_LINE_DDR &= ~AUX_LINE_MASK;
124 AUX_LINE_PORT &= ~AUX_LINE_MASK;
125 }
126
127 /** Sends a byte via the USART.
128 *
129 * \param[in] Byte Byte to send through the USART
130 */
131 void XPROGTarget_SendByte(const uint8_t Byte)
132 {
133 /* Switch to Tx mode if currently in Rx mode */
134 if (!(IsSending))
135 XPROGTarget_SetTxMode();
136
137 /* Wait until there is space in the hardware Tx buffer before writing */
138 while (!(UCSR1A & (1 << UDRE1)));
139 UCSR1A |= (1 << TXC1);
140 UDR1 = Byte;
141
142 if (TimeoutMSRemaining)
143 TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
144 }
145
146 /** Receives a byte via the software USART, blocking until data is received.
147 *
148 * \return Received byte from the USART
149 */
150 uint8_t XPROGTarget_ReceiveByte(void)
151 {
152 /* Switch to Rx mode if currently in Tx mode */
153 if (IsSending)
154 XPROGTarget_SetRxMode();
155
156 /* Wait until a byte has been received before reading */
157 while (!(UCSR1A & (1 << RXC1)) && TimeoutMSRemaining);
158
159 if (TimeoutMSRemaining)
160 TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
161
162 return UDR1;
163 }
164
165 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
166 void XPROGTarget_SendBreak(void)
167 {
168 /* Switch to Tx mode if currently in Rx mode */
169 if (!(IsSending))
170 XPROGTarget_SetTxMode();
171
172 /* Need to do nothing for a full frame to send a BREAK */
173 for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
174 {
175 /* Wait for a full cycle of the clock */
176 while (PIND & (1 << 5));
177 while (!(PIND & (1 << 5)));
178 }
179
180 if (TimeoutMSRemaining)
181 TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
182 }
183
184 static void XPROGTarget_SetTxMode(void)
185 {
186 /* Wait for a full cycle of the clock */
187 while (PIND & (1 << 5));
188 while (!(PIND & (1 << 5)));
189
190 PORTD |= (1 << 3);
191 DDRD |= (1 << 3);
192
193 UCSR1B &= ~(1 << RXEN1);
194 UCSR1B |= (1 << TXEN1);
195
196 IsSending = true;
197
198 if (TimeoutMSRemaining)
199 TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
200
201 IsSending = true;
202 }
203
204 static void XPROGTarget_SetRxMode(void)
205 {
206 while (!(UCSR1A & (1 << TXC1)));
207 UCSR1A |= (1 << TXC1);
208
209 UCSR1B &= ~(1 << TXEN1);
210 UCSR1B |= (1 << RXEN1);
211
212 DDRD &= ~(1 << 3);
213 PORTD &= ~(1 << 3);
214
215 if (TimeoutMSRemaining)
216 TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
217
218 IsSending = false;
219 }
220
221 #endif