Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2010.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2010  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, distribute, and sell this
  13   software and its documentation for any purpose is hereby granted
  14   without fee, provided that the above copyright notice appear in
  15   all copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 /** \file
  32  *
  33  *  Target-related functions for the PDI Protocol decoder.
  34  */
  35
  36 #define  INCLUDE_FROM_XPROGTARGET_C
  37 #include "XPROGTarget.h"
  38
  39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
  40
  41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
  42 volatile bool               IsSending;
  43
  44 #if !defined(XPROG_VIA_HARDWARE_USART)
  45 /** Software USART raw frame bits for transmission/reception. */
  46 volatile uint16_t           SoftUSART_Data;
  47
  48 /** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
  49 #define SoftUSART_BitCount  GPIOR2
  50
  51
  52 /** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */
  53 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
  54 {
  55         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
  56         BITBANG_PDICLOCK_PIN = BITBANG_PDICLOCK_MASK;
  57
  58         /* If not sending or receiving, just exit */
  59         if (!(SoftUSART_BitCount))
  60           return;
  61
  62         /* Check to see if we are at a rising or falling edge of the clock */
  63         if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)
  64         {
  65                 /* If at rising clock edge and we are in send mode, abort */
  66                 if (IsSending)
  67                   return;
  68
  69                 /* Wait for the start bit when receiving */
  70                 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
  71                   return;
  72
  73                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
  74                  * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */
  75                 if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)
  76                   ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
  77
  78                 SoftUSART_Data >>= 1;
  79                 SoftUSART_BitCount--;
  80         }
  81         else
  82         {
  83                 /* If at falling clock edge and we are in receive mode, abort */
  84                 if (!IsSending)
  85                   return;
  86
  87                 /* Set the data line to the next bit value */
  88                 if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
  89                   BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;
  90                 else
  91                   BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
  92
  93                 SoftUSART_Data >>= 1;
  94                 SoftUSART_BitCount--;
  95         }
  96 }
  97
  98 /** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */
  99 ISR(TIMER1_CAPT_vect, ISR_BLOCK)
 100 {
 101         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
 102         BITBANG_TPICLOCK_PIN = BITBANG_TPICLOCK_MASK;
 103
 104         /* If not sending or receiving, just exit */
 105         if (!(SoftUSART_BitCount))
 106           return;
 107
 108         /* Check to see if we are at a rising or falling edge of the clock */
 109         if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)
 110         {
 111                 /* If at rising clock edge and we are in send mode, abort */
 112                 if (IsSending)
 113                   return;
 114
 115                 /* Wait for the start bit when receiving */
 116                 if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))
 117                   return;
 118
 119                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
 120                  * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */
 121                 if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)
 122                  ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));
 123
 124                 SoftUSART_Data >>= 1;
 125                 SoftUSART_BitCount--;
 126         }
 127         else
 128         {
 129                 /* If at falling clock edge and we are in receive mode, abort */
 130                 if (!IsSending)
 131                   return;
 132
 133                 /* Set the data line to the next bit value */
 134                 if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)
 135                   BITBANG_TPIDATA_PORT |=  BITBANG_TPIDATA_MASK;
 136                 else
 137                   BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
 138
 139                 SoftUSART_Data >>= 1;
 140                 SoftUSART_BitCount--;
 141         }
 142 }
 143 #endif
 144
 145 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
 146 void XPROGTarget_EnableTargetPDI(void)
 147 {
 148         IsSending = false;
 149
 150 #if defined(XPROG_VIA_HARDWARE_USART)
 151         /* Set Tx and XCK as outputs, Rx as input */
 152         DDRD |=  (1 << 5) | (1 << 3);
 153         DDRD &= ~(1 << 2);
 154
 155         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 156         PORTD |= (1 << 3);
 157         _delay_us(1);
 158
 159         /* Set up the synchronous USART for XMEGA communications -
 160            8 data bits, even parity, 2 stop bits */
 161         UBRR1  = (F_CPU / XPROG_HARDWARE_SPEED);
 162         UCSR1B = (1 << TXEN1);
 163         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 164 #else
 165         /* Set DATA and CLOCK lines to outputs */
 166         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 167         BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
 168
 169         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 170         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 171         _delay_us(1);
 172
 173         /* Fire timer compare channel A ISR to manage the software USART */
 174         OCR1A   = BITS_BETWEEN_USART_CLOCKS;
 175         OCR1B   = BITS_BETWEEN_USART_CLOCKS;
 176         TCCR1B  = (1 << WGM12) | (1 << CS10);
 177         TIMSK1  = (1 << OCIE1A);
 178 #endif
 179
 180         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
 181         XPROGTarget_SendBreak();
 182         XPROGTarget_SendBreak();
 183 }
 184
 185 /** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
 186 void XPROGTarget_EnableTargetTPI(void)
 187 {
 188         IsSending = false;
 189
 190         /* Set /RESET line low for at least 400ns to enable TPI functionality */
 191         AUX_LINE_DDR  |=  AUX_LINE_MASK;
 192         AUX_LINE_PORT &= ~AUX_LINE_MASK;
 193         _delay_us(1);
 194
 195 #if defined(XPROG_VIA_HARDWARE_USART)
 196         /* Set Tx and XCK as outputs, Rx as input */
 197         DDRD |=  (1 << 5) | (1 << 3);
 198         DDRD &= ~(1 << 2);
 199
 200         /* Set up the synchronous USART for TINY communications -
 201            8 data bits, even parity, 2 stop bits */
 202         UBRR1  = (F_CPU / XPROG_HARDWARE_SPEED);
 203         UCSR1B = (1 << TXEN1);
 204         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 205 #else
 206         /* Set DATA and CLOCK lines to outputs */
 207         BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;
 208         BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;
 209
 210         /* Set DATA line high for idle state */
 211         BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 212
 213         /* Fire timer capture channel ISR to manage the software USART */
 214         ICR1    = BITS_BETWEEN_USART_CLOCKS;
 215         TCCR1B  = (1 << WGM13) | (1 << WGM12) | (1 << CS10);
 216         TIMSK1  = (1 << ICIE1);
 217 #endif
 218
 219         /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
 220         XPROGTarget_SendBreak();
 221         XPROGTarget_SendBreak();
 222 }
 223
 224 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
 225 void XPROGTarget_DisableTargetPDI(void)
 226 {
 227         /* Switch to Rx mode to ensure that all pending transmissions are complete */
 228         XPROGTarget_SetRxMode();
 229
 230 #if defined(XPROG_VIA_HARDWARE_USART)
 231         /* Turn off receiver and transmitter of the USART, clear settings */
 232         UCSR1A  = ((1 << TXC1) | (1 << RXC1));
 233         UCSR1B  = 0;
 234         UCSR1C  = 0;
 235
 236         /* Tristate all pins */
 237         DDRD  &= ~((1 << 5) | (1 << 3));
 238         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 239 #else
 240         /* Turn off software USART management timer */
 241         TCCR1B = 0;
 242
 243         /* Set DATA and CLOCK lines to inputs */
 244         BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 245         BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
 246
 247         /* Tristate DATA and CLOCK lines */
 248         BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;
 249         BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
 250 #endif
 251 }
 252
 253 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */
 254 void XPROGTarget_DisableTargetTPI(void)
 255 {
 256         /* Switch to Rx mode to ensure that all pending transmissions are complete */
 257         XPROGTarget_SetRxMode();
 258
 259 #if defined(XPROG_VIA_HARDWARE_USART)
 260         /* Turn off receiver and transmitter of the USART, clear settings */
 261         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 262         UCSR1B  = 0;
 263         UCSR1C  = 0;
 264
 265         /* Set all USART lines as input, tristate */
 266         DDRD  &= ~((1 << 5) | (1 << 3));
 267         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 268 #else
 269         /* Turn off software USART management timer */
 270         TCCR1B = 0;
 271
 272         /* Set DATA and CLOCK lines to inputs */
 273         BITBANG_TPIDATA_DDR   &= ~BITBANG_TPIDATA_MASK;
 274         BITBANG_TPICLOCK_DDR  &= ~BITBANG_TPICLOCK_MASK;
 275
 276         /* Tristate DATA and CLOCK lines */
 277         BITBANG_TPIDATA_PORT  &= ~BITBANG_TPIDATA_MASK;
 278         BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;
 279 #endif
 280
 281         /* Tristate target /RESET line */
 282         AUX_LINE_DDR  &= ~AUX_LINE_MASK;
 283         AUX_LINE_PORT &= ~AUX_LINE_MASK;
 284 }
 285
 286 /** Sends a byte via the USART.
 287  *
 288  *  \param[in] Byte  Byte to send through the USART
 289  */
 290 void XPROGTarget_SendByte(const uint8_t Byte)
 291 {
 292         /* Switch to Tx mode if currently in Rx mode */
 293         if (!(IsSending))
 294           XPROGTarget_SetTxMode();
 295
 296 #if defined(XPROG_VIA_HARDWARE_USART)
 297         /* Wait until there is space in the hardware Tx buffer before writing */
 298         while (!(UCSR1A & (1 << UDRE1)));
 299         UCSR1A |= (1 << TXC1);
 300         UDR1    = Byte;
 301 #else
 302         /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */
 303         uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));
 304
 305         /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */
 306         uint8_t ParityData = Byte;
 307         while (ParityData)
 308         {
 309                 NewUSARTData ^= (1 << 9);
 310                 ParityData   &= (ParityData - 1);
 311         }
 312
 313         /* Wait until transmitter is idle before writing new data */
 314         while (SoftUSART_BitCount);
 315
 316         /* Data shifted out LSB first, START DATA PARITY STOP STOP */
 317         SoftUSART_Data     = NewUSARTData;
 318         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 319 #endif
 320 }
 321
 322 /** Receives a byte via the software USART, blocking until data is received.
 323  *
 324  *  \return Received byte from the USART
 325  */
 326 uint8_t XPROGTarget_ReceiveByte(void)
 327 {
 328         /* Switch to Rx mode if currently in Tx mode */
 329         if (IsSending)
 330           XPROGTarget_SetRxMode();
 331
 332 #if defined(XPROG_VIA_HARDWARE_USART)
 333         /* Wait until a byte has been received before reading */
 334         while (!(UCSR1A & (1 << RXC1)) && TimeoutMSRemaining)
 335         {
 336                 /* Manage software timeout */
 337                 if (TIFR0 & (1 << OCF0A))
 338                 {
 339                         TIFR0 |= (1 << OCF0A);
 340                         TimeoutMSRemaining--;
 341                 }
 342         }
 343
 344         return UDR1;
 345 #else
 346         /* Wait until a byte has been received before reading */
 347         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 348         while (SoftUSART_BitCount && TimeoutMSRemaining)
 349         {
 350                 /* Manage software timeout */
 351                 if (TIFR0 & (1 << OCF0A))
 352                 {
 353                         TIFR0 |= (1 << OCF0A);
 354                         TimeoutMSRemaining--;
 355                 }
 356         }
 357
 358         if (TimeoutMSRemaining)
 359           TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
 360
 361         /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */
 362         return (uint8_t)SoftUSART_Data;
 363 #endif
 364 }
 365
 366 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
 367 void XPROGTarget_SendBreak(void)
 368 {
 369         /* Switch to Tx mode if currently in Rx mode */
 370         if (!(IsSending))
 371           XPROGTarget_SetTxMode();
 372
 373 #if defined(XPROG_VIA_HARDWARE_USART)
 374         /* Need to do nothing for a full frame to send a BREAK */
 375         for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
 376         {
 377                 /* Wait for a full cycle of the clock */
 378                 while (PIND & (1 << 5));
 379                 while (!(PIND & (1 << 5)));
 380         }
 381 #else
 382         while (SoftUSART_BitCount);
 383
 384         /* Need to do nothing for a full frame to send a BREAK */
 385         SoftUSART_Data     = 0x0FFF;
 386         SoftUSART_BitCount = BITS_IN_USART_FRAME;
 387 #endif
 388 }
 389
 390 static void XPROGTarget_SetTxMode(void)
 391 {
 392 #if defined(XPROG_VIA_HARDWARE_USART)
 393         /* Wait for a full cycle of the clock */
 394         while (PIND & (1 << 5));
 395         while (!(PIND & (1 << 5)));
 396
 397         PORTD  |=  (1 << 3);
 398         DDRD   |=  (1 << 3);
 399
 400         UCSR1B &= ~(1 << RXEN1);
 401         UCSR1B |=  (1 << TXEN1);
 402
 403         IsSending = true;
 404 #else
 405         while (SoftUSART_BitCount);
 406
 407         /* Wait for a full cycle of the clock */
 408         SoftUSART_Data     = 0x0001;
 409         SoftUSART_BitCount = 1;
 410         while (SoftUSART_BitCount);
 411
 412         if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
 413         {
 414                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 415                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 416         }
 417         else
 418         {
 419                 BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 420                 BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;
 421         }
 422 #endif
 423
 424         IsSending = true;
 425 }
 426
 427 static void XPROGTarget_SetRxMode(void)
 428 {
 429 #if defined(XPROG_VIA_HARDWARE_USART)
 430         while (!(UCSR1A & (1 << TXC1)));
 431         UCSR1A |=  (1 << TXC1);
 432
 433         UCSR1B &= ~(1 << TXEN1);
 434         UCSR1B |=  (1 << RXEN1);
 435
 436         DDRD   &= ~(1 << 3);
 437         PORTD  &= ~(1 << 3);
 438 #else
 439         while (SoftUSART_BitCount);
 440
 441         if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
 442         {
 443                 BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 444                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 445         }
 446         else
 447         {
 448                 BITBANG_TPIDATA_DDR  &= ~BITBANG_TPIDATA_MASK;
 449                 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
 450         }
 451
 452         /* Wait until DATA line has been pulled up to idle by the target */
 453         while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK) && TimeoutMSRemaining)
 454         {
 455                 /* Manage software timeout */
 456                 if (TIFR0 & (1 << OCF0A))
 457                 {
 458                         TIFR0 |= (1 << OCF0A);
 459                         TimeoutMSRemaining--;
 460                 }
 461         }
 462 #endif
 463
 464     if (TimeoutMSRemaining)
 465           TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
 466
 467         IsSending = false;
 468 }
 469
 470 #endif