Projects/AVRISP/Lib/PDITarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2009.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, and distribute this software
  13   and its documentation for any purpose and without fee is hereby
  14   granted, provided that the above copyright notice appear in all
  15   copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 /** \file
  32  *
  33  *  Target-related functions for the PDI Protocol decoder.
  34  */
  35
  36 #define  INCLUDE_FROM_PDITARGET_C
  37 #include "PDITarget.h"
  38
  39 #if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
  40
  41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
  42 volatile bool               IsSending;
  43
  44 #if !defined(PDI_VIA_HARDWARE_USART)
  45 /** Software USART raw frame bits for transmission/reception. */
  46 volatile uint16_t           SoftUSART_Data;
  47
  48 /** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
  49 #define SoftUSART_BitCount  GPIOR2
  50
  51
  52 /** ISR to manage the software USART when bit-banged USART mode is selected. */
  53 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
  54 {
  55         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
  56         BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;
  57
  58         /* If not sending or receiving, just exit */
  59         if (!(SoftUSART_BitCount))
  60           return;
  61
  62         /* Check to see if we are at a rising or falling edge of the clock */
  63         if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)
  64         {
  65                 /* If at rising clock edge and we are in send mode, abort */
  66                 if (IsSending)
  67                   return;
  68
  69                 /* Wait for the start bit when receiving */
  70                 if ((SoftUSART_BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
  71                   return;
  72
  73                 if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)
  74                   SoftUSART_Data |= (1 << BITS_IN_FRAME);
  75
  76                 SoftUSART_Data >>= 1;
  77                 SoftUSART_BitCount--;
  78         }
  79         else
  80         {
  81                 /* If at falling clock edge and we are in receive mode, abort */
  82                 if (!IsSending)
  83                   return;
  84
  85                 if (SoftUSART_Data & 0x01)
  86                   BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;
  87                 else
  88                   BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
  89
  90                 SoftUSART_Data >>= 1;
  91                 SoftUSART_BitCount--;
  92         }
  93 }
  94 #endif
  95
  96 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
  97 void PDITarget_EnableTargetPDI(void)
  98 {
  99 #if defined(PDI_VIA_HARDWARE_USART)
 100         /* Set Tx and XCK as outputs, Rx as input */
 101         DDRD |=  (1 << 5) | (1 << 3);
 102         DDRD &= ~(1 << 2);
 103
 104         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 105         PORTD |= (1 << 3);
 106         asm volatile ("NOP"::);
 107         asm volatile ("NOP"::);
 108
 109         /* Set up the synchronous USART for XMEGA communications -
 110            8 data bits, even parity, 2 stop bits */
 111         UBRR1  = (F_CPU / 1000000UL);
 112         UCSR1B = (1 << TXEN1);
 113         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 114
 115         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
 116         PDITarget_SendBreak();
 117         PDITarget_SendBreak();
 118 #else
 119         /* Set DATA and CLOCK lines to outputs */
 120         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 121         BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
 122
 123         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 124         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 125         asm volatile ("NOP"::);
 126         asm volatile ("NOP"::);
 127
 128         /* Fire timer compare ISR every 100 cycles to manage the software USART */
 129         OCR1A   = 80;
 130         TCCR1B  = (1 << WGM12) | (1 << CS10);
 131         TIMSK1  = (1 << OCIE1A);
 132
 133         PDITarget_SendBreak();
 134         PDITarget_SendBreak();
 135 #endif
 136 }
 137
 138 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
 139 void PDITarget_DisableTargetPDI(void)
 140 {
 141 #if defined(PDI_VIA_HARDWARE_USART)
 142         /* Turn off receiver and transmitter of the USART, clear settings */
 143         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 144         UCSR1B  = 0;
 145         UCSR1C  = 0;
 146
 147         /* Set all USART lines as input, tristate */
 148         DDRD  &= ~((1 << 5) | (1 << 3));
 149         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 150 #else
 151         /* Set DATA and CLOCK lines to inputs */
 152         BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 153         BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
 154
 155         /* Tristate DATA and CLOCK lines */
 156         BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;
 157         BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
 158
 159         TCCR0B  = 0;
 160 #endif
 161 }
 162
 163 /** Sends a byte via the USART.
 164  *
 165  *  \param[in] Byte  Byte to send through the USART
 166  */
 167 void PDITarget_SendByte(uint8_t Byte)
 168 {
 169 #if defined(PDI_VIA_HARDWARE_USART)
 170         /* Switch to Tx mode if currently in Rx mode */
 171         if (!(IsSending))
 172         {
 173                 PORTD  |=  (1 << 3);
 174                 DDRD   |=  (1 << 3);
 175
 176                 UCSR1B |=  (1 << TXEN1);
 177                 UCSR1B &= ~(1 << RXEN1);
 178
 179                 IsSending = true;
 180         }
 181
 182         /* Wait until there is space in the hardware Tx buffer before writing */
 183         while (!(UCSR1A & (1 << UDRE1)));
 184         UCSR1A |= (1 << TXC1);
 185         UDR1    = Byte;
 186 #else
 187         /* Switch to Tx mode if currently in Rx mode */
 188         if (!(IsSending))
 189         {
 190                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 191                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 192
 193                 IsSending = true;
 194         }
 195
 196         bool    EvenParityBit = false;
 197         uint8_t ParityData    = Byte;
 198
 199         /* Compute Even parity bit */
 200         for (uint8_t i = 0; i < 8; i++)
 201         {
 202                 EvenParityBit ^= ParityData & 0x01;
 203                 ParityData    >>= 1;
 204         }
 205
 206         while (SoftUSART_BitCount);
 207
 208         /* Data shifted out LSB first, START DATA PARITY STOP STOP */
 209         SoftUSART_Data     = ((uint16_t)EvenParityBit << 9) | ((uint16_t)Byte << 1) | (1 << 10) | (1 << 11);
 210         SoftUSART_BitCount = BITS_IN_FRAME;
 211 #endif
 212 }
 213
 214 /** Receives a byte via the software USART, blocking until data is received.
 215  *
 216  *  \return Received byte from the USART
 217  */
 218 uint8_t PDITarget_ReceiveByte(void)
 219 {
 220 #if defined(PDI_VIA_HARDWARE_USART)
 221         /* Switch to Rx mode if currently in Tx mode */
 222         if (IsSending)
 223         {
 224                 while (!(UCSR1A & (1 << TXC1)));
 225                 UCSR1A |=  (1 << TXC1);
 226
 227                 UCSR1B &= ~(1 << TXEN1);
 228                 UCSR1B |=  (1 << RXEN1);
 229
 230                 DDRD   &= ~(1 << 3);
 231                 PORTD  &= ~(1 << 3);
 232
 233                 IsSending = false;
 234         }
 235
 236         /* Wait until a byte has been received before reading */
 237         while (!(UCSR1A & (1 << RXC1)));
 238         return UDR1;
 239 #else
 240         /* Switch to Rx mode if currently in Tx mode */
 241         if (IsSending)
 242         {
 243                 while (SoftUSART_BitCount);
 244
 245                 BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 246                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 247
 248                 IsSending = false;
 249         }
 250
 251         /* Wait until a byte has been received before reading */
 252         SoftUSART_BitCount = BITS_IN_FRAME;
 253         while (SoftUSART_BitCount);
 254
 255         /* Throw away the start, parity and stop bits to leave only the data */
 256         return (uint8_t)(SoftUSART_Data >> 1);
 257 #endif
 258 }
 259
 260 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
 261 void PDITarget_SendBreak(void)
 262 {
 263 #if defined(PDI_VIA_HARDWARE_USART)
 264         /* Switch to Tx mode if currently in Rx mode */
 265         if (!(IsSending))
 266         {
 267                 PORTD  |=  (1 << 3);
 268                 DDRD   |=  (1 << 3);
 269
 270                 UCSR1B &= ~(1 << RXEN1);
 271                 UCSR1B |=  (1 << TXEN1);
 272
 273                 IsSending = true;
 274         }
 275
 276         /* Need to do nothing for a full frame to send a BREAK */
 277         for (uint8_t i = 0; i <= BITS_IN_FRAME; i++)
 278         {
 279                 /* Wait for a full cycle of the clock */
 280                 while (PIND & (1 << 5));
 281                 while (!(PIND & (1 << 5)));
 282         }
 283 #else
 284         /* Switch to Tx mode if currently in Rx mode */
 285         if (!(IsSending))
 286         {
 287                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 288                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 289
 290                 IsSending = true;
 291         }
 292
 293         while (SoftUSART_BitCount);
 294
 295         /* Need to do nothing for a full frame to send a BREAK */
 296         SoftUSART_Data     = 0x0FFF;
 297         SoftUSART_BitCount = BITS_IN_FRAME;
 298 #endif
 299 }
 300
 301 /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC
 302  *  calculation.
 303  *
 304  *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
 305  */
 306 bool PDITarget_WaitWhileNVMBusBusy(void)
 307 {
 308         TCNT0 = 0;
 309
 310         /* Poll the STATUS register to check to see if NVM access has been enabled */
 311         while (TCNT0 < PDI_NVM_TIMEOUT_MS)
 312         {
 313                 /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */
 314                 PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
 315                 if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)
 316                   return true;
 317         }
 318
 319         return false;
 320 }
 321
 322 #endif