Projects/AVRISP/Lib/PDITarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2009.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, and distribute this software
  13   and its documentation for any purpose and without fee is hereby
  14   granted, provided that the above copyright notice appear in all
  15   copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 #if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
  32
  33 /** \file
  34  *
  35  *  Target-related functions for the PDI Protocol decoder.
  36  */
  37
  38 #define  INCLUDE_FROM_PDITARGET_C
  39 #include "PDITarget.h"
  40
  41 volatile bool     IsSending;
  42
  43 #if !defined(PDI_VIA_HARDWARE_USART)
  44 volatile uint16_t SoftUSART_Data;
  45 volatile uint8_t  SoftUSART_BitCount;
  46
  47 ISR(TIMER0_COMPA_vect, ISR_BLOCK)
  48 {
  49         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
  50         BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;
  51
  52         /* If not sending or receiving, just exit */
  53         if (!(SoftUSART_BitCount))
  54           return;
  55
  56         /* Check to see if the current clock state is on the rising or falling edge */
  57         bool IsRisingEdge = (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK);
  58
  59         if (IsSending && !IsRisingEdge)
  60         {
  61                 if (SoftUSART_Data & 0x01)
  62                   BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;
  63                 else
  64                   BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
  65
  66                 SoftUSART_Data >>= 1;
  67                 SoftUSART_BitCount--;
  68         }
  69         else if (!IsSending && IsRisingEdge)
  70         {
  71                 /* Wait for the start bit when receiving */
  72                 if ((SoftUSART_BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
  73                   return;
  74
  75                 if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)
  76                   SoftUSART_Data |= (1 << BITS_IN_FRAME);
  77
  78                 SoftUSART_Data >>= 1;
  79                 SoftUSART_BitCount--;
  80         }
  81 }
  82 #endif
  83
  84 void PDITarget_EnableTargetPDI(void)
  85 {
  86 #if defined(PDI_VIA_HARDWARE_USART)
  87         /* Set Tx and XCK as outputs, Rx as input */
  88         DDRD |=  (1 << 5) | (1 << 3);
  89         DDRD &= ~(1 << 2);
  90
  91         /* Set DATA line high for at least 90ns to disable /RESET functionality */
  92         PORTD |= (1 << 3);
  93         asm volatile ("NOP"::);
  94         asm volatile ("NOP"::);
  95
  96         /* Set up the synchronous USART for XMEGA communications -
  97            8 data bits, even parity, 2 stop bits */
  98         UBRR1  = 10;
  99         UCSR1B = (1 << TXEN1);
 100         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 101
 102         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
 103         PDITarget_SendBreak();
 104         PDITarget_SendBreak();
 105 #else
 106         /* Set DATA and CLOCK lines to outputs */
 107         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 108         BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
 109
 110         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 111         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 112         asm volatile ("NOP"::);
 113         asm volatile ("NOP"::);
 114
 115         /* Fire timer compare ISR every 50 cycles to manage the software USART */
 116         OCR0A   = 50;
 117         TCCR0A  = (1 << WGM01);
 118         TCCR0B  = (1 << CS00);
 119         TIMSK0  = (1 << OCIE0A);
 120
 121         PDITarget_SendBreak();
 122         PDITarget_SendBreak();
 123 #endif
 124 }
 125
 126 void PDITarget_DisableTargetPDI(void)
 127 {
 128 #if defined(PDI_VIA_HARDWARE_USART)
 129         /* Turn off receiver and transmitter of the USART, clear settings */
 130         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 131         UCSR1B  = 0;
 132         UCSR1C  = 0;
 133
 134         /* Set all USART lines as input, tristate */
 135         DDRD  &= ~((1 << 5) | (1 << 3));
 136         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 137 #else
 138         /* Set DATA and CLOCK lines to inputs */
 139         BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 140         BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
 141
 142         /* Tristate DATA and CLOCK lines */
 143         BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;
 144         BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
 145
 146         TCCR0B  = 0;
 147 #endif
 148 }
 149
 150 void PDITarget_SendByte(uint8_t Byte)
 151 {
 152 #if defined(PDI_VIA_HARDWARE_USART)
 153         /* Switch to Tx mode if currently in Rx mode */
 154         if (!(IsSending))
 155         {
 156                 PORTD  |=  (1 << 3);
 157                 DDRD   |=  (1 << 3);
 158
 159                 UCSR1B &= ~(1 << RXEN1);
 160                 UCSR1B |=  (1 << TXEN1);
 161
 162                 IsSending = true;
 163         }
 164
 165         /* Wait until there is space in the hardware Tx buffer before writing */
 166         while (!(UCSR1A & (1 << UDRE1)));
 167         UDR1 = Byte;
 168 #else
 169         /* Switch to Tx mode if currently in Rx mode */
 170         if (!(IsSending))
 171         {
 172                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 173                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 174
 175                 IsSending = true;
 176         }
 177
 178         bool    EvenParityBit = false;
 179         uint8_t ParityData    = Byte;
 180
 181         /* Compute Even parity bit */
 182         for (uint8_t i = 0; i < 8; i++)
 183         {
 184                 EvenParityBit ^= ParityData & 0x01;
 185                 ParityData    >>= 1;
 186         }
 187
 188         while (SoftUSART_BitCount);
 189
 190         /* Data shifted out LSB first, START DATA PARITY STOP STOP */
 191         SoftUSART_Data     = ((uint16_t)EvenParityBit << 9) | ((uint16_t)Byte << 1) | (1 << 10) | (1 << 11);
 192         SoftUSART_BitCount = BITS_IN_FRAME;
 193 #endif
 194 }
 195
 196 uint8_t PDITarget_ReceiveByte(void)
 197 {
 198 #if defined(PDI_VIA_HARDWARE_USART)
 199         /* Switch to Rx mode if currently in Tx mode */
 200         if (IsSending)
 201         {
 202                 while (!(UCSR1A & (1 << TXC1)));
 203                 UCSR1A |=  (1 << TXC1);
 204
 205                 UCSR1B &= ~(1 << TXEN1);
 206                 UCSR1B |=  (1 << RXEN1);
 207
 208                 DDRD   &= ~(1 << 3);
 209                 PORTD  &= ~(1 << 3);
 210
 211                 IsSending = false;
 212         }
 213
 214         /* Wait until a byte has been received before reading */
 215         while (!(UCSR1A & (1 << RXC1)));
 216         return UDR1;
 217 #else
 218         /* Switch to Rx mode if currently in Tx mode */
 219         if (IsSending)
 220         {
 221                 while (SoftUSART_BitCount);
 222
 223                 BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 224                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 225
 226                 IsSending = false;
 227         }
 228
 229         /* Wait until a byte has been received before reading */
 230         SoftUSART_BitCount = BITS_IN_FRAME;
 231         while (SoftUSART_BitCount);
 232
 233         /* Throw away the start, parity and stop bits to leave only the data */
 234         return (uint8_t)(SoftUSART_Data >> 1);
 235 #endif
 236 }
 237
 238 void PDITarget_SendBreak(void)
 239 {
 240 #if defined(PDI_VIA_HARDWARE_USART)
 241         /* Switch to Tx mode if currently in Rx mode */
 242         if (!(IsSending))
 243         {
 244                 PORTD  |=  (1 << 3);
 245                 DDRD   |=  (1 << 3);
 246
 247                 UCSR1B &= ~(1 << RXEN1);
 248                 UCSR1B |=  (1 << TXEN1);
 249
 250                 IsSending = true;
 251         }
 252
 253         /* Need to do nothing for a full frame to send a BREAK */
 254         for (uint8_t i = 0; i <= BITS_IN_FRAME; i++)
 255         {
 256                 /* Wait for a full cycle of the clock */
 257                 while (PIND & (1 << 5));
 258                 while (!(PIND & (1 << 5)));
 259         }
 260 #else
 261         /* Switch to Tx mode if currently in Rx mode */
 262         if (!(IsSending))
 263         {
 264                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 265                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 266
 267                 IsSending = true;
 268         }
 269
 270         while (SoftUSART_BitCount);
 271
 272         /* Need to do nothing for a full frame to send a BREAK */
 273         SoftUSART_Data     = 0x0FFF;
 274         SoftUSART_BitCount = BITS_IN_FRAME;
 275 #endif
 276 }
 277
 278 void PDITarget_SendAddress(uint32_t Address)
 279 {
 280         PDITarget_SendByte(Address >> 24);
 281         PDITarget_SendByte(Address >> 26);
 282         PDITarget_SendByte(Address >> 8);
 283         PDITarget_SendByte(Address &  0xFF);
 284 }
 285
 286 bool PDITarget_WaitWhileNVMBusBusy(void)
 287 {
 288         uint8_t AttemptsRemaining = 255;
 289
 290         /* Poll the STATUS register to check to see if NVM access has been enabled */
 291         while (AttemptsRemaining--)
 292         {
 293                 PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
 294                 if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)
 295                   return true;
 296         }
 297
 298         return false;
 299 }
 300
 301 void PDITarget_WaitWhileNVMControllerBusy(void)
 302 {
 303         /* Poll the NVM STATUS register to check to see if NVM controller is busy */
 304         for (;;)
 305         {
 306                 PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_1BYTE << 2));
 307                 PDITarget_SendAddress(DATAMEM_BASE | DATAMEM_NVM_STATUS);
 308
 309                 if (!(PDITarget_ReceiveByte() & (1 << 7)))
 310                   return;
 311         }
 312 }
 313
 314 #endif