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[pub/USBasp.git] / Projects / AVRISP-MKII / Lib / ISP / ISPTarget.c
1 /*
2 LUFA Library
3 Copyright (C) Dean Camera, 2010.
4
5 dean [at] fourwalledcubicle [dot] com
6 www.fourwalledcubicle.com
7 */
8
9 /*
10 Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)
11
12 Permission to use, copy, modify, distribute, and sell this
13 software and its documentation for any purpose is hereby granted
14 without fee, provided that the above copyright notice appear in
15 all copies and that both that the copyright notice and this
16 permission notice and warranty disclaimer appear in supporting
17 documentation, and that the name of the author not be used in
18 advertising or publicity pertaining to distribution of the
19 software without specific, written prior permission.
20
21 The author disclaim all warranties with regard to this
22 software, including all implied warranties of merchantability
23 and fitness. In no event shall the author be liable for any
24 special, indirect or consequential damages or any damages
25 whatsoever resulting from loss of use, data or profits, whether
26 in an action of contract, negligence or other tortious action,
27 arising out of or in connection with the use or performance of
28 this software.
29 */
30
31 /** \file
32 *
33 * Target-related functions for the ISP Protocol decoder.
34 */
35
36 #include "ISPTarget.h"
37
38 #if defined(ENABLE_ISP_PROTOCOL) || defined(__DOXYGEN__)
39
40 /** List of hardware SPI prescaler masks for possible AVRStudio ISP programming speeds. */
41 static uint8_t SPIMaskFromSCKDuration[] PROGMEM =
42 {
43 #if (F_CPU == 8000000)
44 SPI_SPEED_FCPU_DIV_2, // AVRStudio = 8MHz SPI, Actual = 4MHz SPI
45 SPI_SPEED_FCPU_DIV_2, // AVRStudio = 4MHz SPI, Actual = 4MHz SPI
46 SPI_SPEED_FCPU_DIV_4, // AVRStudio = 2MHz SPI, Actual = 2MHz SPI
47 SPI_SPEED_FCPU_DIV_8, // AVRStudio = 1MHz SPI, Actual = 1MHz SPI
48 SPI_SPEED_FCPU_DIV_16, // AVRStudio = 500KHz SPI, Actual = 500KHz SPI
49 SPI_SPEED_FCPU_DIV_32, // AVRStudio = 250KHz SPI, Actual = 250KHz SPI
50 SPI_SPEED_FCPU_DIV_64, // AVRStudio = 125KHz SPI, Actual = 125KHz SPI
51 #elif (F_CPU == 16000000)
52 SPI_SPEED_FCPU_DIV_2, // AVRStudio = 8MHz SPI, Actual = 8MHz SPI
53 SPI_SPEED_FCPU_DIV_4, // AVRStudio = 4MHz SPI, Actual = 4MHz SPI
54 SPI_SPEED_FCPU_DIV_8, // AVRStudio = 2MHz SPI, Actual = 2MHz SPI
55 SPI_SPEED_FCPU_DIV_16, // AVRStudio = 1MHz SPI, Actual = 1MHz SPI
56 SPI_SPEED_FCPU_DIV_32, // AVRStudio = 500KHz SPI, Actual = 500KHz SPI
57 SPI_SPEED_FCPU_DIV_64, // AVRStudio = 250KHz SPI, Actual = 250KHz SPI
58 SPI_SPEED_FCPU_DIV_128 // AVRStudio = 125KHz SPI, Actual = 125KHz SPI
59 #else
60 #error No SPI prescaler masks for chosen F_CPU speed.
61 #endif
62 };
63
64 /** Lookup table to convert the slower ISP speeds into a compare value for the software SPI driver. */
65 static uint16_t TimerCompareFromSCKDuration[] PROGMEM =
66 {
67 TIMER_COMP(96386), TIMER_COMP(89888), TIMER_COMP(84211), TIMER_COMP(79208), TIMER_COMP(74767),
68 TIMER_COMP(70797), TIMER_COMP(67227), TIMER_COMP(64000), TIMER_COMP(61069), TIMER_COMP(58395),
69 TIMER_COMP(55945), TIMER_COMP(51613), TIMER_COMP(49690), TIMER_COMP(47905), TIMER_COMP(46243),
70 TIMER_COMP(43244), TIMER_COMP(41885), TIMER_COMP(39409), TIMER_COMP(38278), TIMER_COMP(36200),
71 TIMER_COMP(34335), TIMER_COMP(32654), TIMER_COMP(31129), TIMER_COMP(29740), TIMER_COMP(28470),
72 TIMER_COMP(27304), TIMER_COMP(25724), TIMER_COMP(24768), TIMER_COMP(23461), TIMER_COMP(22285),
73 TIMER_COMP(21221), TIMER_COMP(20254), TIMER_COMP(19371), TIMER_COMP(18562), TIMER_COMP(17583),
74 TIMER_COMP(16914), TIMER_COMP(16097), TIMER_COMP(15356), TIMER_COMP(14520), TIMER_COMP(13914),
75 TIMER_COMP(13224), TIMER_COMP(12599), TIMER_COMP(12031), TIMER_COMP(11511), TIMER_COMP(10944),
76 TIMER_COMP(10431), TIMER_COMP(9963), TIMER_COMP(9468), TIMER_COMP(9081), TIMER_COMP(8612),
77 TIMER_COMP(8239), TIMER_COMP(7851), TIMER_COMP(7498), TIMER_COMP(7137), TIMER_COMP(6809),
78 TIMER_COMP(6478), TIMER_COMP(6178), TIMER_COMP(5879), TIMER_COMP(5607), TIMER_COMP(5359),
79 TIMER_COMP(5093), TIMER_COMP(4870), TIMER_COMP(4633), TIMER_COMP(4418), TIMER_COMP(4209),
80 TIMER_COMP(4019), TIMER_COMP(3823), TIMER_COMP(3645), TIMER_COMP(3474), TIMER_COMP(3310),
81 TIMER_COMP(3161), TIMER_COMP(3011), TIMER_COMP(2869), TIMER_COMP(2734), TIMER_COMP(2611),
82 TIMER_COMP(2484), TIMER_COMP(2369), TIMER_COMP(2257), TIMER_COMP(2152), TIMER_COMP(2052),
83 TIMER_COMP(1956), TIMER_COMP(1866), TIMER_COMP(1779), TIMER_COMP(1695), TIMER_COMP(1615),
84 TIMER_COMP(1539), TIMER_COMP(1468), TIMER_COMP(1398), TIMER_COMP(1333), TIMER_COMP(1271),
85 TIMER_COMP(1212), TIMER_COMP(1155), TIMER_COMP(1101), TIMER_COMP(1049), TIMER_COMP(1000),
86 TIMER_COMP(953), TIMER_COMP(909), TIMER_COMP(866), TIMER_COMP(826), TIMER_COMP(787),
87 TIMER_COMP(750), TIMER_COMP(715), TIMER_COMP(682), TIMER_COMP(650), TIMER_COMP(619),
88 TIMER_COMP(590), TIMER_COMP(563), TIMER_COMP(536), TIMER_COMP(511), TIMER_COMP(487),
89 TIMER_COMP(465), TIMER_COMP(443), TIMER_COMP(422), TIMER_COMP(402), TIMER_COMP(384),
90 TIMER_COMP(366), TIMER_COMP(349), TIMER_COMP(332), TIMER_COMP(317), TIMER_COMP(302),
91 TIMER_COMP(288), TIMER_COMP(274), TIMER_COMP(261), TIMER_COMP(249), TIMER_COMP(238),
92 TIMER_COMP(226), TIMER_COMP(216), TIMER_COMP(206), TIMER_COMP(196), TIMER_COMP(187),
93 TIMER_COMP(178), TIMER_COMP(170), TIMER_COMP(162), TIMER_COMP(154), TIMER_COMP(147),
94 TIMER_COMP(140), TIMER_COMP(134), TIMER_COMP(128), TIMER_COMP(122), TIMER_COMP(116),
95 TIMER_COMP(111), TIMER_COMP(105), TIMER_COMP(100), TIMER_COMP(95.4), TIMER_COMP(90.9),
96 TIMER_COMP(86.6), TIMER_COMP(82.6), TIMER_COMP(78.7), TIMER_COMP(75.0), TIMER_COMP(71.5),
97 TIMER_COMP(68.2), TIMER_COMP(65.0), TIMER_COMP(61.9), TIMER_COMP(59.0), TIMER_COMP(56.3),
98 TIMER_COMP(53.6), TIMER_COMP(51.1)
99 };
100
101 /** Currently selected SPI driver, either hardware (for fast ISP speeds) or software (for slower ISP speeds). */
102 bool HardwareSPIMode = true;
103
104 /** Software SPI data register for sending and receiving */
105 volatile uint8_t SoftSPI_Data;
106
107 /** Number of bits left to transfer in the software SPI driver */
108 volatile uint8_t SoftSPI_BitsRemaining;
109
110
111 /** ISR to handle software SPI transmission and reception */
112 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
113 {
114 if (!(PINB & (1 << 1)))
115 {
116 if (SoftSPI_Data & 0x80)
117 PORTB |= (1 << 2);
118 else
119 PORTB &= ~(1 << 2);
120 }
121 else
122 {
123 SoftSPI_Data <<= 1;
124
125 if (!(SoftSPI_BitsRemaining--))
126 TCCR1B = 0;
127
128 if (PINB & (1 << 3))
129 SoftSPI_Data |= 0x01;
130 }
131
132 PORTB ^= (1 << 1);
133 }
134
135 /** Initializes the appropriate SPI driver (hardware or software, depending on the selected ISP speed) ready for
136 * communication with the attached target.
137 */
138 void ISPTarget_Init(void)
139 {
140 uint8_t SCKDuration = V2Params_GetParameterValue(PARAM_SCK_DURATION);
141
142 if (SCKDuration < sizeof(SPIMaskFromSCKDuration))
143 {
144 HardwareSPIMode = true;
145
146 SPI_Init(pgm_read_byte(&SPIMaskFromSCKDuration[SCKDuration]) | SPI_ORDER_MSB_FIRST |
147 SPI_SCK_LEAD_RISING | SPI_SAMPLE_LEADING | SPI_MODE_MASTER);
148 }
149 else
150 {
151 HardwareSPIMode = false;
152
153 DDRB |= ((1 << 1) | (1 << 2));
154 PORTB |= ((1 << 0) | (1 << 3));
155
156 TIMSK1 = (1 << OCIE1A);
157 OCR1A = pgm_read_word(&TimerCompareFromSCKDuration[SCKDuration - sizeof(SPIMaskFromSCKDuration)]);
158 }
159 }
160
161 /** Shuts down the current selected SPI driver (hardware or software, depending on the selected ISP speed) so that no
162 * further communications can occur until the driver is re-initialized.
163 */
164 void ISPTarget_ShutDown(void)
165 {
166 if (HardwareSPIMode)
167 {
168 SPI_ShutDown();
169 }
170 else
171 {
172 DDRB &= ~((1 << 1) | (1 << 2));
173 PORTB &= ~((1 << 0) | (1 << 3));
174 }
175 }
176
177 /** Sends and receives a single byte of data to and from the attached target via software SPI.
178 *
179 * \param[in] Byte Byte of data to send to the attached target
180 *
181 * \return Received byte of data from the attached target
182 */
183 uint8_t ISPTarget_TransferSoftSPIByte(const uint8_t Byte)
184 {
185 SoftSPI_Data = Byte;
186 SoftSPI_BitsRemaining = 8;
187
188 if (SoftSPI_Data & 0x01)
189 PORTB |= (1 << 2);
190 else
191 PORTB &= ~(1 << 2);
192
193 TCNT1 = 0;
194 TCCR1B = ((1 << WGM12) | (1 << CS11));
195 while (SoftSPI_BitsRemaining && TimeoutTicksRemaining);
196 TCCR1B = 0;
197
198 return SoftSPI_Data;
199 }
200
201 /** Asserts or deasserts the target's reset line, using the correct polarity as set by the host using a SET PARAM command.
202 * When not asserted, the line is tristated so as not to interfere with normal device operation.
203 *
204 * \param[in] ResetTarget Boolean true when the target should be held in reset, false otherwise
205 */
206 void ISPTarget_ChangeTargetResetLine(const bool ResetTarget)
207 {
208 if (ResetTarget)
209 {
210 AUX_LINE_DDR |= AUX_LINE_MASK;
211
212 if (!(V2Params_GetParameterValue(PARAM_RESET_POLARITY)))
213 AUX_LINE_PORT |= AUX_LINE_MASK;
214 }
215 else
216 {
217 AUX_LINE_DDR &= ~AUX_LINE_MASK;
218 AUX_LINE_PORT &= ~AUX_LINE_MASK;
219 }
220 }
221
222 /** Waits until the target has completed the last operation, by continuously polling the device's
223 * BUSY flag until it is cleared, or until the command timeout period has expired.
224 *
225 * \return V2 Protocol status \ref STATUS_CMD_OK if the no timeout occurred, \ref STATUS_RDY_BSY_TOUT otherwise
226 */
227 uint8_t ISPTarget_WaitWhileTargetBusy(void)
228 {
229 do
230 {
231 ISPTarget_SendByte(0xF0);
232 ISPTarget_SendByte(0x00);
233 ISPTarget_SendByte(0x00);
234 }
235 while ((ISPTarget_ReceiveByte() & 0x01) && TimeoutTicksRemaining);
236
237 return TimeoutTicksRemaining ? STATUS_CMD_OK : STATUS_RDY_BSY_TOUT;
238 }
239
240 /** Sends a low-level LOAD EXTENDED ADDRESS command to the target, for addressing of memory beyond the
241 * 64KB boundary. This sends the command with the correct address as indicated by the current address
242 * pointer variable set by the host when a SET ADDRESS command is issued.
243 */
244 void ISPTarget_LoadExtendedAddress(void)
245 {
246 ISPTarget_SendByte(LOAD_EXTENDED_ADDRESS_CMD);
247 ISPTarget_SendByte(0x00);
248 ISPTarget_SendByte((CurrentAddress & 0x00FF0000) >> 16);
249 ISPTarget_SendByte(0x00);
250 }
251
252 /** Waits until the last issued target memory programming command has completed, via the check mode given and using
253 * the given parameters.
254 *
255 * \param[in] ProgrammingMode Programming mode used and completion check to use, a mask of PROG_MODE_* constants
256 * \param[in] PollAddress Memory address to poll for completion if polling check mode used
257 * \param[in] PollValue Poll value to check against if polling check mode used
258 * \param[in] DelayMS Milliseconds to delay before returning if delay check mode used
259 * \param[in] ReadMemCommand Device low-level READ MEMORY command to send if value check mode used
260 *
261 * \return V2 Protocol status \ref STATUS_CMD_OK if the no timeout occurred, \ref STATUS_RDY_BSY_TOUT or
262 * \ref STATUS_CMD_TOUT otherwise
263 */
264 uint8_t ISPTarget_WaitForProgComplete(const uint8_t ProgrammingMode,
265 const uint16_t PollAddress,
266 const uint8_t PollValue,
267 const uint8_t DelayMS,
268 const uint8_t ReadMemCommand)
269 {
270 uint8_t ProgrammingStatus = STATUS_CMD_OK;
271
272 /* Determine method of Programming Complete check */
273 switch (ProgrammingMode & ~(PROG_MODE_PAGED_WRITES_MASK | PROG_MODE_COMMIT_PAGE_MASK))
274 {
275 case PROG_MODE_WORD_TIMEDELAY_MASK:
276 case PROG_MODE_PAGED_TIMEDELAY_MASK:
277 ISPProtocol_DelayMS(DelayMS);
278 break;
279 case PROG_MODE_WORD_VALUE_MASK:
280 case PROG_MODE_PAGED_VALUE_MASK:
281 do
282 {
283 ISPTarget_SendByte(ReadMemCommand);
284 ISPTarget_SendByte(PollAddress >> 8);
285 ISPTarget_SendByte(PollAddress & 0xFF);
286 }
287 while ((ISPTarget_TransferByte(0x00) == PollValue) && TimeoutTicksRemaining);
288
289 if (!(TimeoutTicksRemaining))
290 ProgrammingStatus = STATUS_CMD_TOUT;
291
292 break;
293 case PROG_MODE_WORD_READYBUSY_MASK:
294 case PROG_MODE_PAGED_READYBUSY_MASK:
295 ProgrammingStatus = ISPTarget_WaitWhileTargetBusy();
296 break;
297 }
298
299 return ProgrammingStatus;
300 }
301
302 #endif