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[pub/USBasp.git] / Projects / AVRISP-MKII / Lib / XPROG / XMEGANVM.c
1 /*
2 LUFA Library
3 Copyright (C) Dean Camera, 2011.
4
5 dean [at] fourwalledcubicle [dot] com
6 www.lufa-lib.org
7 */
8
9 /*
10 Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com)
11
12 Permission to use, copy, modify, distribute, and sell this
13 software and its documentation for any purpose is hereby granted
14 without fee, provided that the above copyright notice appear in
15 all copies and that both that the copyright notice and this
16 permission notice and warranty disclaimer appear in supporting
17 documentation, and that the name of the author not be used in
18 advertising or publicity pertaining to distribution of the
19 software without specific, written prior permission.
20
21 The author disclaim all warranties with regard to this
22 software, including all implied warranties of merchantability
23 and fitness. In no event shall the author be liable for any
24 special, indirect or consequential damages or any damages
25 whatsoever resulting from loss of use, data or profits, whether
26 in an action of contract, negligence or other tortious action,
27 arising out of or in connection with the use or performance of
28 this software.
29 */
30
31 /** \file
32 *
33 * Target-related functions for the XMEGA target's NVM module.
34 */
35
36 #define INCLUDE_FROM_XMEGA_NVM_C
37 #include "XMEGANVM.h"
38
39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
40
41 /** Sends the given 32-bit absolute address to the target.
42 *
43 * \param[in] AbsoluteAddress Absolute address to send to the target
44 */
45 static void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)
46 {
47 /* Send the given 32-bit address to the target, LSB first */
48 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[0]);
49 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[1]);
50 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[2]);
51 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[3]);
52 }
53
54 /** Sends the given NVM register address to the target.
55 *
56 * \param[in] Register NVM register whose absolute address is to be sent
57 */
58 static void XMEGANVM_SendNVMRegAddress(const uint8_t Register)
59 {
60 /* Determine the absolute register address from the NVM base memory address and the NVM register address */
61 uint32_t Address = XPROG_Param_NVMBase | Register;
62
63 /* Send the calculated 32-bit address to the target, LSB first */
64 XMEGANVM_SendAddress(Address);
65 }
66
67 /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC
68 * calculation.
69 *
70 * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
71 */
72 bool XMEGANVM_WaitWhileNVMBusBusy(void)
73 {
74 /* Poll the STATUS register to check to see if NVM access has been enabled */
75 for (;;)
76 {
77 /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */
78 XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
79
80 uint8_t StatusRegister = XPROGTarget_ReceiveByte();
81
82 /* We might have timed out waiting for the status register read response, check here */
83 if (!(TimeoutTicksRemaining))
84 return false;
85
86 /* Check the status register read response to see if the NVM bus is enabled */
87 if (StatusRegister & PDI_STATUS_NVM)
88 return true;
89 }
90 }
91
92 /** Waits while the target's NVM controller is busy performing an operation, exiting if the
93 * timeout period expires.
94 *
95 * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
96 */
97 bool XMEGANVM_WaitWhileNVMControllerBusy(void)
98 {
99 /* Preload the pointer register with the NVM STATUS register address to check the BUSY flag */
100 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
101 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_STATUS);
102
103 /* Poll the NVM STATUS register while the NVM controller is busy */
104 for (;;)
105 {
106 /* Fetch the current status value via the pointer register (without auto-increment afterwards) */
107 XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT << 2) | PDI_DATSIZE_1BYTE);
108
109 uint8_t StatusRegister = XPROGTarget_ReceiveByte();
110
111 /* We might have timed out waiting for the status register read response, check here */
112 if (!(TimeoutTicksRemaining))
113 return false;
114
115 /* Check to see if the BUSY flag is still set */
116 if (!(StatusRegister & (1 << 7)))
117 return true;
118 }
119 }
120
121 /** Enables the physical PDI interface on the target and enables access to the internal NVM controller.
122 *
123 * \return Boolean true if the PDI interface was enabled successfully, false otherwise
124 */
125 bool XMEGANVM_EnablePDI(void)
126 {
127 /* Enable PDI programming mode with the attached target */
128 XPROGTarget_EnableTargetPDI();
129
130 /* Store the RESET key into the RESET PDI register to keep the XMEGA in reset */
131 XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
132 XPROGTarget_SendByte(PDI_RESET_KEY);
133
134 /* Lower direction change guard time to 0 USART bits */
135 XPROGTarget_SendByte(PDI_CMD_STCS | PDI_CTRL_REG);
136 XPROGTarget_SendByte(0x07);
137
138 /* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */
139 XPROGTarget_SendByte(PDI_CMD_KEY);
140 for (uint8_t i = sizeof(PDI_NVMENABLE_KEY); i > 0; i--)
141 XPROGTarget_SendByte(PDI_NVMENABLE_KEY[i - 1]);
142
143 /* Wait until the NVM bus becomes active */
144 return XMEGANVM_WaitWhileNVMBusBusy();
145 }
146
147 /** Removes access to the target's NVM controller and physically disables the target's physical PDI interface. */
148 void XMEGANVM_DisablePDI(void)
149 {
150 XMEGANVM_WaitWhileNVMBusBusy();
151
152 /* Clear the RESET key in the RESET PDI register to allow the XMEGA to run */
153 XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
154 XPROGTarget_SendByte(0x00);
155
156 /* Do it twice to make sure it takes effect (silicon bug?) */
157 XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
158 XPROGTarget_SendByte(0x00);
159
160 XPROGTarget_DisableTargetPDI();
161 }
162
163 /** Retrieves the CRC value of the given memory space.
164 *
165 * \param[in] CRCCommand NVM CRC command to issue to the target
166 * \param[out] CRCDest CRC Destination when read from the target
167 *
168 * \return Boolean true if the command sequence complete successfully
169 */
170 bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
171 {
172 /* Wait until the NVM controller is no longer busy */
173 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
174 return false;
175
176 /* Set the NVM command to the correct CRC read command */
177 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
178 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
179 XPROGTarget_SendByte(CRCCommand);
180
181 /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
182 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
183 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
184 XPROGTarget_SendByte(1 << 0);
185
186 /* Wait until the NVM bus is ready again */
187 if (!(XMEGANVM_WaitWhileNVMBusBusy()))
188 return false;
189
190 /* Wait until the NVM controller is no longer busy */
191 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
192 return false;
193
194 /* Load the PDI pointer register with the DAT0 register start address */
195 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
196 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0);
197
198 /* Send the REPEAT command to grab the CRC bytes */
199 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
200 XPROGTarget_SendByte(XMEGA_CRC_LENGTH - 1);
201
202 /* Read in the CRC bytes from the target */
203 XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
204 for (uint8_t i = 0; i < XMEGA_CRC_LENGTH; i++)
205 ((uint8_t*)CRCDest)[i] = XPROGTarget_ReceiveByte();
206
207 return (TimeoutTicksRemaining != 0);
208 }
209
210 /** Reads memory from the target's memory spaces.
211 *
212 * \param[in] ReadAddress Start address to read from within the target's address space
213 * \param[out] ReadBuffer Buffer to store read data into
214 * \param[in] ReadSize Number of bytes to read
215 *
216 * \return Boolean true if the command sequence complete successfully
217 */
218 bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)
219 {
220 /* Wait until the NVM controller is no longer busy */
221 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
222 return false;
223
224 /* Send the READNVM command to the NVM controller for reading of an arbitrary location */
225 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
226 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
227 XPROGTarget_SendByte(XMEGA_NVM_CMD_READNVM);
228
229 /* Load the PDI pointer register with the start address we want to read from */
230 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
231 XMEGANVM_SendAddress(ReadAddress);
232
233 /* Send the REPEAT command with the specified number of bytes to read */
234 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
235 XPROGTarget_SendByte(ReadSize - 1);
236
237 /* Send a LD command with indirect access and post-increment to read out the bytes */
238 XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
239 while (ReadSize-- && TimeoutTicksRemaining)
240 *(ReadBuffer++) = XPROGTarget_ReceiveByte();
241
242 return (TimeoutTicksRemaining != 0);
243 }
244
245 /** Writes byte addressed memory to the target's memory spaces.
246 *
247 * \param[in] WriteCommand Command to send to the device to write each memory byte
248 * \param[in] WriteAddress Address to write to within the target's address space
249 * \param[in] Byte Byte to write to the target
250 *
251 * \return Boolean true if the command sequence complete successfully
252 */
253 bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t Byte)
254 {
255 /* Wait until the NVM controller is no longer busy */
256 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
257 return false;
258
259 /* Send the memory write command to the target */
260 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
261 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
262 XPROGTarget_SendByte(WriteCommand);
263
264 /* Send new memory byte to the memory of the target */
265 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
266 XMEGANVM_SendAddress(WriteAddress);
267 XPROGTarget_SendByte(Byte);
268
269 return true;
270 }
271
272 /** Writes page addressed memory to the target's memory spaces.
273 *
274 * \param[in] WriteBuffCommand Command to send to the device to write a byte to the memory page buffer
275 * \param[in] EraseBuffCommand Command to send to the device to erase the memory page buffer
276 * \param[in] WritePageCommand Command to send to the device to write the page buffer to the destination memory
277 * \param[in] PageMode Bitfield indicating what operations need to be executed on the specified page
278 * \param[in] WriteAddress Start address to write the page data to within the target's address space
279 * \param[in] WriteBuffer Buffer to source data from
280 * \param[in] WriteSize Number of bytes to write
281 *
282 * \return Boolean true if the command sequence complete successfully
283 */
284 bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,
285 const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,
286 const uint8_t* WriteBuffer, uint16_t WriteSize)
287 {
288 if (PageMode & XPRG_PAGEMODE_ERASE)
289 {
290 /* Wait until the NVM controller is no longer busy */
291 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
292 return false;
293
294 /* Send the memory buffer erase command to the target */
295 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
296 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
297 XPROGTarget_SendByte(EraseBuffCommand);
298
299 /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
300 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
301 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
302 XPROGTarget_SendByte(1 << 0);
303 }
304
305 if (WriteSize)
306 {
307 /* Wait until the NVM controller is no longer busy */
308 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
309 return false;
310
311 /* Send the memory buffer write command to the target */
312 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
313 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
314 XPROGTarget_SendByte(WriteBuffCommand);
315
316 /* Load the PDI pointer register with the start address we want to write to */
317 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
318 XMEGANVM_SendAddress(WriteAddress);
319
320 /* Send the REPEAT command with the specified number of bytes to write */
321 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
322 XPROGTarget_SendByte(WriteSize - 1);
323
324 /* Send a ST command with indirect access and post-increment to write the bytes */
325 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
326 while (WriteSize--)
327 XPROGTarget_SendByte(*(WriteBuffer++));
328 }
329
330 if (PageMode & XPRG_PAGEMODE_WRITE)
331 {
332 /* Wait until the NVM controller is no longer busy */
333 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
334 return false;
335
336 /* Send the memory write command to the target */
337 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
338 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
339 XPROGTarget_SendByte(WritePageCommand);
340
341 /* Send the address of the first page location to write the memory page */
342 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
343 XMEGANVM_SendAddress(WriteAddress);
344 XPROGTarget_SendByte(0x00);
345 }
346
347 return true;
348 }
349
350 /** Erases a specific memory space of the target.
351 *
352 * \param[in] EraseCommand NVM erase command to send to the device
353 * \param[in] Address Address inside the memory space to erase
354 *
355 * \return Boolean true if the command sequence complete successfully
356 */
357 bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)
358 {
359 /* Wait until the NVM controller is no longer busy */
360 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
361 return false;
362
363 /* EEPROM and Chip erasures are triggered differently to FLASH section erasures */
364 if (EraseCommand == XMEGA_NVM_CMD_CHIPERASE)
365 {
366 /* Send the memory erase command to the target */
367 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
368 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
369 XPROGTarget_SendByte(EraseCommand);
370
371 /* Set CMDEX bit in NVM CTRLA register to start the erase sequence */
372 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
373 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
374 XPROGTarget_SendByte(1 << 0);
375 }
376 else if (EraseCommand == XMEGA_NVM_CMD_ERASEEEPROM)
377 {
378 /* Send the EEPROM page buffer erase command to the target */
379 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
380 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
381 XPROGTarget_SendByte(XMEGA_NVM_CMD_ERASEEEPROMPAGEBUFF);
382
383 /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
384 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
385 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
386 XPROGTarget_SendByte(1 << 0);
387
388 /* Wait until the NVM controller is no longer busy */
389 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
390 return false;
391
392 /* Send the EEPROM memory buffer write command to the target */
393 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
394 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
395 XPROGTarget_SendByte(XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF);
396
397 /* Load the PDI pointer register with the EEPROM page start address */
398 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
399 XMEGANVM_SendAddress(Address);
400
401 /* Send the REPEAT command with the specified number of bytes to write */
402 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
403 XPROGTarget_SendByte(XPROG_Param_EEPageSize - 1);
404
405 /* Send a ST command with indirect access and post-increment to tag each byte in the EEPROM page buffer */
406 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
407 for (uint8_t PageByte = 0; PageByte < XPROG_Param_EEPageSize; PageByte++)
408 XPROGTarget_SendByte(0x00);
409
410 /* Send the memory erase command to the target */
411 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
412 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
413 XPROGTarget_SendByte(EraseCommand);
414
415 /* Set CMDEX bit in NVM CTRLA register to start the EEPROM erase sequence */
416 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
417 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
418 XPROGTarget_SendByte(1 << 0);
419 }
420 else
421 {
422 /* Send the memory erase command to the target */
423 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
424 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
425 XPROGTarget_SendByte(EraseCommand);
426
427 /* Other erase modes just need us to address a byte within the target memory space */
428 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
429 XMEGANVM_SendAddress(Address);
430 XPROGTarget_SendByte(0x00);
431 }
432
433 /* Wait until the NVM bus is ready again */
434 if (!(XMEGANVM_WaitWhileNVMBusBusy()))
435 return false;
436
437 return true;
438 }
439
440 #endif
441