Merge branch 'master' of github.com:abcminiuser/lufa
[pub/USBasp.git] / Projects / AVRISP-MKII / Lib / XPROG / XMEGANVM.c
1 /*
2 LUFA Library
3 Copyright (C) Dean Camera, 2013.
4
5 dean [at] fourwalledcubicle [dot] com
6 www.lufa-lib.org
7 */
8
9 /*
10 Copyright 2013 Dean Camera (dean [at] fourwalledcubicle [dot] com)
11
12 Permission to use, copy, modify, distribute, and sell this
13 software and its documentation for any purpose is hereby granted
14 without fee, provided that the above copyright notice appear in
15 all copies and that both that the copyright notice and this
16 permission notice and warranty disclaimer appear in supporting
17 documentation, and that the name of the author not be used in
18 advertising or publicity pertaining to distribution of the
19 software without specific, written prior permission.
20
21 The author disclaims all warranties with regard to this
22 software, including all implied warranties of merchantability
23 and fitness. In no event shall the author be liable for any
24 special, indirect or consequential damages or any damages
25 whatsoever resulting from loss of use, data or profits, whether
26 in an action of contract, negligence or other tortious action,
27 arising out of or in connection with the use or performance of
28 this software.
29 */
30
31 /** \file
32 *
33 * Target-related functions for the XMEGA target's NVM module.
34 */
35
36 #define INCLUDE_FROM_XMEGA_NVM_C
37 #include "XMEGANVM.h"
38
39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
40
41 /** Sends the given 32-bit absolute address to the target.
42 *
43 * \param[in] AbsoluteAddress Absolute address to send to the target
44 */
45 static void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)
46 {
47 /* Send the given 32-bit address to the target, LSB first */
48 XPROGTarget_SendByte(AbsoluteAddress & 0xFF);
49 XPROGTarget_SendByte(AbsoluteAddress >> 8);
50 XPROGTarget_SendByte(AbsoluteAddress >> 16);
51 XPROGTarget_SendByte(AbsoluteAddress >> 24);
52 }
53
54 /** Sends the given NVM register address to the target.
55 *
56 * \param[in] Register NVM register whose absolute address is to be sent
57 */
58 static void XMEGANVM_SendNVMRegAddress(const uint8_t Register)
59 {
60 /* Determine the absolute register address from the NVM base memory address and the NVM register address */
61 uint32_t Address = XPROG_Param_NVMBase | Register;
62
63 /* Send the calculated 32-bit address to the target, LSB first */
64 XMEGANVM_SendAddress(Address);
65 }
66
67 /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC
68 * calculation.
69 *
70 * \return Boolean \c true if the NVM controller became ready within the timeout period, \c false otherwise
71 */
72 bool XMEGANVM_WaitWhileNVMBusBusy(void)
73 {
74 /* Poll the STATUS register to check to see if NVM access has been enabled */
75 for (;;)
76 {
77 /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */
78 XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
79
80 uint8_t StatusRegister = XPROGTarget_ReceiveByte();
81
82 /* We might have timed out waiting for the status register read response, check here */
83 if (!(TimeoutTicksRemaining))
84 return false;
85
86 /* Check the status register read response to see if the NVM bus is enabled */
87 if (StatusRegister & PDI_STATUS_NVM)
88 return true;
89 }
90 }
91
92 /** Waits while the target's NVM controller is busy performing an operation, exiting if the
93 * timeout period expires.
94 *
95 * \return Boolean \c true if the NVM controller became ready within the timeout period, \c false otherwise
96 */
97 bool XMEGANVM_WaitWhileNVMControllerBusy(void)
98 {
99 /* Preload the pointer register with the NVM STATUS register address to check the BUSY flag */
100 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
101 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_STATUS);
102
103 /* Poll the NVM STATUS register while the NVM controller is busy */
104 for (;;)
105 {
106 /* Fetch the current status value via the pointer register (without auto-increment afterwards) */
107 XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT << 2) | PDI_DATSIZE_1BYTE);
108
109 uint8_t StatusRegister = XPROGTarget_ReceiveByte();
110
111 /* We might have timed out waiting for the status register read response, check here */
112 if (!(TimeoutTicksRemaining))
113 return false;
114
115 /* Check to see if the BUSY flag is still set */
116 if (!(StatusRegister & (1 << 7)))
117 return true;
118 }
119 }
120
121 /** Enables the physical PDI interface on the target and enables access to the internal NVM controller.
122 *
123 * \return Boolean \c true if the PDI interface was enabled successfully, \c false otherwise
124 */
125 bool XMEGANVM_EnablePDI(void)
126 {
127 /* Enable PDI programming mode with the attached target */
128 XPROGTarget_EnableTargetPDI();
129
130 /* Store the RESET key into the RESET PDI register to keep the XMEGA in reset */
131 XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
132 XPROGTarget_SendByte(PDI_RESET_KEY);
133
134 /* Lower direction change guard time to 32 USART bits */
135 XPROGTarget_SendByte(PDI_CMD_STCS | PDI_CTRL_REG);
136 XPROGTarget_SendByte(0x02);
137
138 /* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */
139 XPROGTarget_SendByte(PDI_CMD_KEY);
140 for (uint8_t i = sizeof(PDI_NVMENABLE_KEY); i > 0; i--)
141 XPROGTarget_SendByte(PDI_NVMENABLE_KEY[i - 1]);
142
143 /* Wait until the NVM bus becomes active */
144 return XMEGANVM_WaitWhileNVMBusBusy();
145 }
146
147 /** Removes access to the target's NVM controller and physically disables the target's physical PDI interface. */
148 void XMEGANVM_DisablePDI(void)
149 {
150 XMEGANVM_WaitWhileNVMBusBusy();
151
152 /* Clear the RESET key in the RESET PDI register to allow the XMEGA to run - must perform this until the
153 * change takes effect, as in some cases it takes multiple writes (silicon bug?).
154 */
155 do
156 {
157 /* Clear reset register */
158 XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
159 XPROGTarget_SendByte(0x00);
160
161 /* Read back the reset register, check to see if it took effect */
162 XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_RESET_REG);
163 } while (XPROGTarget_ReceiveByte() != 0x00);
164
165 XPROGTarget_DisableTargetPDI();
166 }
167
168 /** Retrieves the CRC value of the given memory space.
169 *
170 * \param[in] CRCCommand NVM CRC command to issue to the target
171 * \param[out] CRCDest CRC Destination when read from the target
172 *
173 * \return Boolean \c true if the command sequence complete successfully
174 */
175 bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand,
176 uint32_t* const CRCDest)
177 {
178 *CRCDest = 0;
179
180 /* Wait until the NVM controller is no longer busy */
181 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
182 return false;
183
184 /* Set the NVM command to the correct CRC read command */
185 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
186 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
187 XPROGTarget_SendByte(CRCCommand);
188
189 /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
190 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
191 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
192 XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX);
193
194 /* Wait until the NVM bus is ready again */
195 if (!(XMEGANVM_WaitWhileNVMBusBusy()))
196 return false;
197
198 /* Wait until the NVM controller is no longer busy */
199 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
200 return false;
201
202 /* Load the PDI pointer register with the DAT0 register start address */
203 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
204 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0);
205
206 /* Send the REPEAT command to grab the CRC bytes */
207 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
208 XPROGTarget_SendByte(XMEGA_CRC_LENGTH_BYTES - 1);
209
210 /* Read in the CRC bytes from the target */
211 XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
212 for (uint8_t i = 0; i < XMEGA_CRC_LENGTH_BYTES; i++)
213 ((uint8_t*)CRCDest)[i] = XPROGTarget_ReceiveByte();
214
215 return (TimeoutTicksRemaining > 0);
216 }
217
218 /** Reads memory from the target's memory spaces.
219 *
220 * \param[in] ReadAddress Start address to read from within the target's address space
221 * \param[out] ReadBuffer Buffer to store read data into
222 * \param[in] ReadSize Number of bytes to read
223 *
224 * \return Boolean \c true if the command sequence complete successfully
225 */
226 bool XMEGANVM_ReadMemory(const uint32_t ReadAddress,
227 uint8_t* ReadBuffer,
228 uint16_t ReadSize)
229 {
230 /* Wait until the NVM controller is no longer busy */
231 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
232 return false;
233
234 /* Send the READNVM command to the NVM controller for reading of an arbitrary location */
235 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
236 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
237 XPROGTarget_SendByte(XMEGA_NVM_CMD_READNVM);
238
239 /* Load the PDI pointer register with the start address we want to read from */
240 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
241 XMEGANVM_SendAddress(ReadAddress);
242
243 if (ReadSize > 1)
244 {
245 /* Send the REPEAT command with the specified number of bytes to read */
246 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
247 XPROGTarget_SendByte(ReadSize - 1);
248 }
249
250 /* Send a LD command with indirect access and post-increment to read out the bytes */
251 XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
252 while (ReadSize-- && TimeoutTicksRemaining)
253 *(ReadBuffer++) = XPROGTarget_ReceiveByte();
254
255 return (TimeoutTicksRemaining > 0);
256 }
257
258 /** Writes byte addressed memory to the target's memory spaces.
259 *
260 * \param[in] WriteCommand Command to send to the device to write each memory byte
261 * \param[in] WriteAddress Address to write to within the target's address space
262 * \param[in] Byte Byte to write to the target
263 *
264 * \return Boolean \c true if the command sequence complete successfully
265 */
266 bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand,
267 const uint32_t WriteAddress,
268 const uint8_t Byte)
269 {
270 /* Wait until the NVM controller is no longer busy */
271 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
272 return false;
273
274 /* Send the memory write command to the target */
275 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
276 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
277 XPROGTarget_SendByte(WriteCommand);
278
279 /* Send new memory byte to the memory of the target */
280 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
281 XMEGANVM_SendAddress(WriteAddress);
282 XPROGTarget_SendByte(Byte);
283
284 return true;
285 }
286
287 /** Writes page addressed memory to the target's memory spaces.
288 *
289 * \param[in] WriteBuffCommand Command to send to the device to write a byte to the memory page buffer
290 * \param[in] EraseBuffCommand Command to send to the device to erase the memory page buffer
291 * \param[in] WritePageCommand Command to send to the device to write the page buffer to the destination memory
292 * \param[in] PageMode Bitfield indicating what operations need to be executed on the specified page
293 * \param[in] WriteAddress Start address to write the page data to within the target's address space
294 * \param[in] WriteBuffer Buffer to source data from
295 * \param[in] WriteSize Number of bytes to write
296 *
297 * \return Boolean \c true if the command sequence complete successfully
298 */
299 bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand,
300 const uint8_t EraseBuffCommand,
301 const uint8_t WritePageCommand,
302 const uint8_t PageMode,
303 const uint32_t WriteAddress,
304 const uint8_t* WriteBuffer,
305 uint16_t WriteSize)
306 {
307 if (PageMode & XPRG_PAGEMODE_ERASE)
308 {
309 /* Wait until the NVM controller is no longer busy */
310 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
311 return false;
312
313 /* Send the memory buffer erase command to the target */
314 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
315 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
316 XPROGTarget_SendByte(EraseBuffCommand);
317
318 /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
319 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
320 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
321 XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX);
322 }
323
324 if (WriteSize)
325 {
326 /* Wait until the NVM controller is no longer busy */
327 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
328 return false;
329
330 /* Send the memory buffer write command to the target */
331 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
332 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
333 XPROGTarget_SendByte(WriteBuffCommand);
334
335 /* Load the PDI pointer register with the start address we want to write to */
336 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
337 XMEGANVM_SendAddress(WriteAddress);
338
339 /* Send the REPEAT command with the specified number of bytes to write */
340 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
341 XPROGTarget_SendByte(WriteSize - 1);
342
343 /* Send a ST command with indirect access and post-increment to write the bytes */
344 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
345 while (WriteSize--)
346 XPROGTarget_SendByte(*(WriteBuffer++));
347 }
348
349 if (PageMode & XPRG_PAGEMODE_WRITE)
350 {
351 /* Wait until the NVM controller is no longer busy */
352 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
353 return false;
354
355 /* Send the memory write command to the target */
356 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
357 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
358 XPROGTarget_SendByte(WritePageCommand);
359
360 /* Send the address of the first page location to write the memory page */
361 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
362 XMEGANVM_SendAddress(WriteAddress);
363 XPROGTarget_SendByte(0x00);
364 }
365
366 return true;
367 }
368
369 /** Erases a specific memory space of the target.
370 *
371 * \param[in] EraseCommand NVM erase command to send to the device
372 * \param[in] Address Address inside the memory space to erase
373 *
374 * \return Boolean \c true if the command sequence complete successfully
375 */
376 bool XMEGANVM_EraseMemory(const uint8_t EraseCommand,
377 const uint32_t Address)
378 {
379 /* Wait until the NVM controller is no longer busy */
380 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
381 return false;
382
383 /* EEPROM and Chip erasures are triggered differently to FLASH section erasures */
384 if (EraseCommand == XMEGA_NVM_CMD_CHIPERASE)
385 {
386 /* Send the memory erase command to the target */
387 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
388 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
389 XPROGTarget_SendByte(EraseCommand);
390
391 /* Set CMDEX bit in NVM CTRLA register to start the erase sequence */
392 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
393 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
394 XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX);
395 }
396 else if (EraseCommand == XMEGA_NVM_CMD_ERASEEEPROM)
397 {
398 /* Send the EEPROM page buffer erase command to the target */
399 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
400 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
401 XPROGTarget_SendByte(XMEGA_NVM_CMD_ERASEEEPROMPAGEBUFF);
402
403 /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
404 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
405 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
406 XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX);
407
408 /* Wait until the NVM controller is no longer busy */
409 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
410 return false;
411
412 /* Send the EEPROM memory buffer write command to the target */
413 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
414 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
415 XPROGTarget_SendByte(XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF);
416
417 /* Load the PDI pointer register with the EEPROM page start address */
418 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
419 XMEGANVM_SendAddress(Address);
420
421 /* Send the REPEAT command with the specified number of bytes to write */
422 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
423 XPROGTarget_SendByte(XPROG_Param_EEPageSize - 1);
424
425 /* Send a ST command with indirect access and post-increment to tag each byte in the EEPROM page buffer */
426 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
427 for (uint8_t PageByte = 0; PageByte < XPROG_Param_EEPageSize; PageByte++)
428 XPROGTarget_SendByte(0x00);
429
430 /* Send the memory erase command to the target */
431 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
432 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
433 XPROGTarget_SendByte(EraseCommand);
434
435 /* Set CMDEX bit in NVM CTRLA register to start the EEPROM erase sequence */
436 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
437 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
438 XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX);
439 }
440 else
441 {
442 /* Send the memory erase command to the target */
443 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
444 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
445 XPROGTarget_SendByte(EraseCommand);
446
447 /* Other erase modes just need us to address a byte within the target memory space */
448 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
449 XMEGANVM_SendAddress(Address);
450 XPROGTarget_SendByte(0x00);
451 }
452
453 /* Wait until the NVM bus is ready again */
454 if (!(XMEGANVM_WaitWhileNVMBusBusy()))
455 return false;
456
457 return true;
458 }
459
460 #endif
461