Projects/AVRISP/Lib/PDITarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2009.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, and distribute this software
  13   and its documentation for any purpose and without fee is hereby
  14   granted, provided that the above copyright notice appear in all
  15   copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 /** \file
  32  *
  33  *  Target-related functions for the PDI Protocol decoder.
  34  */
  35
  36 #define  INCLUDE_FROM_PDITARGET_C
  37 #include "PDITarget.h"
  38
  39 #if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
  40
  41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
  42 volatile bool               IsSending;
  43
  44 #if !defined(PDI_VIA_HARDWARE_USART)
  45 /** Software USART raw frame bits for transmission/reception. */
  46 volatile uint16_t           SoftUSART_Data;
  47
  48 /** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
  49 #define SoftUSART_BitCount  GPIOR2
  50
  51
  52 /** ISR to manage the software USART when bit-banged USART mode is selected. */
  53 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
  54 {
  55         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
  56         BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;
  57
  58         /* If not sending or receiving, just exit */
  59         if (!(SoftUSART_BitCount))
  60           return;
  61
  62         /* Check to see if we are at a rising or falling edge of the clock */
  63         if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)
  64         {
  65                 /* If at rising clock edge and we are in send mode, abort */
  66                 if (IsSending)
  67                   return;
  68
  69                 /* Wait for the start bit when receiving */
  70                 if ((SoftUSART_BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
  71                   return;
  72
  73                 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
  74                  * be discarded leaving the data to be byte-aligned for quick access */
  75                 if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)
  76                   SoftUSART_Data |= (1 << (BITS_IN_FRAME - 1));
  77
  78                 SoftUSART_Data >>= 1;
  79                 SoftUSART_BitCount--;
  80         }
  81         else
  82         {
  83                 /* If at falling clock edge and we are in receive mode, abort */
  84                 if (!IsSending)
  85                   return;
  86
  87                 /* Set the data line to the next bit value */
  88                 if (SoftUSART_Data & 0x01)
  89                   BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;
  90                 else
  91                   BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
  92
  93                 SoftUSART_Data >>= 1;
  94                 SoftUSART_BitCount--;
  95         }
  96 }
  97 #endif
  98
  99 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
 100 void PDITarget_EnableTargetPDI(void)
 101 {
 102 #if defined(PDI_VIA_HARDWARE_USART)
 103         /* Set Tx and XCK as outputs, Rx as input */
 104         DDRD |=  (1 << 5) | (1 << 3);
 105         DDRD &= ~(1 << 2);
 106
 107         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 108         PORTD |= (1 << 3);
 109         asm volatile ("NOP"::);
 110         asm volatile ("NOP"::);
 111
 112         /* Set up the synchronous USART for XMEGA communications -
 113            8 data bits, even parity, 2 stop bits */
 114         UBRR1  = (F_CPU / 1000000UL);
 115         UCSR1B = (1 << TXEN1);
 116         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 117
 118         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
 119         PDITarget_SendBreak();
 120         PDITarget_SendBreak();
 121 #else
 122         /* Set DATA and CLOCK lines to outputs */
 123         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 124         BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
 125
 126         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 127         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 128         asm volatile ("NOP"::);
 129         asm volatile ("NOP"::);
 130
 131         /* Fire timer compare ISR every 100 cycles to manage the software USART */
 132         OCR1A   = 80;
 133         TCCR1B  = (1 << WGM12) | (1 << CS10);
 134         TIMSK1  = (1 << OCIE1A);
 135
 136         PDITarget_SendBreak();
 137         PDITarget_SendBreak();
 138 #endif
 139 }
 140
 141 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
 142 void PDITarget_DisableTargetPDI(void)
 143 {
 144 #if defined(PDI_VIA_HARDWARE_USART)
 145         /* Turn off receiver and transmitter of the USART, clear settings */
 146         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 147         UCSR1B  = 0;
 148         UCSR1C  = 0;
 149
 150         /* Set all USART lines as input, tristate */
 151         DDRD  &= ~((1 << 5) | (1 << 3));
 152         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 153 #else
 154         /* Set DATA and CLOCK lines to inputs */
 155         BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 156         BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
 157
 158         /* Tristate DATA and CLOCK lines */
 159         BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;
 160         BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
 161
 162         TCCR0B  = 0;
 163 #endif
 164 }
 165
 166 /** Sends a byte via the USART.
 167  *
 168  *  \param[in] Byte  Byte to send through the USART
 169  */
 170 void PDITarget_SendByte(uint8_t Byte)
 171 {
 172 #if defined(PDI_VIA_HARDWARE_USART)
 173         /* Switch to Tx mode if currently in Rx mode */
 174         if (!(IsSending))
 175         {
 176                 PORTD  |=  (1 << 3);
 177                 DDRD   |=  (1 << 3);
 178
 179                 UCSR1B |=  (1 << TXEN1);
 180                 UCSR1B &= ~(1 << RXEN1);
 181
 182                 IsSending = true;
 183         }
 184
 185         /* Wait until there is space in the hardware Tx buffer before writing */
 186         while (!(UCSR1A & (1 << UDRE1)));
 187         UCSR1A |= (1 << TXC1);
 188         UDR1    = Byte;
 189 #else
 190         /* Switch to Tx mode if currently in Rx mode */
 191         if (!(IsSending))
 192         {
 193                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 194                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 195
 196                 IsSending = true;
 197         }
 198
 199         /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */
 200         uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));
 201
 202         /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */
 203         uint8_t ParityData    = Byte;
 204         while (ParityData)
 205         {
 206                 NewUSARTData ^= (1 << 9);
 207                 ParityData   &= (ParityData - 1);
 208         }
 209
 210         /* Wait until transmitter is idle before writing new data */
 211         while (SoftUSART_BitCount);
 212
 213         /* Data shifted out LSB first, START DATA PARITY STOP STOP */
 214         SoftUSART_Data     = NewUSARTData;
 215         SoftUSART_BitCount = BITS_IN_FRAME;
 216 #endif
 217 }
 218
 219 /** Receives a byte via the software USART, blocking until data is received.
 220  *
 221  *  \return Received byte from the USART
 222  */
 223 uint8_t PDITarget_ReceiveByte(void)
 224 {
 225 #if defined(PDI_VIA_HARDWARE_USART)
 226         /* Switch to Rx mode if currently in Tx mode */
 227         if (IsSending)
 228         {
 229                 while (!(UCSR1A & (1 << TXC1)));
 230                 UCSR1A |=  (1 << TXC1);
 231
 232                 UCSR1B &= ~(1 << TXEN1);
 233                 UCSR1B |=  (1 << RXEN1);
 234
 235                 DDRD   &= ~(1 << 3);
 236                 PORTD  &= ~(1 << 3);
 237
 238                 IsSending = false;
 239         }
 240
 241         /* Wait until a byte has been received before reading */
 242         while (!(UCSR1A & (1 << RXC1)));
 243         return UDR1;
 244 #else
 245         /* Switch to Rx mode if currently in Tx mode */
 246         if (IsSending)
 247         {
 248                 while (SoftUSART_BitCount);
 249
 250                 BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 251                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 252
 253                 IsSending = false;
 254         }
 255
 256         /* Wait until a byte has been received before reading */
 257         SoftUSART_BitCount = BITS_IN_FRAME;
 258         while (SoftUSART_BitCount);
 259
 260         /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */
 261         return (uint8_t)SoftUSART_Data;
 262 #endif
 263 }
 264
 265 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
 266 void PDITarget_SendBreak(void)
 267 {
 268 #if defined(PDI_VIA_HARDWARE_USART)
 269         /* Switch to Tx mode if currently in Rx mode */
 270         if (!(IsSending))
 271         {
 272                 PORTD  |=  (1 << 3);
 273                 DDRD   |=  (1 << 3);
 274
 275                 UCSR1B &= ~(1 << RXEN1);
 276                 UCSR1B |=  (1 << TXEN1);
 277
 278                 IsSending = true;
 279         }
 280
 281         /* Need to do nothing for a full frame to send a BREAK */
 282         for (uint8_t i = 0; i < BITS_IN_FRAME; i++)
 283         {
 284                 /* Wait for a full cycle of the clock */
 285                 while (PIND & (1 << 5));
 286                 while (!(PIND & (1 << 5)));
 287         }
 288 #else
 289         /* Switch to Tx mode if currently in Rx mode */
 290         if (!(IsSending))
 291         {
 292                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 293                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 294
 295                 IsSending = true;
 296         }
 297
 298         while (SoftUSART_BitCount);
 299
 300         /* Need to do nothing for a full frame to send a BREAK */
 301         SoftUSART_Data     = 0x0FFF;
 302         SoftUSART_BitCount = BITS_IN_FRAME;
 303 #endif
 304 }
 305
 306 /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC
 307  *  calculation.
 308  *
 309  *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
 310  */
 311 bool PDITarget_WaitWhileNVMBusBusy(void)
 312 {
 313         TCNT0 = 0;
 314
 315         /* Poll the STATUS register to check to see if NVM access has been enabled */
 316         while (TCNT0 < PDI_NVM_TIMEOUT_MS)
 317         {
 318                 /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */
 319                 PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
 320                 if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)
 321                   return true;
 322         }
 323
 324         return false;
 325 }
 326
 327 #endif