Projects/AVRISP/Lib/NVMTarget.h

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2009.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, and distribute this software
  13   and its documentation for any purpose and without fee is hereby
  14   granted, provided that the above copyright notice appear in all
  15   copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 /** \file
  32  *
  33  *  Header file for NVMTarget.c.
  34  */
  35
  36 #ifndef _NVM_TARGET_
  37 #define _NVM_TARGET_
  38
  39         /* Includes: */
  40                 #include <avr/io.h>
  41                 #include <avr/interrupt.h>
  42                 #include <stdbool.h>
  43
  44                 #include <LUFA/Common/Common.h>
  45
  46                 #include "PDIProtocol.h"
  47                 #include "PDITarget.h"
  48
  49         /* Preprocessor Checks: */
  50                 #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
  51                         #undef ENABLE_ISP_PROTOCOL
  52
  53                         #if !defined(ENABLE_PDI_PROTOCOL)
  54                                 #define ENABLE_PDI_PROTOCOL
  55                         #endif
  56                 #endif
  57
  58         /* Defines: */
  59                 #define NVM_BUSY_TIMEOUT_MS            200
  60
  61                 #define NVM_REG_ADDR0                  0x00
  62                 #define NVM_REG_ADDR1                  0x01
  63                 #define NVM_REG_ADDR2                  0x02
  64                 #define NVM_REG_DAT0                   0x04
  65                 #define NVM_REG_DAT1                   0x05
  66                 #define NVM_REG_DAT2                   0x06
  67                 #define NVM_REG_CMD                    0x0A
  68                 #define NVM_REG_CTRLA                  0x0B
  69                 #define NVM_REG_CTRLB                  0x0C
  70                 #define NVM_REG_INTCTRL                0x0D
  71                 #define NVM_REG_STATUS                 0x0F
  72                 #define NVM_REG_LOCKBITS               0x10
  73
  74                 #define NVM_CMD_NOOP                   0x00
  75                 #define NVM_CMD_CHIPERASE              0x40
  76                 #define NVM_CMD_READNVM                0x43
  77                 #define NVM_CMD_LOADFLASHPAGEBUFF      0x23
  78                 #define NVM_CMD_ERASEFLASHPAGEBUFF     0x26
  79                 #define NVM_CMD_ERASEFLASHPAGE         0x2B
  80                 #define NVM_CMD_WRITEFLASHPAGE         0x2E
  81                 #define NVM_CMD_ERASEWRITEFLASH        0x2F
  82                 #define NVM_CMD_FLASHCRC               0x78
  83                 #define NVM_CMD_ERASEAPPSEC            0x20
  84                 #define NVM_CMD_ERASEAPPSECPAGE        0x22
  85                 #define NVM_CMD_WRITEAPPSECPAGE        0x24
  86                 #define NVM_CMD_ERASEWRITEAPPSECPAGE   0x25
  87                 #define NVM_CMD_APPCRC                 0x38
  88                 #define NVM_CMD_ERASEBOOTSEC           0x68
  89                 #define NVM_CMD_ERASEBOOTSECPAGE       0x2A
  90                 #define NVM_CMD_WRITEBOOTSECPAGE       0x2C
  91                 #define NVM_CMD_ERASEWRITEBOOTSECPAGE  0x2D
  92                 #define NVM_CMD_BOOTCRC                0x39
  93                 #define NVM_CMD_READUSERSIG            0x03
  94                 #define NVM_CMD_ERASEUSERSIG           0x18
  95                 #define NVM_CMD_WRITEUSERSIG           0x1A
  96                 #define NVM_CMD_READCALIBRATION        0x02
  97                 #define NVM_CMD_READFUSE               0x07
  98                 #define NVM_CMD_WRITEFUSE              0x4C
  99                 #define NVM_CMD_WRITELOCK              0x08
 100                 #define NVM_CMD_LOADEEPROMPAGEBUFF     0x33
 101                 #define NVM_CMD_ERASEEEPROMPAGEBUFF    0x36
 102                 #define NVM_CMD_ERASEEEPROM            0x30
 103                 #define NVM_CMD_ERASEEEPROMPAGE        0x32
 104                 #define NVM_CMD_WRITEEEPROMPAGE        0x34
 105                 #define NVM_CMD_ERASEWRITEEEPROMPAGE   0x35
 106                 #define NVM_CMD_READEEPROM             0x06
 107
 108         /* Function Prototypes: */
 109                 void NVMTarget_SendNVMRegAddress(uint8_t Register);
 110                 void NVMTarget_SendAddress(uint32_t AbsoluteAddress);
 111                 bool NVMTarget_WaitWhileNVMControllerBusy(void);
 112                 bool NVMTarget_GetMemoryCRC(uint8_t CRCCommand, uint32_t* CRCDest);
 113                 bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize);
 114                 bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer);
 115                 bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffCommand, uint8_t WritePageCommand,
 116                                                uint8_t PageMode, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize);
 117                 bool NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address);
 118
 119 #endif